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Searched refs:write_sysreg_s (Results 1 – 25 of 29) sorted by relevance

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/openbmc/linux/arch/arm64/include/asm/
H A Darm_dsu_pmu.h40 write_sysreg_s(val, CLUSTERPMCR_EL1); in __dsu_pmu_write_pmcr()
48 write_sysreg_s(val, CLUSTERPMOVSCLR_EL1); in __dsu_pmu_get_reset_overflow()
55 write_sysreg_s(counter, CLUSTERPMSELR_EL1); in __dsu_pmu_select_counter()
68 write_sysreg_s(val, CLUSTERPMXEVCNTR_EL1); in __dsu_pmu_write_counter()
75 write_sysreg_s(event, CLUSTERPMXEVTYPER_EL1); in __dsu_pmu_set_event()
86 write_sysreg_s(val, CLUSTERPMCCNTR_EL1); in __dsu_pmu_write_pmccntr()
92 write_sysreg_s(BIT(counter), CLUSTERPMCNTENCLR_EL1); in __dsu_pmu_disable_counter()
98 write_sysreg_s(BIT(counter), CLUSTERPMCNTENSET_EL1); in __dsu_pmu_enable_counter()
104 write_sysreg_s(BIT(counter), CLUSTERPMINTENSET_EL1); in __dsu_pmu_counter_interrupt_enable()
110 write_sysreg_s(BIT(counter), CLUSTERPMINTENCLR_EL1); in __dsu_pmu_counter_interrupt_disable()
H A Darch_gicv3.h20 #define write_gicreg(v, r) write_sysreg_s(v, SYS_ ## r)
31 write_sysreg_s(irq, SYS_ICC_DIR_EL1); in gic_write_dir()
84 write_sysreg_s(val, SYS_ICC_CTLR_EL1); in gic_write_ctlr()
95 write_sysreg_s(val, SYS_ICC_IGRPEN1_EL1); in gic_write_grpen1()
101 write_sysreg_s(val, SYS_ICC_SGI1R_EL1); in gic_write_sgi1r()
111 write_sysreg_s(val, SYS_ICC_SRE_EL1); in gic_write_sre()
117 write_sysreg_s(val, SYS_ICC_BPR1_EL1); in gic_write_bpr1()
127 write_sysreg_s(val, SYS_ICC_PMR_EL1); in gic_write_pmr()
H A Dkvm_host.h865 case SCTLR_EL1: write_sysreg_s(val, SYS_SCTLR_EL12); break; in __vcpu_write_sys_reg_to_cpu()
866 case CPACR_EL1: write_sysreg_s(val, SYS_CPACR_EL12); break; in __vcpu_write_sys_reg_to_cpu()
867 case TTBR0_EL1: write_sysreg_s(val, SYS_TTBR0_EL12); break; in __vcpu_write_sys_reg_to_cpu()
868 case TTBR1_EL1: write_sysreg_s(val, SYS_TTBR1_EL12); break; in __vcpu_write_sys_reg_to_cpu()
869 case TCR_EL1: write_sysreg_s(val, SYS_TCR_EL12); break; in __vcpu_write_sys_reg_to_cpu()
870 case ESR_EL1: write_sysreg_s(val, SYS_ESR_EL12); break; in __vcpu_write_sys_reg_to_cpu()
871 case AFSR0_EL1: write_sysreg_s(val, SYS_AFSR0_EL12); break; in __vcpu_write_sys_reg_to_cpu()
872 case AFSR1_EL1: write_sysreg_s(val, SYS_AFSR1_EL12); break; in __vcpu_write_sys_reg_to_cpu()
873 case FAR_EL1: write_sysreg_s(val, SYS_FAR_EL12); break; in __vcpu_write_sys_reg_to_cpu()
874 case MAIR_EL1: write_sysreg_s(val, SYS_MAIR_EL12); break; in __vcpu_write_sys_reg_to_cpu()
[all …]
H A Dirqflags.h45 write_sysreg_s(GIC_PRIO_IRQON, SYS_ICC_PMR_EL1); in __pmr_local_irq_enable()
74 write_sysreg_s(GIC_PRIO_IRQOFF, SYS_ICC_PMR_EL1); in __pmr_local_irq_disable()
189 write_sysreg_s(flags, SYS_ICC_PMR_EL1); in __pmr_local_irq_restore()
H A Dkvm_hyp.h28 #define write_sysreg_el0(v,r) write_sysreg_s(v, r##_EL02)
30 #define write_sysreg_el1(v,r) write_sysreg_s(v, r##_EL12)
32 #define write_sysreg_el2(v,r) write_sysreg_s(v, r##_EL1)
H A Dfpsimd.h202 write_sysreg_s(__new, (reg)); \
226 write_sysreg_s(tmp | val, SYS_ZCR_EL1); in write_vl()
232 write_sysreg_s(tmp | val, SYS_SMCR_EL1); in write_vl()
H A Dpointer_auth.h47 write_sysreg_s(__pki_v.lo, SYS_ ## k ## KEYLO_EL1); \
48 write_sysreg_s(__pki_v.hi, SYS_ ## k ## KEYHI_EL1); \
H A Dsysreg.h1082 #define write_sysreg_s(v, r) do { \ macro
1103 write_sysreg_s(__scs_new, sysreg); \
/openbmc/linux/arch/arm64/kvm/hyp/nvhe/
H A Ddebug-sr.c35 write_sysreg_s(0, SYS_PMSCR_EL1); in __debug_save_spe()
51 write_sysreg_s(pmscr_el1, SYS_PMSCR_EL1); in __debug_restore_spe()
67 write_sysreg_s(0, SYS_TRFCR_EL1); in __debug_save_trace()
79 write_sysreg_s(trfcr_el1, SYS_TRFCR_EL1); in __debug_restore_trace()
/openbmc/linux/arch/arm64/kvm/hyp/include/hyp/
H A Dswitch.h121 write_sysreg_s(r_val, SYS_HFGRTR_EL2); in __activate_traps_hfgxtr()
122 write_sysreg_s(w_val, SYS_HFGWTR_EL2); in __activate_traps_hfgxtr()
135 write_sysreg_s(r_val, SYS_HFGITR_EL2); in __activate_traps_hfgxtr()
153 write_sysreg_s(r_val, SYS_HDFGRTR_EL2); in __activate_traps_hfgxtr()
154 write_sysreg_s(w_val, SYS_HDFGWTR_EL2); in __activate_traps_hfgxtr()
164 write_sysreg_s(ctxt_sys_reg(hctxt, HFGRTR_EL2), SYS_HFGRTR_EL2); in __deactivate_traps_hfgxtr()
165 write_sysreg_s(ctxt_sys_reg(hctxt, HFGWTR_EL2), SYS_HFGWTR_EL2); in __deactivate_traps_hfgxtr()
170 write_sysreg_s(ctxt_sys_reg(hctxt, HFGITR_EL2), SYS_HFGITR_EL2); in __deactivate_traps_hfgxtr()
171 write_sysreg_s(ctxt_sys_reg(hctxt, HDFGRTR_EL2), SYS_HDFGRTR_EL2); in __deactivate_traps_hfgxtr()
172 write_sysreg_s(ctxt_sys_reg(hctxt, HDFGWTR_EL2), SYS_HDFGWTR_EL2); in __deactivate_traps_hfgxtr()
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H A Dsysreg-sr.h143 write_sysreg_s(ctxt_sys_reg(ctxt, TFSRE0_EL1), SYS_TFSRE0_EL1); in __sysreg_restore_el1_state()
209 write_sysreg_s(ctxt_sys_reg(ctxt, DISR_EL1), SYS_VDISR_EL2); in __sysreg_restore_el2_return_state()
/openbmc/linux/drivers/soc/qcom/
H A Dkryo-l2-accessors.c29 write_sysreg_s(reg, L2CPUSRSELR_EL1); in kryo_l2_set_indirect_reg()
31 write_sysreg_s(val, L2CPUSRDR_EL1); in kryo_l2_set_indirect_reg()
50 write_sysreg_s(reg, L2CPUSRSELR_EL1); in kryo_l2_get_indirect_reg()
/openbmc/linux/tools/testing/selftests/kvm/lib/aarch64/
H A Dgic_v3.c89 write_sysreg_s(irq, SYS_ICC_EOIR1_EL1); in gicv3_write_eoir()
95 write_sysreg_s(irq, SYS_ICC_DIR_EL1); in gicv3_write_dir()
101 write_sysreg_s(mask, SYS_ICC_PMR_EL1); in gicv3_set_priority_mask()
113 write_sysreg_s(val, SYS_ICC_CTLR_EL1); in gicv3_set_eoi_split()
316 write_sysreg_s(read_sysreg_s(SYS_ICC_SRE_EL1) | ICC_SRE_EL1_SRE, in gicv3_cpu_init()
320 write_sysreg_s(ICC_PMR_DEF_PRIO, SYS_ICC_PMR_EL1); in gicv3_cpu_init()
323 write_sysreg_s(ICC_IGRPEN1_EL1_ENABLE, SYS_ICC_GRPEN1_EL1); in gicv3_cpu_init()
/openbmc/linux/arch/arm64/kernel/
H A Dmte.c156 write_sysreg_s(0, SYS_TFSR_EL1); in mte_check_tfsr_el1()
210 write_sysreg_s( in mte_update_gcr_excl()
238 write_sysreg_s(0, SYS_TFSRE0_EL1); in mte_thread_init_user()
288 write_sysreg_s(KERNEL_GCR_EL1, SYS_GCR_EL1); in mte_cpu_setup()
300 write_sysreg_s(rgsr, SYS_RGSR_EL1); in mte_cpu_setup()
303 write_sysreg_s(0, SYS_TFSR_EL1); in mte_cpu_setup()
304 write_sysreg_s(0, SYS_TFSRE0_EL1); in mte_cpu_setup()
H A Dfpsimd.c429 write_sysreg_s(current->thread.svcr, SYS_SVCR); in task_fpsimd_load()
1187 write_sysreg_s(ZCR_ELx_LEN_MASK, SYS_ZCR_EL1); in read_zcr_features()
1304 write_sysreg_s(read_sysreg_s(SYS_SMPRI_EL1) & ~SMPRI_EL1_PRIORITY_MASK, in sme_kernel_enable()
1323 write_sysreg_s(read_sysreg_s(SYS_SMCR_EL1) | SMCR_ELx_EZT0_MASK, in sme2_kernel_enable()
1334 write_sysreg_s(read_sysreg_s(SYS_SMCR_EL1) | SMCR_ELx_FA64_MASK, in fa64_kernel_enable()
1352 write_sysreg_s(read_sysreg_s(SYS_SMCR_EL1) | SMCR_ELx_LEN_MASK, in read_smcr_features()
1421 write_sysreg_s(smcr, SYS_SMCR_EL1); in sme_suspend_exit()
1422 write_sysreg_s(0, SYS_SMPRI_EL1); in sme_suspend_exit()
H A Dprocess.c253 write_sysreg_s(0, SYS_TPIDR2_EL0); in tls_thread_flush()
437 write_sysreg_s(next->thread.tpidr2_el0, SYS_TPIDR2_EL0); in tls_thread_switch()
/openbmc/linux/drivers/hwtracing/coresight/
H A Dcoresight-trbe.h59 write_sysreg_s(trbsr, SYS_TRBSR_EL1); in clr_trbe_irq()
110 write_sysreg_s(addr, SYS_TRBPTR_EL1); in set_trbe_write_pointer()
136 write_sysreg_s(addr, SYS_TRBBASER_EL1); in set_trbe_base_pointer()
H A Dcoresight-self-hosted-trace.h20 write_sysreg_s(val, SYS_TRFCR_EL1); in write_trfcr()
H A Dcoresight-trbe.c222 write_sysreg_s(trblimitr, SYS_TRBLIMITR_EL1); in set_trbe_enabled()
240 write_sysreg_s(trblimitr, SYS_TRBLIMITR_EL1); in set_trbe_disabled()
256 write_sysreg_s(0, SYS_TRBLIMITR_EL1); in trbe_reset_local()
257 write_sysreg_s(0, SYS_TRBPTR_EL1); in trbe_reset_local()
258 write_sysreg_s(0, SYS_TRBBASER_EL1); in trbe_reset_local()
259 write_sysreg_s(0, SYS_TRBSR_EL1); in trbe_reset_local()
591 write_sysreg_s(trbsr, SYS_TRBSR_EL1); in clr_trbe_status()
H A Dcoresight-etm4x-core.c176 write_sysreg_s(val, SYS_OSLAR_EL1); in etm_write_os_lock()
337 write_sysreg_s(val, HISI_HIP08_CORE_COMMIT_REG); in etm4_hisi_config_core_commit()
/openbmc/linux/drivers/perf/
H A Dapple_m1_cpu_pmu.c185 write_sysreg_s(_val, SYS_IMP_APL_PMC## _idx ##_EL1); \
248 write_sysreg_s(val, SYS_IMP_APL_PMCR0_EL1); in __m1_pmu_enable_counter()
283 write_sysreg_s(val, SYS_IMP_APL_PMCR0_EL1); in __m1_pmu_enable_counter_interrupt()
327 write_sysreg_s(val, SYS_IMP_APL_PMCR1_EL1); in m1_pmu_configure_counter()
343 write_sysreg_s(val, SYS_IMP_APL_PMESR0_EL1); in m1_pmu_configure_counter()
350 write_sysreg_s(val, SYS_IMP_APL_PMESR1_EL1); in m1_pmu_configure_counter()
394 write_sysreg_s(state, SYS_IMP_APL_PMCR0_EL1); in m1_pmu_handle_irq()
471 write_sysreg_s(val, SYS_IMP_APL_PMCR0_EL1); in __m1_pmu_set_mode()
H A Darm_spe_pmu.c546 write_sysreg_s(base, SYS_PMBPTR_EL1); in arm_spe_perf_aux_output_begin()
549 write_sysreg_s(limit, SYS_PMBLIMITR_EL1); in arm_spe_perf_aux_output_begin()
569 write_sysreg_s(0, SYS_PMSCR_EL1); in arm_spe_pmu_disable_and_drain_local()
577 write_sysreg_s(0, SYS_PMBLIMITR_EL1); in arm_spe_pmu_disable_and_drain_local()
699 write_sysreg_s(0, SYS_PMBSR_EL1); in arm_spe_pmu_irq_handler()
789 write_sysreg_s(reg, SYS_PMSFCR_EL1); in arm_spe_pmu_start()
792 write_sysreg_s(reg, SYS_PMSEVFR_EL1); in arm_spe_pmu_start()
796 write_sysreg_s(reg, SYS_PMSNEVFR_EL1); in arm_spe_pmu_start()
800 write_sysreg_s(reg, SYS_PMSLATFR_EL1); in arm_spe_pmu_start()
804 write_sysreg_s(reg, SYS_PMSIRR_EL1); in arm_spe_pmu_start()
[all …]
/openbmc/linux/drivers/irqchip/
H A Dirq-apple-aic.c540 write_sysreg_s(IPI_SR_PENDING, SYS_IMP_APL_IPI_SR_EL1); in aic_handle_fiq()
755 write_sysreg_s(FIELD_PREP(IPI_RR_CPU, idx), in aic_ipi_send_fast()
758 write_sysreg_s(FIELD_PREP(IPI_RR_CPU, idx) | FIELD_PREP(IPI_RR_CLUSTER, cluster), in aic_ipi_send_fast()
773 write_sysreg_s(IPI_SR_PENDING, SYS_IMP_APL_IPI_SR_EL1); in aic_handle_ipi()
815 write_sysreg_s(IPI_SR_PENDING, SYS_IMP_APL_IPI_SR_EL1); in aic_init_cpu()
/openbmc/linux/tools/arch/arm64/include/asm/
H A Dsysreg.h1263 #define write_sysreg_s(v, r) do { \ macro
1283 write_sysreg_s(__scs_new, sysreg); \
/openbmc/linux/tools/testing/selftests/kvm/aarch64/
H A Dvgic_irq.c163 write_sysreg_s(val, SYS_ICV_AP1R0_EL1); in gic_write_ap1r0()

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