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Searched refs:twtp (Results 1 – 6 of 6) sorted by relevance

/openbmc/u-boot/arch/arm/mach-sunxi/dram_timings/
H A Dddr2_v3s.c43 u8 twtp = tcwl + 2 + twr; /* WL + BL / 2 + tWR */ in mctl_set_timing_params() local
54 writel(DRAMTMG0_TWTP(twtp) | DRAMTMG0_TFAW(tfaw) | in mctl_set_timing_params()
H A Dddr3_1333.c43 u8 twtp = tcwl + 2 + twr; /* WL + BL / 2 + tWR */ in mctl_set_timing_params() local
57 writel(DRAMTMG0_TWTP(twtp) | DRAMTMG0_TFAW(tfaw) | in mctl_set_timing_params()
H A Dlpddr3_stock.c43 u8 twtp = tcwl + 4 + twr + 1; in mctl_set_timing_params() local
53 writel(DRAMTMG0_TWTP(twtp) | DRAMTMG0_TFAW(tfaw) | in mctl_set_timing_params()
/openbmc/u-boot/arch/arm/mach-sunxi/
H A Ddram_sun8i_a83t.c126 u8 twtp = tcwl + 2 + twr; /* WL + BL / 2 + tWR */ in auto_set_timing_para() local
165 twtp = tcwl + 4 + twr + 1; /* CWL + BL/2 + tWR */ in auto_set_timing_para()
170 reg_val = (twtp << 24) | (tfaw << 16) | (trasmax << 8) | (tras << 0); in auto_set_timing_para()
H A Ddram_sun8i_a33.c126 u8 twtp = tcwl + 2 + twr; /* WL + BL / 2 + tWR */ in auto_set_timing_para() local
138 reg_val = (twtp << 24) | (tfaw << 16) | (trasmax << 8) | (tras << 0); in auto_set_timing_para()
H A Ddram_sun50i_h6.c231 u8 twtp = tcwl + 4 + twr + 1; in mctl_set_timing_lpddr3() local
244 writel((twtp << 24) | (tfaw << 16) | (trasmax << 8) | tras, in mctl_set_timing_lpddr3()