/openbmc/u-boot/arch/arm/lib/ |
H A D | cache-cp15.c | 29 u64 *page_table = (u64 *)gd->arch.tlb_addr; in set_section_dcache() 33 u32 *page_table = (u32 *)gd->arch.tlb_addr; in set_section_dcache() 56 u64 *page_table = (u64 *)gd->arch.tlb_addr; in mmu_set_region_dcache_behaviour() 58 u32 *page_table = (u32 *)gd->arch.tlb_addr; in mmu_set_region_dcache_behaviour() 126 u64 *page_table = (u64 *)(gd->arch.tlb_addr + (4096 * 4)); in mmu_setup() 127 u64 tpt = gd->arch.tlb_addr + (4096 * i); in mmu_setup() 147 : "r"(gd->arch.tlb_addr + (4096 * 4)), "r"(0) in mmu_setup() 159 : "r"(gd->arch.tlb_addr + (4096 * 4)), "r"(0) in mmu_setup() 176 reg = gd->arch.tlb_addr & TTBR0_BASE_ADDR_MASK; in mmu_setup() 189 : : "r" (gd->arch.tlb_addr) : "memory"); in mmu_setup()
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/openbmc/u-boot/arch/arm/cpu/armv8/ |
H A D | cache_v8.c | 121 pte = (u64*)gd->arch.tlb_addr; in find_pte() 150 if (gd->arch.tlb_fillptr - gd->arch.tlb_addr > gd->arch.tlb_size) in create_table() 153 gd->arch.tlb_fillptr - gd->arch.tlb_addr, in create_table() 367 if (!gd->arch.tlb_fillptr || !gd->arch.tlb_addr) in setup_pgtables() 384 u64 tlb_addr = gd->arch.tlb_addr; in setup_all_pgtables() local 388 gd->arch.tlb_fillptr = tlb_addr; in setup_all_pgtables() 395 (uintptr_t)gd->arch.tlb_addr; in setup_all_pgtables() 396 gd->arch.tlb_addr = gd->arch.tlb_fillptr; in setup_all_pgtables() 398 gd->arch.tlb_emerg = gd->arch.tlb_addr; in setup_all_pgtables() 399 gd->arch.tlb_addr = tlb_addr; in setup_all_pgtables() [all …]
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/openbmc/linux/kernel/dma/ |
H A D | swiotlb.c | 857 static void swiotlb_bounce(struct device *dev, phys_addr_t tlb_addr, size_t size, in swiotlb_bounce() argument 860 struct io_tlb_pool *mem = swiotlb_find_pool(dev, tlb_addr); in swiotlb_bounce() 861 int index = (tlb_addr - mem->start) >> IO_TLB_SHIFT; in swiotlb_bounce() 865 unsigned char *vaddr = mem->vaddr + tlb_addr - mem->start; in swiotlb_bounce() 871 tlb_offset = tlb_addr & (IO_TLB_SIZE - 1); in swiotlb_bounce() 1050 phys_addr_t tlb_addr; in swiotlb_area_find_slots() local 1053 tlb_addr = slot_addr(tbl_dma_addr, slot_index); in swiotlb_area_find_slots() 1055 if ((tlb_addr & alloc_align_mask) || in swiotlb_area_find_slots() 1056 (orig_addr && (tlb_addr & iotlb_align_mask) != in swiotlb_area_find_slots() 1311 phys_addr_t tlb_addr; in swiotlb_tbl_map_single() local [all …]
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/openbmc/qemu/include/exec/ |
H A D | cpu-all.h | 365 static inline bool tlb_hit_page(uint64_t tlb_addr, vaddr addr) in tlb_hit_page() argument 367 return addr == (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK)); in tlb_hit_page() 376 static inline bool tlb_hit(uint64_t tlb_addr, vaddr addr) in tlb_hit() argument 378 return tlb_hit_page(tlb_addr, addr & TARGET_PAGE_MASK); in tlb_hit()
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/openbmc/u-boot/arch/arm/cpu/armv7/ls102xa/ |
H A D | cpu.c | 146 u32 *level0_table = (u32 *)gd->arch.tlb_addr; in mmu_setup() 147 u32 *level1_table = (u32 *)(gd->arch.tlb_addr + 0x1000); in mmu_setup() 209 mmu_page_table_flush(gd->arch.tlb_addr, in enable_caches() 210 gd->arch.tlb_addr + gd->arch.tlb_size); in enable_caches()
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/openbmc/linux/include/linux/ |
H A D | swiotlb.h | 51 phys_addr_t tlb_addr, 56 void swiotlb_sync_single_for_device(struct device *dev, phys_addr_t tlb_addr, 58 void swiotlb_sync_single_for_cpu(struct device *dev, phys_addr_t tlb_addr,
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/openbmc/u-boot/arch/arm/cpu/armv8/fsl-layerscape/ |
H A D | spl.c | 106 gd->arch.tlb_addr = (gd->ram_top - gd->arch.tlb_size) & ~(0x10000 - 1); in board_init_f() 107 gd->arch.tlb_allocated = gd->arch.tlb_addr; in board_init_f()
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H A D | cpu.c | 407 gd->arch.tlb_addr = CONFIG_SYS_FSL_OCRAM_BASE; in early_mmu_setup() 409 gd->arch.tlb_addr = CONFIG_SYS_DDR_SDRAM_BASE; in early_mmu_setup() 410 gd->arch.tlb_fillptr = gd->arch.tlb_addr; in early_mmu_setup() 417 set_ttbr_tcr_mair(el, gd->arch.tlb_addr, in early_mmu_setup() 479 u64 tlb_addr_save = gd->arch.tlb_addr; in final_mmu_setup() 537 gd->arch.tlb_addr = gd->arch.secure_ram & ~0xfff; in final_mmu_setup() 543 tlb_addr_save = gd->arch.tlb_addr; in final_mmu_setup() 547 gd->arch.tlb_addr = tlb_addr_save; in final_mmu_setup() 559 gd->arch.tlb_addr = gd->arch.tlb_fillptr; in final_mmu_setup() 560 gd->arch.tlb_emerg = gd->arch.tlb_addr; in final_mmu_setup() [all …]
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/openbmc/qemu/accel/tcg/ |
H A D | cputlb.c | 1359 uint64_t tlb_addr = tlb_read_idx(entry, access_type); in probe_access_internal() local 1365 if (!tlb_hit_page(tlb_addr, page_addr)) { in probe_access_internal() 1386 tlb_addr = tlb_read_idx(entry, access_type); in probe_access_internal() 1388 flags &= tlb_addr; in probe_access_internal() 1575 uint64_t tlb_addr = tlb_read_idx(tlbe, access_type); in tlb_plugin_lookup() local 1578 if (unlikely(!tlb_hit(tlb_addr, addr))) { in tlb_plugin_lookup() 1586 if (tlb_addr & TLB_MMIO) { in tlb_plugin_lookup() 1639 uint64_t tlb_addr = tlb_read_idx(entry, access_type); in mmu_lookup1() local 1645 if (!tlb_hit(tlb_addr, addr)) { in mmu_lookup1() 1654 tlb_addr = tlb_read_idx(entry, access_type) & ~TLB_INVALID_MASK; in mmu_lookup1() [all …]
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/openbmc/u-boot/common/ |
H A D | board_f.c | 392 gd->arch.tlb_addr = gd->relocaddr; in reserve_mmu() 393 debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr, in reserve_mmu() 394 gd->arch.tlb_addr + gd->arch.tlb_size); in reserve_mmu() 401 gd->arch.tlb_allocated = gd->arch.tlb_addr; in reserve_mmu()
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/openbmc/u-boot/arch/arm/include/asm/ |
H A D | global_data.h | 39 unsigned long tlb_addr; member
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/openbmc/u-boot/arch/arm/mach-versal/ |
H A D | cpu.c | 80 gd->arch.tlb_addr = VERSAL_TCM_BASE_ADDR; in reserve_mmu()
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/openbmc/u-boot/arch/arm/mach-zynqmp/ |
H A D | cpu.c | 121 gd->arch.tlb_addr = ZYNQMP_TCM_BASE_ADDR; in reserve_mmu()
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/openbmc/u-boot/cmd/ |
H A D | bdinfo.c | 325 print_num("TLB addr", gd->arch.tlb_addr); in do_bdinfo()
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/openbmc/u-boot/drivers/ddr/altera/ |
H A D | sdram_arria10.c | 195 gd->arch.tlb_addr = 0x4000; in sdram_init_ecc_bits()
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