1ec48b6c9SMichal Simek // SPDX-License-Identifier: GPL-2.0+
2ec48b6c9SMichal Simek /*
3ec48b6c9SMichal Simek * (C) Copyright 2016 - 2018 Xilinx, Inc.
4ec48b6c9SMichal Simek * Michal Simek <michal.simek@xilinx.com>
5ec48b6c9SMichal Simek */
6ec48b6c9SMichal Simek
7ec48b6c9SMichal Simek #include <common.h>
8ec48b6c9SMichal Simek #include <asm/armv8/mmu.h>
9ec48b6c9SMichal Simek #include <asm/io.h>
10*4244f2b7SSiva Durga Prasad Paladugu #include <asm/arch/hardware.h>
11*4244f2b7SSiva Durga Prasad Paladugu #include <asm/arch/sys_proto.h>
12*4244f2b7SSiva Durga Prasad Paladugu
13*4244f2b7SSiva Durga Prasad Paladugu DECLARE_GLOBAL_DATA_PTR;
14ec48b6c9SMichal Simek
15ec48b6c9SMichal Simek static struct mm_region versal_mem_map[] = {
16ec48b6c9SMichal Simek {
17ec48b6c9SMichal Simek .virt = 0x0UL,
18ec48b6c9SMichal Simek .phys = 0x0UL,
19ec48b6c9SMichal Simek .size = 0x80000000UL,
20ec48b6c9SMichal Simek .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
21ec48b6c9SMichal Simek PTE_BLOCK_INNER_SHARE
22ec48b6c9SMichal Simek }, {
23ec48b6c9SMichal Simek .virt = 0x80000000UL,
24ec48b6c9SMichal Simek .phys = 0x80000000UL,
25ec48b6c9SMichal Simek .size = 0x70000000UL,
26ec48b6c9SMichal Simek .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
27ec48b6c9SMichal Simek PTE_BLOCK_NON_SHARE |
28ec48b6c9SMichal Simek PTE_BLOCK_PXN | PTE_BLOCK_UXN
29ec48b6c9SMichal Simek }, {
30ec48b6c9SMichal Simek .virt = 0xf0000000UL,
31ec48b6c9SMichal Simek .phys = 0xf0000000UL,
32ec48b6c9SMichal Simek .size = 0x0fe00000UL,
33ec48b6c9SMichal Simek .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
34ec48b6c9SMichal Simek PTE_BLOCK_NON_SHARE |
35ec48b6c9SMichal Simek PTE_BLOCK_PXN | PTE_BLOCK_UXN
36ec48b6c9SMichal Simek }, {
37ec48b6c9SMichal Simek .virt = 0xffe00000UL,
38ec48b6c9SMichal Simek .phys = 0xffe00000UL,
39ec48b6c9SMichal Simek .size = 0x00200000UL,
40ec48b6c9SMichal Simek .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
41ec48b6c9SMichal Simek PTE_BLOCK_INNER_SHARE
42ec48b6c9SMichal Simek }, {
43ec48b6c9SMichal Simek .virt = 0x400000000UL,
44ec48b6c9SMichal Simek .phys = 0x400000000UL,
45ec48b6c9SMichal Simek .size = 0x200000000UL,
46ec48b6c9SMichal Simek .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
47ec48b6c9SMichal Simek PTE_BLOCK_NON_SHARE |
48ec48b6c9SMichal Simek PTE_BLOCK_PXN | PTE_BLOCK_UXN
49ec48b6c9SMichal Simek }, {
50ec48b6c9SMichal Simek .virt = 0x600000000UL,
51ec48b6c9SMichal Simek .phys = 0x600000000UL,
52ec48b6c9SMichal Simek .size = 0x800000000UL,
53ec48b6c9SMichal Simek .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
54ec48b6c9SMichal Simek PTE_BLOCK_INNER_SHARE
55ec48b6c9SMichal Simek }, {
56ec48b6c9SMichal Simek .virt = 0xe00000000UL,
57ec48b6c9SMichal Simek .phys = 0xe00000000UL,
58ec48b6c9SMichal Simek .size = 0xf200000000UL,
59ec48b6c9SMichal Simek .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
60ec48b6c9SMichal Simek PTE_BLOCK_NON_SHARE |
61ec48b6c9SMichal Simek PTE_BLOCK_PXN | PTE_BLOCK_UXN
62ec48b6c9SMichal Simek }, {
63ec48b6c9SMichal Simek /* List terminator */
64ec48b6c9SMichal Simek 0,
65ec48b6c9SMichal Simek }
66ec48b6c9SMichal Simek };
67ec48b6c9SMichal Simek
68ec48b6c9SMichal Simek struct mm_region *mem_map = versal_mem_map;
69ec48b6c9SMichal Simek
get_page_table_size(void)70ec48b6c9SMichal Simek u64 get_page_table_size(void)
71ec48b6c9SMichal Simek {
72ec48b6c9SMichal Simek return 0x14000;
73ec48b6c9SMichal Simek }
74ddccf5efSMichal Simek
75*4244f2b7SSiva Durga Prasad Paladugu #if defined(CONFIG_SYS_MEM_RSVD_FOR_MMU)
reserve_mmu(void)76*4244f2b7SSiva Durga Prasad Paladugu int reserve_mmu(void)
77*4244f2b7SSiva Durga Prasad Paladugu {
78*4244f2b7SSiva Durga Prasad Paladugu tcm_init(TCM_LOCK);
79*4244f2b7SSiva Durga Prasad Paladugu gd->arch.tlb_size = PGTABLE_SIZE;
80*4244f2b7SSiva Durga Prasad Paladugu gd->arch.tlb_addr = VERSAL_TCM_BASE_ADDR;
81*4244f2b7SSiva Durga Prasad Paladugu
82*4244f2b7SSiva Durga Prasad Paladugu return 0;
83*4244f2b7SSiva Durga Prasad Paladugu }
84*4244f2b7SSiva Durga Prasad Paladugu #endif
85*4244f2b7SSiva Durga Prasad Paladugu
86ddccf5efSMichal Simek #if defined(CONFIG_OF_BOARD)
board_fdt_blob_setup(void)87ddccf5efSMichal Simek void *board_fdt_blob_setup(void)
88ddccf5efSMichal Simek {
89ddccf5efSMichal Simek static void *fw_dtb = (void *)CONFIG_VERSAL_OF_BOARD_DTB_ADDR;
90ddccf5efSMichal Simek
91ddccf5efSMichal Simek if (fdt_magic(fw_dtb) != FDT_MAGIC) {
92ddccf5efSMichal Simek printf("DTB is not passed via %llx\n", (u64)fw_dtb);
93ddccf5efSMichal Simek return NULL;
94ddccf5efSMichal Simek }
95ddccf5efSMichal Simek
96ddccf5efSMichal Simek return fw_dtb;
97ddccf5efSMichal Simek }
98ddccf5efSMichal Simek #endif
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