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Searched refs:tgcr (Results 1 – 6 of 6) sorted by relevance

/openbmc/linux/drivers/watchdog/
H A Ddavinci_wdt.c72 u32 tgcr; in davinci_wdt_start() local
83 tgcr = TIMMODE_64BIT_WDOG | TIM12RS_UNRESET | TIM34RS_UNRESET; in davinci_wdt_start()
84 iowrite32(tgcr, davinci_wdt->base + TGCR); in davinci_wdt_start()
146 u32 tgcr, wdtcr; in davinci_wdt_restart() local
152 tgcr = 0; in davinci_wdt_restart()
153 iowrite32(tgcr, davinci_wdt->base + TGCR); in davinci_wdt_restart()
154 tgcr = TIMMODE_64BIT_WDOG | TIM12RS_UNRESET | TIM34RS_UNRESET; in davinci_wdt_restart()
155 iowrite32(tgcr, davinci_wdt->base + TGCR); in davinci_wdt_restart()
/openbmc/u-boot/arch/arm/mach-davinci/
H A Dtimer.c41 writel(0x0, &timer->tgcr); in timer_init()
42 writel(0x06 | ((TIM_CLK_DIV - 1) << 8), &timer->tgcr); in timer_init()
108 writel(0x0, &wdttimer->tgcr); in davinci_hw_watchdog_enable()
110 writel(0x08 | 0x03 | ((TIM_CLK_DIV - 1) << 8), &wdttimer->tgcr); in davinci_hw_watchdog_enable()
H A Dreset.c18 writel(0x08, &wdttimer->tgcr); in reset_cpu()
19 writel(readl(&wdttimer->tgcr) | 0x03, &wdttimer->tgcr); in reset_cpu()
/openbmc/u-boot/arch/arm/mach-davinci/include/mach/
H A Dtimer_defs.h19 u_int32_t tgcr; member
/openbmc/linux/drivers/input/touchscreen/
H A Dfsl-imx25-tcq.c370 u32 tgcr; in mx25_tcq_init() local
378 regmap_read(priv->core_regs, MX25_TSC_TGCR, &tgcr); in mx25_tcq_init()
379 ipg_div = max_t(unsigned int, 4, MX25_TGCR_GET_ADCCLK(tgcr)); in mx25_tcq_init()
/openbmc/u-boot/
H A DREADME4490 …tgcr @ 0xfff00980, tmr @ 0xfff00990, trr @ 0xfff00994, tcr @ 0xfff00998, tcn @ 0xfff0099c, ter @ 0…
4497 tgcr=0x1, tmr=0xff1c, trr=0x3d09, tcr=0x0, tcn=0xef6, ter=0x0
4500 tgcr=0x1, tmr=0xff1c, trr=0x3d09, tcr=0x0, tcn=0x2ad4, ter=0x0
4503 tgcr=0x1, tmr=0xff1c, trr=0x3d09, tcr=0x0, tcn=0x1efc, ter=0x0
4506 tgcr=0x1, tmr=0xff1c, trr=0x3d09, tcr=0x0, tcn=0x169d, ter=0x0