1*83d290c5STom Rini // SPDX-License-Identifier: GPL-2.0+
2601fbec7SMasahiro Yamada /*
3601fbec7SMasahiro Yamada * Processor reset using WDT.
4601fbec7SMasahiro Yamada *
5601fbec7SMasahiro Yamada * Copyright (C) 2012 Dmitry Bondar <bond@inmys.ru>
6601fbec7SMasahiro Yamada * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
7601fbec7SMasahiro Yamada */
8601fbec7SMasahiro Yamada
9601fbec7SMasahiro Yamada #include <common.h>
10601fbec7SMasahiro Yamada #include <asm/io.h>
11601fbec7SMasahiro Yamada #include <asm/arch/timer_defs.h>
12601fbec7SMasahiro Yamada #include <asm/arch/hardware.h>
13601fbec7SMasahiro Yamada
reset_cpu(unsigned long a)14601fbec7SMasahiro Yamada void reset_cpu(unsigned long a)
15601fbec7SMasahiro Yamada {
16601fbec7SMasahiro Yamada struct davinci_timer *const wdttimer =
17601fbec7SMasahiro Yamada (struct davinci_timer *)DAVINCI_WDOG_BASE;
18601fbec7SMasahiro Yamada writel(0x08, &wdttimer->tgcr);
19601fbec7SMasahiro Yamada writel(readl(&wdttimer->tgcr) | 0x03, &wdttimer->tgcr);
20601fbec7SMasahiro Yamada writel(0, &wdttimer->tim12);
21601fbec7SMasahiro Yamada writel(0, &wdttimer->tim34);
22601fbec7SMasahiro Yamada writel(0, &wdttimer->prd12);
23601fbec7SMasahiro Yamada writel(0, &wdttimer->prd34);
24601fbec7SMasahiro Yamada writel(readl(&wdttimer->tcr) | 0x40, &wdttimer->tcr);
25601fbec7SMasahiro Yamada writel(readl(&wdttimer->wdtcr) | 0x4000, &wdttimer->wdtcr);
26601fbec7SMasahiro Yamada writel(0xa5c64000, &wdttimer->wdtcr);
27601fbec7SMasahiro Yamada writel(0xda7e4000, &wdttimer->wdtcr);
28601fbec7SMasahiro Yamada writel(0x4000, &wdttimer->wdtcr);
29601fbec7SMasahiro Yamada while (1)
30601fbec7SMasahiro Yamada /*nothing*/;
31601fbec7SMasahiro Yamada }
32