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Searched refs:tcg_global_mem_new_i32 (Results 1 – 17 of 17) sorted by relevance

/openbmc/qemu/target/sh4/
H A Dtranslate.c98 cpu_gregs[i] = tcg_global_mem_new_i32(tcg_env, in sh4_translate_init()
104 cpu_pc = tcg_global_mem_new_i32(tcg_env, in sh4_translate_init()
106 cpu_sr = tcg_global_mem_new_i32(tcg_env, in sh4_translate_init()
108 cpu_sr_m = tcg_global_mem_new_i32(tcg_env, in sh4_translate_init()
110 cpu_sr_q = tcg_global_mem_new_i32(tcg_env, in sh4_translate_init()
112 cpu_sr_t = tcg_global_mem_new_i32(tcg_env, in sh4_translate_init()
114 cpu_ssr = tcg_global_mem_new_i32(tcg_env, in sh4_translate_init()
116 cpu_spc = tcg_global_mem_new_i32(tcg_env, in sh4_translate_init()
118 cpu_gbr = tcg_global_mem_new_i32(tcg_env, in sh4_translate_init()
120 cpu_vbr = tcg_global_mem_new_i32(tcg_env, in sh4_translate_init()
[all …]
/openbmc/qemu/target/avr/
H A Dtranslate.c129 cpu_pc = tcg_global_mem_new_i32(tcg_env, AVR_REG_OFFS(pc_w), "pc"); in avr_cpu_tcg_init()
130 cpu_Cf = tcg_global_mem_new_i32(tcg_env, AVR_REG_OFFS(sregC), "Cf"); in avr_cpu_tcg_init()
131 cpu_Zf = tcg_global_mem_new_i32(tcg_env, AVR_REG_OFFS(sregZ), "Zf"); in avr_cpu_tcg_init()
132 cpu_Nf = tcg_global_mem_new_i32(tcg_env, AVR_REG_OFFS(sregN), "Nf"); in avr_cpu_tcg_init()
133 cpu_Vf = tcg_global_mem_new_i32(tcg_env, AVR_REG_OFFS(sregV), "Vf"); in avr_cpu_tcg_init()
134 cpu_Sf = tcg_global_mem_new_i32(tcg_env, AVR_REG_OFFS(sregS), "Sf"); in avr_cpu_tcg_init()
135 cpu_Hf = tcg_global_mem_new_i32(tcg_env, AVR_REG_OFFS(sregH), "Hf"); in avr_cpu_tcg_init()
136 cpu_Tf = tcg_global_mem_new_i32(tcg_env, AVR_REG_OFFS(sregT), "Tf"); in avr_cpu_tcg_init()
137 cpu_If = tcg_global_mem_new_i32(tcg_env, AVR_REG_OFFS(sregI), "If"); in avr_cpu_tcg_init()
138 cpu_rampD = tcg_global_mem_new_i32(tcg_env, AVR_REG_OFFS(rampD), "rampD"); in avr_cpu_tcg_init()
[all …]
/openbmc/qemu/target/xtensa/
H A Dtranslate.c155 cpu_pc = tcg_global_mem_new_i32(tcg_env, in xtensa_translate_init()
159 cpu_R[i] = tcg_global_mem_new_i32(tcg_env, in xtensa_translate_init()
165 cpu_FR[i] = tcg_global_mem_new_i32(tcg_env, in xtensa_translate_init()
179 cpu_MR[i] = tcg_global_mem_new_i32(tcg_env, in xtensa_translate_init()
186 cpu_BR[i] = tcg_global_mem_new_i32(tcg_env, in xtensa_translate_init()
191 cpu_BR4[i / 4] = tcg_global_mem_new_i32(tcg_env, in xtensa_translate_init()
197 cpu_BR8[i / 8] = tcg_global_mem_new_i32(tcg_env, in xtensa_translate_init()
206 cpu_SR[i] = tcg_global_mem_new_i32(tcg_env, in xtensa_translate_init()
215 cpu_UR[i] = tcg_global_mem_new_i32(tcg_env, in xtensa_translate_init()
223 tcg_global_mem_new_i32(tcg_env, in xtensa_translate_init()
[all …]
/openbmc/qemu/include/tcg/
H A Dtcg-op.h54 #define tcg_global_mem_new tcg_global_mem_new_i32
H A Dtcg-op-common.h27 TCGv_i32 tcg_global_mem_new_i32(TCGv_ptr reg, intptr_t off, const char *name);
/openbmc/qemu/target/openrisc/
H A Dtranslate.c99 cpu_dflag = tcg_global_mem_new_i32(tcg_env, in openrisc_translate_init()
120 fpcsr = tcg_global_mem_new_i32(tcg_env, in openrisc_translate_init()
/openbmc/qemu/target/rx/
H A Dtranslate.c2269 cpu_##sym = tcg_global_mem_new_i32(tcg_env, \
2281 cpu_regs[i] = tcg_global_mem_new_i32(tcg_env, in rx_translate_init()
/openbmc/qemu/target/arm/tcg/
H A Dtranslate.c65 cpu_R[i] = tcg_global_mem_new_i32(tcg_env, in arm_translate_init()
69 cpu_CF = tcg_global_mem_new_i32(tcg_env, offsetof(CPUARMState, CF), "CF"); in arm_translate_init()
70 cpu_NF = tcg_global_mem_new_i32(tcg_env, offsetof(CPUARMState, NF), "NF"); in arm_translate_init()
71 cpu_VF = tcg_global_mem_new_i32(tcg_env, offsetof(CPUARMState, VF), "VF"); in arm_translate_init()
72 cpu_ZF = tcg_global_mem_new_i32(tcg_env, offsetof(CPUARMState, ZF), "ZF"); in arm_translate_init()
/openbmc/qemu/target/m68k/
H A Dtranslate.c71 QREG_##name = tcg_global_mem_new_i32(tcg_env, \ in m68k_tcg_init()
80 cpu_halted = tcg_global_mem_new_i32(tcg_env, in m68k_tcg_init()
83 cpu_exception_index = tcg_global_mem_new_i32(tcg_env, in m68k_tcg_init()
/openbmc/qemu/target/microblaze/
H A Dtranslate.c1871 tcg_global_mem_new_i32(tcg_env, i32s[i].ofs, i32s[i].name); in mb_tcg_init()
/openbmc/qemu/target/ppc/
H A Dtranslate.c94 cpu_crf[i] = tcg_global_mem_new_i32(tcg_env, in ppc_translate_init()
162 cpu_access_type = tcg_global_mem_new_i32(tcg_env, in ppc_translate_init()
/openbmc/qemu/target/i386/tcg/
H A Dtranslate.c3587 cpu_cc_op = tcg_global_mem_new_i32(tcg_env, in tcg_x86_init()
/openbmc/qemu/target/mips/tcg/
H A Dtranslate.c15286 hflags = tcg_global_mem_new_i32(tcg_env, in mips_tcg_init()
15289 fpu_fcr0 = tcg_global_mem_new_i32(tcg_env, in mips_tcg_init()
15292 fpu_fcr31 = tcg_global_mem_new_i32(tcg_env, in mips_tcg_init()
/openbmc/qemu/target/hppa/
H A Dtranslate.c320 cpu_psw_xb = tcg_global_mem_new_i32(tcg_env, in hppa_translate_init()
/openbmc/qemu/tcg/
H A Dtcg.c1629 TCGv_i32 tcg_global_mem_new_i32(TCGv_ptr reg, intptr_t off, const char *name) in tcg_global_mem_new_i32() function
/openbmc/qemu/target/sparc/
H A Dtranslate.c5864 *r32[i].ptr = tcg_global_mem_new_i32(tcg_env, r32[i].off, r32[i].name); in sparc_tcg_init()
/openbmc/qemu/target/s390x/tcg/
H A Dtranslate.c209 cc_op = tcg_global_mem_new_i32(tcg_env, offsetof(CPUS390XState, cc_op), in s390x_translate_init()