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Searched refs:tcg_gen_xor_i32 (Results 1 – 17 of 17) sorted by relevance

/openbmc/qemu/target/riscv/insn_trans/
H A Dtrans_rvk.c.inc158 tcg_gen_xor_i32(t1, t1, t2);
160 tcg_gen_xor_i32(t1, t1, t2);
345 tcg_gen_xor_i32(t1, t0, t1);
347 tcg_gen_xor_i32(t1, t1, t0);
/openbmc/qemu/target/sh4/
H A Dtranslate.c716 tcg_gen_xor_i32(t1, result, Rn); in _decode_opc()
717 tcg_gen_xor_i32(t2, Rm, Rn); in _decode_opc()
745 tcg_gen_xor_i32(cmp2, REG(B7_4), REG(B11_8)); in _decode_opc()
755 tcg_gen_xor_i32(cpu_sr_t, cpu_sr_q, cpu_sr_m); /* SR_T */ in _decode_opc()
774 tcg_gen_xor_i32(t1, cpu_sr_q, cpu_sr_m); in _decode_opc()
782 tcg_gen_xor_i32(t1, t1, t0); in _decode_opc()
784 tcg_gen_xor_i32(cpu_sr_q, cpu_sr_m, t1); in _decode_opc()
944 tcg_gen_xor_i32(t1, result, Rn); in _decode_opc()
945 tcg_gen_xor_i32(t2, Rn, Rm); in _decode_opc()
959 tcg_gen_xor_i32(REG(B11_8), REG(B11_8), REG(B7_4)); in _decode_opc()
[all …]
/openbmc/qemu/target/rx/
H A Dtranslate.c287 tcg_gen_xor_i32(dc->temp, cpu_psw_o, cpu_psw_s); in psw_cond()
293 tcg_gen_xor_i32(dc->temp, cpu_psw_o, cpu_psw_s); in psw_cond()
892 tcg_gen_xor_i32(cpu_psw_s, arg1, arg2); in rx_xor()
972 tcg_gen_xor_i32(cpu_psw_o, cpu_psw_s, arg1); in rx_adc()
973 tcg_gen_xor_i32(cpu_psw_z, arg1, arg2); in rx_adc()
1009 tcg_gen_xor_i32(cpu_psw_o, cpu_psw_s, arg1); in rx_add()
1010 tcg_gen_xor_i32(cpu_psw_z, arg1, arg2); in rx_add()
1044 tcg_gen_xor_i32(cpu_psw_o, cpu_psw_s, arg1); in rx_sub()
1045 tcg_gen_xor_i32(cpu_psw_z, arg1, arg2); in rx_sub()
1930 tcg_gen_xor_i32(val, val, mask); in rx_bnotm()
[all …]
/openbmc/qemu/target/m68k/
H A Dtranslate.c550 tcg_gen_xor_i32(t1, QREG_CC_N, QREG_CC_V); in gen_flush_flags()
551 tcg_gen_xor_i32(QREG_CC_V, QREG_CC_V, t0); in gen_flush_flags()
565 tcg_gen_xor_i32(t1, QREG_CC_N, t0); in gen_flush_flags()
566 tcg_gen_xor_i32(QREG_CC_V, QREG_CC_V, t0); in gen_flush_flags()
578 tcg_gen_xor_i32(t0, QREG_CC_Z, QREG_CC_N); in gen_flush_flags()
579 tcg_gen_xor_i32(QREG_CC_V, QREG_CC_V, QREG_CC_N); in gen_flush_flags()
1332 tcg_gen_xor_i32(tmp, QREG_CC_N, QREG_CC_V); in gen_cc_cond()
1340 tcg_gen_xor_i32(tmp2, QREG_CC_N, QREG_CC_V); in gen_cc_cond()
1630 tcg_gen_xor_i32(t0, t0, dest); in bcd_add()
1638 tcg_gen_xor_i32(t0, t0, t1); in bcd_add()
[all …]
/openbmc/qemu/target/arm/tcg/
H A Dtranslate.c449 tcg_gen_xor_i32(tmp, t0, t1); in gen_add16()
454 tcg_gen_xor_i32(dest, t0, tmp); in gen_add16()
486 tcg_gen_xor_i32(cpu_VF, cpu_NF, t0); in gen_add_CC()
487 tcg_gen_xor_i32(tmp, t0, t1); in gen_add_CC()
511 tcg_gen_xor_i32(cpu_VF, cpu_NF, t0); in gen_adc_CC()
512 tcg_gen_xor_i32(tmp, t0, t1); in gen_adc_CC()
524 tcg_gen_xor_i32(cpu_VF, cpu_NF, t0); in gen_sub_CC()
526 tcg_gen_xor_i32(tmp, t0, t1); in gen_sub_CC()
693 tcg_gen_xor_i32(value, cpu_VF, cpu_NF); in arm_test_cc()
702 tcg_gen_xor_i32(value, cpu_VF, cpu_NF); in arm_test_cc()
[all …]
H A Dgengvec64.c79 tcg_gen_xor_i32(d, n, m); in gen_xar_i32()
H A Dtranslate-vfp.c397 tcg_gen_xor_i32(tmp, cpu_VF, cpu_NF); in trans_VSEL()
403 tcg_gen_xor_i32(tmp, cpu_VF, cpu_NF); in trans_VSEL()
H A Dtranslate-a64.c826 tcg_gen_xor_i32(cpu_VF, cpu_NF, t0_32); in gen_add32_CC()
827 tcg_gen_xor_i32(tmp, t0_32, t1_32); in gen_add32_CC()
876 tcg_gen_xor_i32(cpu_VF, cpu_NF, t0_32); in gen_sub32_CC()
878 tcg_gen_xor_i32(tmp, t0_32, t1_32); in gen_sub32_CC()
939 tcg_gen_xor_i32(cpu_VF, cpu_NF, t0_32); in gen_adc_CC()
940 tcg_gen_xor_i32(tmp, t0_32, t1_32); in gen_adc_CC()
7972 tcg_gen_xor_i32(cpu_VF, cpu_VF, cpu_NF); in disas_evaluate_into_flags()
/openbmc/qemu/tcg/
H A Dtcg-op.c439 void tcg_gen_xor_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2) in tcg_gen_xor_i32() function
453 tcg_gen_xor_i32(ret, arg1, tcg_constant_i32(arg2)); in tcg_gen_xori_i32()
671 tcg_gen_xor_i32(ret, arg1, arg2); in tcg_gen_eqv_i32()
790 tcg_gen_xor_i32(t, t, arg); in tcg_gen_clrsb_i32()
1419 tcg_gen_xor_i32(ret, a, t); in tcg_gen_abs_i32()
1669 tcg_gen_xor_i32(TCGV_LOW(ret), TCGV_LOW(arg1), TCGV_LOW(arg2)); in tcg_gen_xor_i64()
1670 tcg_gen_xor_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), TCGV_HIGH(arg2)); in tcg_gen_xor_i64()
H A Dtcg-op-gvec.c1887 tcg_gen_xor_i32(t3, a, b); in tcg_gen_vec_add8_i32()
1890 tcg_gen_xor_i32(d, d, t3); in tcg_gen_vec_add8_i32()
2073 tcg_gen_xor_i32(d, d, t3); in tcg_gen_vec_sub8_i32()
/openbmc/qemu/include/tcg/
H A Dtcg-op.h308 #define tcg_gen_xor_tl tcg_gen_xor_i32
H A Dtcg-op-common.h175 void tcg_gen_xor_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
/openbmc/qemu/target/sparc/
H A Dtranslate.c803 tcg_gen_xor_i32(t, src1, src2); in gen_op_fpadds32s()
804 tcg_gen_xor_i32(v, r, src2); in gen_op_fpadds32s()
821 tcg_gen_xor_i32(t, src1, src2); in gen_op_fpsubs32s()
822 tcg_gen_xor_i32(v, r, src1); in gen_op_fpsubs32s()
5029 TRANS(FXORs, VIS1, do_fff, a, tcg_gen_xor_i32) in TRANS()
/openbmc/qemu/target/microblaze/
H A Dtranslate.c622 DO_TYPEA(xor, false, tcg_gen_xor_i32) in DO_TYPEA() argument
/openbmc/qemu/target/ppc/
H A Dtranslate.c3867 GEN_CRLOGIC(crxor, tcg_gen_xor_i32, 0x06);
6050 GEN_CRLOGIC(crxor, tcg_gen_xor_i32, 0x06),
/openbmc/qemu/target/xtensa/
H A Dtranslate.c1432 [BOOLEAN_XOR] = tcg_gen_xor_i32, in translate_boolean()
2630 tcg_gen_xor_i32(arg[0].out, arg[1].in, arg[2].in); in translate_xor()
/openbmc/qemu/target/mips/tcg/
H A Dmxu_translate.c1827 tcg_gen_xor_i32(mxu_gpr[XRa - 1], mxu_gpr[XRb - 1], mxu_gpr[XRc - 1]); in gen_mxu_S32XOR()