/openbmc/qemu/include/tcg/ |
H A D | tcg-op.h | 295 #define tcg_gen_st32_tl tcg_gen_st_i32 296 #define tcg_gen_st_tl tcg_gen_st_i32
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H A D | tcg-op-common.h | 169 void tcg_gen_st_i32(TCGv_i32 arg1, TCGv_ptr arg2, tcg_target_long offset);
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/openbmc/qemu/tcg/ |
H A D | tcg-op-gvec.c | 620 tcg_gen_st_i32(t_32, tcg_env, dofs + i); in do_dup() 729 tcg_gen_st_i32(t1, tcg_env, dofs + i); in expand_2_i32() 749 tcg_gen_st_i32(t1, tcg_env, dofs + i); in expand_2i_i32() 770 tcg_gen_st_i32(t1, tcg_env, dofs + i); in expand_2s_i32() 793 tcg_gen_st_i32(t2, tcg_env, dofs + i); in expand_3_i32() 817 tcg_gen_st_i32(t2, tcg_env, dofs + i); in expand_3i_i32() 819 tcg_gen_st_i32(t0, tcg_env, aofs + i); in expand_3i_i32() 843 tcg_gen_st_i32(t0, tcg_env, dofs + i); in expand_4_i32() 845 tcg_gen_st_i32(t1, tcg_env, aofs + i); in expand_4_i32() 870 tcg_gen_st_i32(t0, tcg_env, dofs + i); in expand_4i_i32() [all …]
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H A D | tcg-op.c | 1459 void tcg_gen_st_i32(TCGv_i32 arg1, TCGv_ptr arg2, tcg_target_long offset) in tcg_gen_st_i32() function 1607 tcg_gen_st_i32(TCGV_LOW(arg1), arg2, offset); in tcg_gen_st32_i64() 1616 tcg_gen_st_i32(TCGV_HIGH(arg1), arg2, offset); in tcg_gen_st_i64() 1617 tcg_gen_st_i32(TCGV_LOW(arg1), arg2, offset + 4); in tcg_gen_st_i64() 1619 tcg_gen_st_i32(TCGV_LOW(arg1), arg2, offset); in tcg_gen_st_i64() 1620 tcg_gen_st_i32(TCGV_HIGH(arg1), arg2, offset + 4); in tcg_gen_st_i64()
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H A D | tcg-op-ldst.c | 185 tcg_gen_st_i32(val, tcg_env, in plugin_gen_mem_callbacks_i32()
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/openbmc/qemu/target/microblaze/ |
H A D | translate.c | 116 tcg_gen_st_i32(tmp, tcg_env, offsetof(CPUMBState, esr)); in gen_raise_hw_excp() 1232 tcg_gen_st_i32(tcg_constant_i32(1), tcg_env, in trans_mbar() 1381 tcg_gen_st_i32(src, tcg_env, offsetof(CPUMBState, fsr)); in trans_mts() 1384 tcg_gen_st_i32(src, tcg_env, offsetof(CPUMBState, slr)); in trans_mts() 1387 tcg_gen_st_i32(src, tcg_env, offsetof(CPUMBState, shr)); in trans_mts()
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/openbmc/qemu/target/loongarch/tcg/insn_trans/ |
H A D | trans_fmov.c.inc | 107 tcg_gen_st_i32(fcsr0, tcg_env, offsetof(CPULoongArchState, fcsr0));
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/openbmc/qemu/target/arm/tcg/ |
H A D | translate.h | 367 tcg_gen_st_i32(p, tcg_env, offsetof(CPUARMState, pstate)); in set_pstate_bits() 379 tcg_gen_st_i32(p, tcg_env, offsetof(CPUARMState, pstate)); in clear_pstate_bits()
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H A D | translate.c | 184 tcg_gen_st_i32(var, tcg_env, offset); in store_cpu_offset() 1242 tcg_gen_st_i32(src, tcg_env, off); in write_neon_element32() 1286 tcg_gen_st_i32(var, tcg_env, offsetof(CPUARMState, iwmmxt.cregs[reg])); in iwmmxt_store_creg()
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H A D | translate-vfp.c | 48 tcg_gen_st_i32(var, tcg_env, vfp_reg_offset(false, reg)); in vfp_store_reg32()
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H A D | translate-neon.c | 92 tcg_gen_st_i32(var, tcg_env, offset); in neon_store_element()
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/openbmc/qemu/target/ppc/translate/ |
H A D | storage-ctrl-impl.c.inc | 248 tcg_gen_st_i32(t1, tcg_env, offsetof(CPUPPCState, tlb_need_flush));
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H A D | vsx-impl.c.inc | 1695 tcg_gen_st_i32(imm, tcg_env, 1697 tcg_gen_st_i32(imm, tcg_env,
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H A D | vmx-impl.c.inc | 645 tcg_gen_st_i32(tmp, tcg_env,
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/openbmc/qemu/target/i386/tcg/ |
H A D | emit.c.inc | 1593 tcg_gen_st_i32(tcg_constant_i32(1), tcg_env, offsetof(CPUX86State, df)); 3194 tcg_gen_st_i32(imm_v, tcg_env, offsetof(CPUX86State, xmm_t0.ZMM_L(0))); 4043 tcg_gen_st_i32(tcg_constant_i32(-1), tcg_env, offsetof(CPUX86State, df)); 4387 tcg_gen_st_i32(s->tmp2_i32, tcg_env, 4396 tcg_gen_st_i32(zero, tcg_env, 4538 tcg_gen_st_i32(s->tmp2_i32, OP_PTR0, offsetof(ZMMReg, ZMM_L(0))); 4547 tcg_gen_st_i32(s->tmp2_i32, OP_PTR0, offsetof(ZMMReg, ZMM_L(0)));
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H A D | translate.c | 2111 tcg_gen_st_i32(t, tcg_env, offsetof(CPUX86State, hflags)); in gen_set_hflag() 2122 tcg_gen_st_i32(t, tcg_env, offsetof(CPUX86State, hflags)); in gen_reset_hflag()
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/openbmc/qemu/target/alpha/ |
H A D | translate.c | 1136 tcg_gen_st_i32(tcg_constant_i32(1), tcg_env, in gen_call_pal() 1274 tcg_gen_st_i32(tcg_constant_i32(1), tcg_env, in gen_mtpr()
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/openbmc/qemu/target/riscv/ |
H A D | translate.c | 256 tcg_gen_st_i32(tcg_constant_i32(ctx->opcode), tcg_env, in gen_exception_illegal()
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/openbmc/qemu/target/sparc/ |
H A D | translate.c | 255 tcg_gen_st_i32(v, tcg_env, gen_offset_fpr_F(dst)); in gen_store_fpr_F() 1305 tcg_gen_st_i32(tcg_constant_i32(0), tcg_env, in gen_op_clear_ieee_excp_and_FTT() 1463 tcg_gen_st_i32(tcg_constant_i32(ftt), tcg_env, in gen_op_fpexception_im() 4595 tcg_gen_st_i32(tcg_constant_i32(0), tcg_env, in TRANS()
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/openbmc/qemu/target/s390x/tcg/ |
H A D | translate.c | 407 tcg_gen_st_i32(tcg_constant_i32(code), tcg_env, in gen_program_exception() 410 tcg_gen_st_i32(tcg_constant_i32(s->ilen), tcg_env, in gen_program_exception() 4581 tcg_gen_st_i32(t, tcg_env, offsetof(CPUS390XState, int_svc_code)); in op_svc() 4584 tcg_gen_st_i32(t, tcg_env, offsetof(CPUS390XState, int_svc_ilen)); in op_svc()
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H A D | translate_vx.c.inc | 161 tcg_gen_st_i32(src, tcg_env, offs);
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/openbmc/qemu/target/ppc/ |
H A D | translate.c | 1029 tcg_gen_st_i32(t0, tcg_env, offsetof(CPUPPCState, spe_fscr)); in spr_write_spefscr() 1963 tcg_gen_st_i32(t0, tcg_env, in gen_pause() 3346 tcg_gen_st_i32(t0, tcg_env, in gen_wait()
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/openbmc/qemu/target/hppa/ |
H A D | translate.c | 471 tcg_gen_st_i32(val, tcg_env, in save_frw_i32() 2858 tcg_gen_st_i32(tcg_constant_i32(1), tcg_env, in trans_or()
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/openbmc/qemu/target/m68k/ |
H A D | translate.c | 277 tcg_gen_st_i32(tcg_constant_i32(this_pc), tcg_env, in gen_raise_exception_format2() 4500 tcg_gen_st_i32(AREG(insn, 0), tcg_env, in DISAS_INSN()
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/openbmc/qemu/target/mips/tcg/ |
H A D | translate.c | 1335 tcg_gen_st_i32(tcg_constant_i32(code), tcg_env, in generate_exception_break() 4284 tcg_gen_st_i32(tcg_constant_i32(code), tcg_env, in gen_trap() 4329 tcg_gen_st_i32(tcg_constant_i32(code), tcg_env, in gen_trap() 4899 tcg_gen_st_i32(t0, tcg_env, off); in gen_mtc0_store32()
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