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Searched refs:tcg_gen_shr_i32 (Results 1 – 11 of 11) sorted by relevance

/openbmc/qemu/include/tcg/
H A Dtcg-op.h313 #define tcg_gen_shr_tl tcg_gen_shr_i32
H A Dtcg-op-common.h177 void tcg_gen_shr_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
/openbmc/qemu/tcg/
H A Dtcg-op.c481 void tcg_gen_shr_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2) in tcg_gen_shr_i32() function
492 tcg_gen_shr_i32(ret, arg1, tcg_constant_i32(arg2)); in tcg_gen_shri_i32()
825 tcg_gen_shr_i32(t1, arg1, t1); in tcg_gen_rotl_i32()
861 tcg_gen_shr_i32(t0, arg1, arg2); in tcg_gen_rotr_i32()
H A Dtcg-op-gvec.c3287 .fni4 = tcg_gen_shr_i32, in tcg_gen_gvec_shrs()
3449 tcg_gen_shr_i32(d, a, t); in tcg_gen_shr_mod_i32()
/openbmc/qemu/target/m68k/
H A Dtranslate.c3647 tcg_gen_shr_i32(shr, reg, shr); in rotate_x()
3941 tcg_gen_shr_i32(dst, tmp, shift); in DISAS_INSN()
4041 tcg_gen_shr_i32(mask, tcg_constant_i32(0x7fffffffu), tmp); in DISAS_INSN()
/openbmc/qemu/target/microblaze/
H A Dtranslate.c357 tcg_gen_shr_i32(out, ina, tmp); in gen_bsrl()
/openbmc/qemu/target/ppc/translate/
H A Dspe-impl.c.inc168 tcg_gen_shr_i32(ret, arg1, t0);
/openbmc/qemu/target/sh4/
H A Dtranslate.c911 tcg_gen_shr_i32(t2, REG(B11_8), t0); in _decode_opc()
/openbmc/qemu/target/rx/
H A Dtranslate.c1365 tcg_gen_shr_i32, tcg_gen_sar_i32, in shiftr_reg()
/openbmc/qemu/target/arm/tcg/
H A Dgengvec.c1029 tcg_gen_shr_i32(rval, src, rsh); in gen_ushl_i32()
/openbmc/qemu/target/xtensa/
H A Dtranslate.c1384 tcg_gen_shr_i32(tmp, tcg_constant_i32(0x80000000u), tmp); in translate_bb()
2334 tcg_gen_shr_i32(arg[0].out, arg[1].in, cpu_SR[SAR]); in translate_srl()