/openbmc/qemu/target/rx/ |
H A D | translate.c | 329 tcg_gen_mov_i32(ret, cpu_sp); in move_from_cr() 331 tcg_gen_mov_i32(ret, cpu_usp); in move_from_cr() 335 tcg_gen_mov_i32(ret, cpu_fpsw); in move_from_cr() 338 tcg_gen_mov_i32(ret, cpu_bpsw); in move_from_cr() 341 tcg_gen_mov_i32(ret, cpu_bpc); in move_from_cr() 345 tcg_gen_mov_i32(ret, cpu_isp); in move_from_cr() 347 tcg_gen_mov_i32(ret, cpu_sp); in move_from_cr() 351 tcg_gen_mov_i32(ret, cpu_fintv); in move_from_cr() 354 tcg_gen_mov_i32(ret, cpu_intb); in move_from_cr() 383 tcg_gen_mov_i32(cpu_sp, val); in move_to_cr() [all …]
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/openbmc/qemu/target/sh4/ |
H A D | translate.c | 255 tcg_gen_mov_i32(cpu_pc, cpu_delayed_pc); in gen_jump() 303 tcg_gen_mov_i32(ds, cpu_delayed_cond); in gen_delayed_conditional_jump() 434 tcg_gen_mov_i32(cpu_delayed_pc, cpu_pr); in _decode_opc() 456 tcg_gen_mov_i32(cpu_delayed_pc, cpu_spc); in _decode_opc() 558 tcg_gen_mov_i32(REG(B11_8), REG(B7_4)); in _decode_opc() 588 tcg_gen_mov_i32(REG(B11_8), addr); /* modify register status */ in _decode_opc() 597 tcg_gen_mov_i32(REG(B11_8), addr); in _decode_opc() 606 tcg_gen_mov_i32(REG(B11_8), addr); in _decode_opc() 720 tcg_gen_mov_i32(Rn, result); in _decode_opc() 948 tcg_gen_mov_i32(Rn, result); in _decode_opc() [all …]
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/openbmc/qemu/target/m68k/ |
H A D | translate.c | 141 tcg_gen_mov_i32(s->writeback[regno], val); in delay_set_areg() 150 tcg_gen_mov_i32(tmp, val); in delay_set_areg() 162 tcg_gen_mov_i32(cpu_aregs[regno], s->writeback[regno]); in do_writebacks() 259 tcg_gen_mov_i32(QREG_PC, dest); in gen_jmp() 543 tcg_gen_mov_i32(QREG_CC_C, QREG_CC_X); in gen_flush_flags() 544 tcg_gen_mov_i32(QREG_CC_Z, QREG_CC_N); in gen_flush_flags() 558 tcg_gen_mov_i32(QREG_CC_C, QREG_CC_X); in gen_flush_flags() 559 tcg_gen_mov_i32(QREG_CC_Z, QREG_CC_N); in gen_flush_flags() 581 tcg_gen_mov_i32(QREG_CC_N, QREG_CC_Z); in gen_flush_flags() 585 tcg_gen_mov_i32(QREG_CC_Z, QREG_CC_N); in gen_flush_flags() [all …]
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/openbmc/qemu/tcg/ |
H A D | tcg-op.c | 338 void tcg_gen_mov_i32(TCGv_i32 ret, TCGv_i32 arg) in tcg_gen_mov_i32() function 347 tcg_gen_mov_i32(ret, tcg_constant_i32(arg)); in tcg_gen_movi_i32() 359 tcg_gen_mov_i32(ret, arg1); in tcg_gen_addi_i32() 402 tcg_gen_mov_i32(ret, arg1); in tcg_gen_andi_i32() 433 tcg_gen_mov_i32(ret, arg1); in tcg_gen_ori_i32() 448 tcg_gen_mov_i32(ret, arg1); in tcg_gen_xori_i32() 475 tcg_gen_mov_i32(ret, arg1); in tcg_gen_shli_i32() 490 tcg_gen_mov_i32(ret, arg1); in tcg_gen_shri_i32() 505 tcg_gen_mov_i32(ret, arg1); in tcg_gen_sari_i32() 837 tcg_gen_mov_i32(ret, arg1); in tcg_gen_rotli_i32() [all …]
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H A D | tcg-op-ldst.c | 806 tcg_gen_mov_i32(ret, val); in tcg_gen_ext_i32() 894 tcg_gen_mov_i32(retv, t1); in tcg_gen_nonatomic_cmpxchg_i32_int() 1310 tcg_gen_mov_i32(r, b); in tcg_gen_mov2_i32()
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H A D | tcg-op-gvec.c | 413 tcg_gen_mov_i32(out, in); in tcg_gen_dup_i32()
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/openbmc/qemu/include/tcg/ |
H A D | tcg-op.h | 285 #define tcg_gen_mov_tl tcg_gen_mov_i32 330 #define tcg_gen_trunc_tl_i32 tcg_gen_mov_i32 332 #define tcg_gen_extu_i32_tl tcg_gen_mov_i32 333 #define tcg_gen_ext_i32_tl tcg_gen_mov_i32 340 #define tcg_gen_ext32u_tl tcg_gen_mov_i32 341 #define tcg_gen_ext32s_tl tcg_gen_mov_i32
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H A D | tcg-op-common.h | 159 void tcg_gen_mov_i32(TCGv_i32 ret, TCGv_i32 arg); 525 tcg_gen_mov_i32((NAT)r, a); in tcg_gen_ext_i32_ptr() 552 tcg_gen_mov_i32(r, (NAT)a); in tcg_gen_trunc_ptr_i32()
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/openbmc/qemu/target/xtensa/ |
H A D | translate.c | 362 tcg_gen_mov_i32(cpu_pc, dest); in gen_jump_slot() 364 tcg_gen_mov_i32(cpu_SR[ICOUNT], dc->next_icount); in gen_jump_slot() 1067 tcg_gen_mov_i32(temp, arg_copy[i].arg->in); in disas_xtensa_insn() 1185 tcg_gen_mov_i32(dc->next_icount, cpu_SR[ICOUNT]); in xtensa_tr_translate_insn() 1195 tcg_gen_mov_i32(cpu_SR[ICOUNT], dc->next_icount); in xtensa_tr_translate_insn() 1471 tcg_gen_mov_i32(tmp, arg[0].in); in translate_callx0() 1481 tcg_gen_mov_i32(tmp, arg[0].in); in translate_callxw() 1583 tcg_gen_mov_i32(arg[0].out, tmp); in translate_getex() 1653 tcg_gen_mov_i32(addr, arg[1].in); in translate_l32ex() 1657 tcg_gen_mov_i32(cpu_exclusive_addr, addr); in translate_l32ex() [all …]
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/openbmc/qemu/target/microblaze/ |
H A D | translate.c | 592 tcg_gen_mov_i32(tmp, cpu_msr_c); in gen_src() 852 tcg_gen_mov_i32(cpu_R[arg->rd], cpu_res_val); in trans_lwx() 1104 tcg_gen_mov_i32(cpu_bvalue, reg_for_read(dc, ra)); in DO_BR() 1151 tcg_gen_mov_i32(cpu_pc, reg_for_read(dc, arg->rb)); in DO_BCC() 1725 tcg_gen_mov_i32(cpu_pc, cpu_btarget); in mb_tr_tb_stop() 1744 tcg_gen_mov_i32(tmp, cpu_bvalue); in mb_tr_tb_stop() 1756 tcg_gen_mov_i32(cpu_pc, cpu_btarget); in mb_tr_tb_stop()
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/openbmc/qemu/target/arm/tcg/ |
H A D | translate.c | 278 tcg_gen_mov_i32(var, cpu_R[reg]); in load_reg_var() 320 tcg_gen_mov_i32(cpu_R[reg], var); in store_reg() 418 tcg_gen_mov_i32(a, tmp1); in gen_smul_dual() 460 tcg_gen_mov_i32(cpu_NF, var); in gen_logic_CC() 461 tcg_gen_mov_i32(cpu_ZF, var); in gen_logic_CC() 485 tcg_gen_mov_i32(cpu_ZF, cpu_NF); in gen_add_CC() 489 tcg_gen_mov_i32(dest, cpu_NF); in gen_add_CC() 510 tcg_gen_mov_i32(cpu_ZF, cpu_NF); in gen_adc_CC() 514 tcg_gen_mov_i32(dest, cpu_NF); in gen_adc_CC() 522 tcg_gen_mov_i32(cpu_ZF, cpu_NF); in gen_sub_CC() [all …]
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H A D | translate-a64.c | 786 tcg_gen_mov_i32(cpu_NF, cpu_ZF); in gen_logic_CC() 825 tcg_gen_mov_i32(cpu_ZF, cpu_NF); in gen_add32_CC() 874 tcg_gen_mov_i32(cpu_ZF, cpu_NF); in gen_sub32_CC() 938 tcg_gen_mov_i32(cpu_ZF, cpu_NF); in gen_adc_CC() 7971 tcg_gen_mov_i32(cpu_ZF, cpu_NF); in disas_evaluate_into_flags() 8881 tcg_gen_mov_i32(tcg_res, tcg_op); in handle_fp_1src_half() 8935 tcg_gen_mov_i32(tcg_res, tcg_op); in handle_fp_1src_single()
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H A D | translate-neon.c | 3503 tcg_gen_mov_i32(t0, rd); in gen_neon_trn_u8() 3519 tcg_gen_mov_i32(t0, rd); in gen_neon_trn_u16()
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H A D | translate-vfp.c | 2414 DO_VFP_VMOV(VMOV_reg, sp, tcg_gen_mov_i32) in DO_VFP_VMOV() argument
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H A D | translate-sve.c | 512 tcg_gen_mov_i32(cpu_NF, t); in do_pred_flags() 1670 tcg_gen_mov_i32(cpu_ZF, cpu_NF); in do_predset()
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/openbmc/qemu/target/mips/tcg/ |
H A D | mxu_translate.c | 1752 tcg_gen_mov_i32(mxu_gpr[XRa - 1], mxu_gpr[XRb - 1]); in gen_mxu_S32AND() 1782 tcg_gen_mov_i32(mxu_gpr[XRa - 1], mxu_gpr[XRc - 1]); in gen_mxu_S32OR() 1785 tcg_gen_mov_i32(mxu_gpr[XRa - 1], mxu_gpr[XRb - 1]); in gen_mxu_S32OR() 1788 tcg_gen_mov_i32(mxu_gpr[XRa - 1], mxu_gpr[XRb - 1]); in gen_mxu_S32OR() 1818 tcg_gen_mov_i32(mxu_gpr[XRa - 1], mxu_gpr[XRc - 1]); in gen_mxu_S32XOR() 1821 tcg_gen_mov_i32(mxu_gpr[XRa - 1], mxu_gpr[XRb - 1]); in gen_mxu_S32XOR() 2155 tcg_gen_mov_i32(mxu_gpr[XRa - 1], mxu_gpr[XRb - 1]); in gen_mxu_S32MAX_S32MIN() 2226 tcg_gen_mov_i32(mxu_gpr[XRa - 1], mxu_gpr[XRb - 1]); in gen_mxu_D16MAX_D16MIN() 2324 tcg_gen_mov_i32(mxu_gpr[XRa - 1], mxu_gpr[XRb - 1]); in gen_mxu_Q8MAX_Q8MIN() 4140 tcg_gen_mov_i32(mxu_gpr[XRa - 1], mxu_gpr[XRc - 1]); in gen_mxu_S32ALNI() [all …]
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/openbmc/qemu/target/hexagon/idef-parser/ |
H A D | README.rst | 33 tcg_gen_mov_i32(RdV, tmp_0); 98 tcg_gen_mov_i32(RdV, tmp_0); 519 tcg_gen_mov_i32(RdV, tmp_0); 695 tcg_gen_mov_i32(RdV, tmp_0);
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/openbmc/qemu/target/ppc/ |
H A D | translate.c | 3836 tcg_gen_mov_i32(t0, cpu_crf[crbA(ctx->opcode) >> 2]); \ 3844 tcg_gen_mov_i32(t1, cpu_crf[crbB(ctx->opcode) >> 2]); \ 3872 tcg_gen_mov_i32(cpu_crf[crfD(ctx->opcode)], cpu_crf[crfS(ctx->opcode)]); in gen_mcrf() 4054 tcg_gen_mov_i32(t0, cpu_crf[0]); in gen_mfcr()
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/openbmc/qemu/target/sparc/ |
H A D | translate.c | 1312 tcg_gen_mov_i32(dst, src); in gen_op_fmovs() 4730 TRANS(FSRCs, VIS1, do_ff, a, tcg_gen_mov_i32) in TRANS()
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/openbmc/qemu/target/hppa/ |
H A D | translate.c | 4084 tcg_gen_mov_i32(dst, src); in gen_fcpy_f()
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/openbmc/qemu/target/i386/tcg/ |
H A D | decode-new.c.inc | 2865 tcg_gen_mov_i32(cpu_cc_op, decode.cc_op_dynamic);
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