| /openbmc/qemu/target/tricore/ |
| H A D | translate.c | 186 tcg_gen_extr_i64_i32(rl, rh, ret); \
193 tcg_gen_extr_i64_i32(rl, rh, ret); \
249 tcg_gen_extr_i64_i32(rl, rh, temp); in gen_ld_2regs_64()
569 tcg_gen_extr_i64_i32(ret_low, ret_high, t2); in gen_maddu64_d()
622 tcg_gen_extr_i64_i32(temp, temp2, temp64); in gen_madd_h()
649 tcg_gen_extr_i64_i32(temp, temp2, temp64); in gen_maddsu_h()
684 tcg_gen_extr_i64_i32(ret_low, ret_high, temp64_2); in gen_maddsum_h()
713 tcg_gen_extr_i64_i32(temp, temp2, temp64); in gen_madds_h()
750 tcg_gen_extr_i64_i32(temp, temp2, temp64); in gen_maddsus_h()
790 tcg_gen_extr_i64_i32(ret_low, ret_high, temp64); in gen_maddsums_h()
[all …]
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| /openbmc/qemu/target/riscv/insn_trans/ |
| H A D | trans_rvzacas.c.inc | 52 tcg_gen_extr_i64_i32(cpu_gpr[reg_num], cpu_gpr[reg_num + 1], t);
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| /openbmc/qemu/include/tcg/ |
| H A D | tcg-op.h | 348 #define tcg_gen_extr_i64_tl tcg_gen_extr_i64_i32
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| H A D | tcg-op-common.h | 300 void tcg_gen_extr_i64_i32(TCGv_i32 lo, TCGv_i32 hi, TCGv_i64 arg);
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| /openbmc/qemu/tcg/ |
| H A D | tcg-op.c | 1158 tcg_gen_extr_i64_i32(rl, rh, t0); in tcg_gen_add2_i32()
1175 tcg_gen_extr_i64_i32(rl, rh, t0); in tcg_gen_sub2_i32()
1197 tcg_gen_extr_i64_i32(rl, rh, t0); in tcg_gen_mulu2_i32()
1239 tcg_gen_extr_i64_i32(rl, rh, t0); in tcg_gen_muls2_i32()
1266 tcg_gen_extr_i64_i32(rl, rh, t0); in tcg_gen_mulsu2_i32()
3229 void tcg_gen_extr_i64_i32(TCGv_i32 lo, TCGv_i32 hi, TCGv_i64 arg) in tcg_gen_extr_i64_i32() function
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| /openbmc/qemu/target/m68k/ |
| H A D | translate.c | 3419 tcg_gen_extr_i64_i32(QREG_CC_N, QREG_CC_C, t64); in shift_reg()
3465 tcg_gen_extr_i64_i32(QREG_CC_C, QREG_CC_N, t64); in shift_reg()
3687 tcg_gen_extr_i64_i32(lo, hi, t0); in rotate32_x()
3700 tcg_gen_extr_i64_i32(lo, hi, t0); in rotate32_x()
4004 tcg_gen_extr_i64_i32(dest, QREG_CC_N, tmp); in DISAS_INSN()
4129 tcg_gen_extr_i64_i32(DREG(ext, 12), QREG_CC_N, t64); in DISAS_INSN()
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| /openbmc/qemu/target/riscv/ |
| H A D | translate.c | 550 tcg_gen_extr_i64_i32(cpu_gpr[reg_num], cpu_gpr[reg_num + 1], t); in gen_set_fpr_d()
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| /openbmc/qemu/target/arm/tcg/ |
| H A D | translate.c | 508 tcg_gen_extr_i64_i32(cpu_NF, cpu_CF, q0); in gen_adc_CC()
3288 tcg_gen_extr_i64_i32(tmp2, tmp, t64); in gen_load_exclusive()
3290 tcg_gen_extr_i64_i32(tmp, tmp2, t64); in gen_load_exclusive()
6061 tcg_gen_extr_i64_i32(t1, t2, p64); in op_smlad()
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| H A D | translate-a64.c | 775 tcg_gen_extr_i64_i32(cpu_ZF, cpu_NF, result); in gen_set_NZ64()
10327 tcg_gen_extr_i64_i32(tcg_lo, tcg_hi, tcg_op); in handle_2misc_narrow()
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| /openbmc/qemu/target/openrisc/ |
| H A D | translate.c | 1291 tcg_gen_extr_i64_i32(cpu_R(dc, r + 1 + p), cpu_R(dc, r), t); in save_pair()
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| /openbmc/qemu/target/sh4/ |
| H A D | translate.c | 340 tcg_gen_extr_i64_i32(cpu_fregs[reg + 1], cpu_fregs[reg], t); in gen_store_fpr64()
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| /openbmc/qemu/target/sparc/ |
| H A D | translate.c | 4646 tcg_gen_extr_i64_i32(lo, hi, t64); in do_ldxfsr()
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