Home
last modified time | relevance | path

Searched refs:tcg_gen_andc_i32 (Results 1 – 16 of 16) sorted by relevance

/openbmc/qemu/target/rx/
H A Dtranslate.c295 tcg_gen_andc_i32(dc->temp, cpu_psw_z, dc->temp); in psw_cond()
974 tcg_gen_andc_i32(cpu_psw_o, cpu_psw_o, cpu_psw_z); in rx_adc()
1011 tcg_gen_andc_i32(cpu_psw_o, cpu_psw_o, cpu_psw_z); in rx_add()
1911 tcg_gen_andc_i32(val, val, mask); in rx_bclrm()
1941 tcg_gen_andc_i32(reg, reg, mask); in rx_bclrr()
/openbmc/qemu/include/tcg/
H A Dtcg-op.h349 #define tcg_gen_andc_tl tcg_gen_andc_i32
H A Dtcg-op-common.h97 void tcg_gen_andc_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
/openbmc/qemu/target/m68k/
H A Dtranslate.c552 tcg_gen_andc_i32(QREG_CC_V, t1, QREG_CC_V); in gen_flush_flags()
1893 tcg_gen_andc_i32(dest, src1, tmp); in DISAS_INSN()
3290 tcg_gen_andc_i32(QREG_CC_V, QREG_CC_V, tmp); in gen_addx()
4058 tcg_gen_andc_i32(QREG_CC_N, QREG_CC_N, mask); in DISAS_INSN()
4066 tcg_gen_andc_i32(QREG_CC_N, QREG_CC_N, mask); in DISAS_INSN()
4190 tcg_gen_andc_i32(tmp, src, mask); in DISAS_INSN()
5222 tcg_gen_andc_i32(c->v1, fpsr, c->v1); in gen_fcc_cond()
5268 tcg_gen_andc_i32(c->v1, fpsr, c->v1); in gen_fcc_cond()
/openbmc/qemu/tcg/
H A Dtcg-op.c654 void tcg_gen_andc_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2) in tcg_gen_andc_i32() function
754 tcg_gen_andc_i32(t, t, arg1); in tcg_gen_ctz_i32()
777 tcg_gen_andc_i32(t, t, arg1); in tcg_gen_ctzi_i32()
2383 tcg_gen_andc_i32(TCGV_LOW(ret), TCGV_LOW(arg1), TCGV_LOW(arg2)); in tcg_gen_andc_i64()
2384 tcg_gen_andc_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), TCGV_HIGH(arg2)); in tcg_gen_andc_i64()
H A Dtcg-op-gvec.c1885 tcg_gen_andc_i32(t1, a, m); in tcg_gen_vec_add8_i32()
1886 tcg_gen_andc_i32(t2, b, m); in tcg_gen_vec_add8_i32()
2069 tcg_gen_andc_i32(t2, b, m); in tcg_gen_vec_sub8_i32()
/openbmc/qemu/target/sh4/
H A Dtranslate.c718 tcg_gen_andc_i32(cpu_sr_t, t1, t2); in _decode_opc()
747 tcg_gen_andc_i32(cmp1, cmp1, cmp2); in _decode_opc()
/openbmc/qemu/target/arm/tcg/
H A Dtranslate-a64.c828 tcg_gen_andc_i32(cpu_VF, cpu_VF, tmp); in gen_add32_CC()
941 tcg_gen_andc_i32(cpu_VF, cpu_VF, tmp); in gen_adc_CC()
2024 tcg_gen_andc_i32(cpu_VF, z, cpu_CF); in trans_XAFLAG()
2040 tcg_gen_andc_i32(cpu_CF, cpu_CF, cpu_VF); /* C & !V */ in trans_AXFLAG()
2043 tcg_gen_andc_i32(cpu_ZF, cpu_ZF, cpu_VF); in trans_AXFLAG()
8041 tcg_gen_andc_i32(cpu_NF, cpu_NF, tcg_t1); in disas_cc()
8048 tcg_gen_andc_i32(cpu_ZF, cpu_ZF, tcg_t1); in disas_cc()
8059 tcg_gen_andc_i32(cpu_CF, cpu_CF, tcg_t1); in disas_cc()
8068 tcg_gen_andc_i32(cpu_VF, cpu_VF, tcg_t1); in disas_cc()
H A Dtranslate.c488 tcg_gen_andc_i32(cpu_VF, cpu_VF, tmp); in gen_add_CC()
513 tcg_gen_andc_i32(cpu_VF, cpu_VF, tmp); in gen_adc_CC()
704 tcg_gen_andc_i32(value, cpu_ZF, value); in arm_test_cc()
1599 tcg_gen_andc_i32(tmp, tmp, tmp2); in disas_iwmmxt_insn()
3860 DO_ANY3(BIC, tcg_gen_andc_i32, a->s, STREG_NORMAL)
H A Dgengvec.c2102 tcg_gen_andc_i32(t, b, a); in gen_shsub_i32()
2174 tcg_gen_andc_i32(t, b, a); in gen_uhsub_i32()
H A Dtranslate-sve.c3081 tcg_gen_andc_i32(cpu_VF, cpu_VF, cpu_CF); in trans_CTERM()
/openbmc/qemu/target/microblaze/
H A Dtranslate.c343 DO_TYPEA(andn, false, tcg_gen_andc_i32) in DO_TYPEA()
/openbmc/qemu/target/xtensa/
H A Dtranslate.c1429 [BOOLEAN_ANDC] = tcg_gen_andc_i32, in translate_boolean()
2023 tcg_gen_andc_i32(cpu_SR[WINDOW_START], in translate_retw()
2060 tcg_gen_andc_i32(cpu_SR[WINDOW_START], in translate_rfw()
/openbmc/qemu/target/sparc/
H A Dtranslate.c805 tcg_gen_andc_i32(v, v, t); in gen_op_fpadds32s()
5028 TRANS(FANDNOTs, VIS1, do_fff, a, tcg_gen_andc_i32) in TRANS()
/openbmc/qemu/target/ppc/
H A Dtranslate.c3855 GEN_CRLOGIC(crandc, tcg_gen_andc_i32, 0x04);
6044 GEN_CRLOGIC(crandc, tcg_gen_andc_i32, 0x04),
/openbmc/qemu/target/s390x/tcg/
H A Dtranslate_vx.c.inc2060 tcg_gen_andc_i32(d, d, b);