Home
last modified time | relevance | path

Searched refs:target_el (Results 1 – 20 of 20) sorted by relevance

/openbmc/qemu/target/arm/tcg/
H A Dtlb_helper.c29 unsigned int target_el, in merge_syn_data_abort() argument
61 } else if (!(template_syn & ARM_EL_ISV) || target_el != 2 in merge_syn_data_abort()
82 int target_el, int mmu_idx, uint32_t *ret_fsc) in compute_fsr_fsc() argument
96 (target_el == 2 || arm_el_is_aa64(env, target_el) || in compute_fsr_fsc()
176 int target_el = exception_target_el(env); in arm_deliver_fault() local
192 target_el = 2; in arm_deliver_fault()
196 target_el = 3; in arm_deliver_fault()
198 fsr = compute_fsr_fsc(env, fi, target_el, mmu_idx, &fsc); in arm_deliver_fault()
228 if (fi->gpcf == GPCF_Fail && target_el < 2) { in arm_deliver_fault()
230 target_el = 2; in arm_deliver_fault()
[all …]
H A Dop_helper.c34 int target_el = MAX(1, arm_current_el(env)); in exception_target_el() local
40 if (arm_is_secure(env) && !arm_el_is_aa64(env, 3) && target_el == 1) { in exception_target_el()
41 target_el = 3; in exception_target_el()
44 return target_el; in exception_target_el()
48 uint32_t syndrome, uint32_t target_el) in raise_exception() argument
52 if (target_el == 1 && (arm_hcr_el2_eff(env) & HCR_TGE)) { in raise_exception()
59 target_el = 2; in raise_exception()
68 env->exception.target_el = target_el; in raise_exception()
73 uint32_t target_el, uintptr_t ra) in raise_exception_ra() argument
83 raise_exception(env, excp, syndrome, target_el); in raise_exception_ra()
[all …]
H A Dpsci.c145 int target_el = arm_feature(env, ARM_FEATURE_EL2) ? 2 : 1; in arm_handle_psci_call() local
146 bool target_aarch64 = arm_el_is_aa64(env, target_el); in arm_handle_psci_call()
152 target_el, target_aarch64); in arm_handle_psci_call()
H A Dpauth_helper.c459 void pauth_trap(CPUARMState *env, int target_el, uintptr_t ra) in pauth_trap() argument
461 raise_exception_ra(env, EXCP_UDEF, syn_pactrap(), target_el, ra); in pauth_trap()
H A Dtranslate.h343 uint32_t syn, uint32_t target_el);
H A Dtranslate.c1059 static void gen_exception_el(int excp, uint32_t syndrome, uint32_t target_el) in gen_exception_el() argument
1061 gen_exception_el_v(excp, syndrome, tcg_constant_i32(target_el)); in gen_exception_el()
1084 uint32_t syn, uint32_t target_el) in gen_exception_insn_el() argument
1087 tcg_constant_i32(target_el)); in gen_exception_insn_el()
H A Dm_helper.c2210 if (env->exception.target_el == 3) { in arm_v7m_cpu_do_interrupt()
H A Dtranslate-a64.c2614 int target_el = s->current_el == 3 ? 3 : 2; in trans_HVC() local
2628 gen_exception_insn_el(s, 4, EXCP_HVC, syn_aa64_hvc(a->imm), target_el); in trans_HVC()
/openbmc/qemu/target/arm/
H A Darm-powerctl.c56 uint32_t target_el; member
69 arm_emulate_firmware_reset(target_cpu_state, info->target_el); in arm_set_cpu_on_async_work()
73 assert(info->target_el == arm_current_el(&target_cpu->env)); in arm_set_cpu_on_async_work()
97 uint32_t target_el, bool target_aa64) in arm_set_cpu_on() argument
106 "\n", cpuid, target_el, target_aa64 ? "aarch64" : "aarch32", entry, in arm_set_cpu_on()
110 assert((target_el > 0) && (target_el < 4)); in arm_set_cpu_on()
140 if (((target_el == 3) && !arm_feature(&target_cpu->env, ARM_FEATURE_EL3)) || in arm_set_cpu_on()
141 ((target_el == 2) && !arm_feature(&target_cpu->env, ARM_FEATURE_EL2))) { in arm_set_cpu_on()
180 info->target_el = target_el; in arm_set_cpu_on()
H A Dcpu.c583 void arm_emulate_firmware_reset(CPUState *cpustate, int target_el) in arm_emulate_firmware_reset() argument
595 switch (target_el) { in arm_emulate_firmware_reset()
644 if (target_el == 2) { in arm_emulate_firmware_reset()
655 if (have_el2 && target_el < 2) { in arm_emulate_firmware_reset()
664 env->pstate = aarch64_pstate_mode(target_el, true); in arm_emulate_firmware_reset()
673 cpsr_write(env, mode_for_el[target_el], CPSR_M, CPSRWriteRaw); in arm_emulate_firmware_reset()
681 unsigned int target_el, in arm_excp_unmasked() argument
695 if (cur_el > target_el) { in arm_excp_unmasked()
700 env->cp15.sctlr_el[target_el] & SCTLR_NMI && cur_el == target_el) { in arm_excp_unmasked()
702 ((env->cp15.sctlr_el[target_el] & SCTLR_SPINTMASK) && in arm_excp_unmasked()
[all …]
H A Dtcg-stubs.c20 uint32_t target_el, uintptr_t ra) in raise_exception_ra() argument
H A Darm-powerctl.h50 uint32_t target_el, bool target_aa64);
H A Ddebug_helper.c441 int target_el = arm_debug_target_el(env); in arm_debug_exception_fsr() local
446 } else if (target_el == 2 || arm_el_is_aa64(env, target_el)) { in arm_debug_exception_fsr()
452 (env->cp15.tcr_el[target_el] & TTBCR_EAE)) { in arm_debug_exception_fsr()
H A Dinternals.h285 uint32_t syndrome, uint32_t target_el);
291 uint32_t syndrome, uint32_t target_el,
H A Dkvm.c1424 env->exception.target_el = 1; in kvm_arm_handle_debug()
1973 env->exception.target_el = 1; in kvm_inject_arm_sea()
1979 same_el = arm_current_el(env) == env->exception.target_el; in kvm_inject_arm_sea()
H A Dhelper.c3624 int target_el; in do_ats_write() local
3640 target_el = 3; in do_ats_write()
3646 target_el = 2; in do_ats_write()
3656 target_el = 3; in do_ats_write()
3658 target_el = 2; in do_ats_write()
3661 target_el = exception_target_el(env); in do_ats_write()
3668 if (target_el == 2 || arm_el_is_aa64(env, target_el) || in do_ats_write()
3680 syn = syn_data_abort_no_iss(current_el == target_el, 0, in do_ats_write()
3684 raise_exception(env, EXCP_DATA_ABORT, syn, target_el); in do_ats_write()
10780 int target_el; in arm_phys_excp_target_el() local
[all …]
H A Dcpu.h583 uint32_t target_el; /* EL the exception should be targeted for */ member
1203 void arm_emulate_firmware_reset(CPUState *cpustate, int target_el);
/openbmc/qemu/tests/unit/
H A Dtest-rcu-list.c202 int j, target_el; in rcu_q_updater() local
215 target_el = select_random_el(RCU_Q_LEN); in rcu_q_updater()
220 if (target_el == j) { in rcu_q_updater()
231 target_el = select_random_el(RCU_Q_LEN); in rcu_q_updater()
235 if (target_el == j) { in rcu_q_updater()
/openbmc/qemu/hw/arm/
H A Dboot.c734 int target_el = arm_feature(env, ARM_FEATURE_EL2) ? 2 : 1; in do_cpu_reset() local
748 target_el = 3; in do_cpu_reset()
752 arm_emulate_firmware_reset(cs, target_el); in do_cpu_reset()
/openbmc/qemu/target/arm/hvf/
H A Dhvf.c1077 env->exception.target_el = 1; in hvf_raise_exception()
1110 int target_el = 1; in hvf_handle_psci_call() local
1164 target_el, target_aarch64); in hvf_handle_psci_call()