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Searched refs:scr (Results 1 – 25 of 136) sorted by relevance

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/openbmc/linux/arch/ia64/kernel/
H A Dsignal.c43 restore_sigcontext (struct sigcontext __user *sc, struct sigscratch *scr) in restore_sigcontext() argument
58 err |= __get_user(scr->pt.ar_unat, &sc->sc_ar_unat); in restore_sigcontext()
59 err |= __get_user(scr->pt.ar_fpsr, &sc->sc_ar_fpsr); in restore_sigcontext()
60 err |= __get_user(scr->pt.ar_pfs, &sc->sc_ar_pfs); in restore_sigcontext()
61 err |= __get_user(scr->pt.pr, &sc->sc_pr); /* predicates */ in restore_sigcontext()
62 err |= __get_user(scr->pt.b0, &sc->sc_br[0]); /* b0 (rp) */ in restore_sigcontext()
63 err |= __get_user(scr->pt.b6, &sc->sc_br[6]); /* b6 */ in restore_sigcontext()
64 err |= __copy_from_user(&scr->pt.r1, &sc->sc_gr[1], 8); /* r1 */ in restore_sigcontext()
65 err |= __copy_from_user(&scr->pt.r8, &sc->sc_gr[8], 4*8); /* r8-r11 */ in restore_sigcontext()
66 err |= __copy_from_user(&scr->pt.r12, &sc->sc_gr[12], 2*8); /* r12-r13 */ in restore_sigcontext()
[all …]
H A Dprocess.c162 do_notify_resume_user(sigset_t *unused, struct sigscratch *scr, long in_syscall) in do_notify_resume_user() argument
164 if (fsys_mode(current, &scr->pt)) { in do_notify_resume_user()
169 if (!ia64_psr(&scr->pt)->lp) in do_notify_resume_user()
170 ia64_psr(&scr->pt)->lp = 1; in do_notify_resume_user()
178 ia64_do_signal(scr, in_syscall); in do_notify_resume_user()
183 resume_user_mode_work(&scr->pt); in do_notify_resume_user()
/openbmc/linux/drivers/media/tuners/
H A Dtda827x.c337 u8 scr; member
343 { .lomax = 56875000, .svco = 3, .spd = 4, .scr = 0, .sbs = 0, .gc3 = 1},
344 { .lomax = 67250000, .svco = 0, .spd = 3, .scr = 0, .sbs = 0, .gc3 = 1},
345 { .lomax = 81250000, .svco = 1, .spd = 3, .scr = 0, .sbs = 0, .gc3 = 1},
346 { .lomax = 97500000, .svco = 2, .spd = 3, .scr = 0, .sbs = 0, .gc3 = 1},
347 { .lomax = 113750000, .svco = 3, .spd = 3, .scr = 0, .sbs = 1, .gc3 = 1},
348 { .lomax = 134500000, .svco = 0, .spd = 2, .scr = 0, .sbs = 1, .gc3 = 1},
349 { .lomax = 154000000, .svco = 1, .spd = 2, .scr = 0, .sbs = 1, .gc3 = 1},
350 { .lomax = 162500000, .svco = 1, .spd = 2, .scr = 0, .sbs = 1, .gc3 = 1},
351 { .lomax = 183000000, .svco = 2, .spd = 2, .scr = 0, .sbs = 1, .gc3 = 1},
[all …]
/openbmc/linux/sound/soc/mxs/
H A Dmxs-saif.c81 u32 scr; in mxs_saif_set_clk() local
102 scr = __raw_readl(master_saif->base + SAIF_CTRL); in mxs_saif_set_clk()
103 scr &= ~BM_SAIF_CTRL_BITCLK_MULT_RATE; in mxs_saif_set_clk()
104 scr &= ~BM_SAIF_CTRL_BITCLK_BASE_RATE; in mxs_saif_set_clk()
127 scr &= ~BM_SAIF_CTRL_BITCLK_BASE_RATE; in mxs_saif_set_clk()
134 scr |= BM_SAIF_CTRL_BITCLK_BASE_RATE; in mxs_saif_set_clk()
144 scr &= ~BM_SAIF_CTRL_BITCLK_BASE_RATE; in mxs_saif_set_clk()
155 __raw_writel(scr, master_saif->base + SAIF_CTRL); in mxs_saif_set_clk()
167 scr |= BF_SAIF_CTRL_BITCLK_MULT_RATE(4); in mxs_saif_set_clk()
170 scr |= BF_SAIF_CTRL_BITCLK_MULT_RATE(3); in mxs_saif_set_clk()
[all …]
/openbmc/qemu/hw/char/
H A Drenesas_sci.c78 return FIELD_EX8(sci->scr, SCR, RE); in can_receive()
88 if (FIELD_EX8(sci->scr, SCR, RIE)) { in receive()
94 if (FIELD_EX8(sci->scr, SCR, RIE)) { in receive()
109 if (FIELD_EX8(sci->scr, SCR, TIE)) { in send_byte()
121 if (FIELD_EX8(sci->scr, SCR, TEIE)) { in txend()
142 return FIELD_EX8(sci->scr, SCR, TE) || FIELD_EX8(sci->scr, SCR, RE); in sci_is_tr_enabled()
163 sci->scr = val; in sci_write()
164 if (FIELD_EX8(sci->scr, SCR, TE)) { in sci_write()
167 if (FIELD_EX8(sci->scr, SCR, TIE)) { in sci_write()
171 if (!FIELD_EX8(sci->scr, SCR, TEIE)) { in sci_write()
[all …]
H A Dsh_serial.c55 uint8_t scr; member
110 s->scr = val & ((s->feat & SH_SERIAL_FEAT_SCIF) ? 0xfa : 0xff); in sh_serial_write()
228 ret = s->scr; in sh_serial_read()
241 ret = s->scr; in sh_serial_read()
261 if (s->scr & (1 << 5)) { in sh_serial_read()
323 return s->scr & (1 << 4); in sh_serial_can_receive()
344 if (s->scr & (1 << 6) && s->rxi) { in sh_serial_timeout_int()
364 if (s->scr & (1 << 6) && s->rxi) { in sh_serial_receive1()
402 s->scr = 1 << 5; /* pretend that TX is enabled so early printk works */ in sh_serial_reset()
/openbmc/u-boot/arch/arm/cpu/armv7/sunxi/
H A Dpsci.c196 u32 scr; in cp15_read_scr() local
198 asm volatile ("mrc p15, 0, %0, c1, c1, 0" : "=r" (scr)); in cp15_read_scr()
200 return scr; in cp15_read_scr()
203 static void __secure cp15_write_scr(u32 scr) in cp15_write_scr() argument
205 asm volatile ("mcr p15, 0, %0, c1, c1, 0" : : "r" (scr)); in cp15_write_scr()
217 u32 scr, reg, cpu; in psci_fiq_enter() local
220 scr = cp15_read_scr(); in psci_fiq_enter()
221 cp15_write_scr(scr & ~BIT(0)); in psci_fiq_enter()
242 cp15_write_scr(scr); in psci_fiq_enter()
/openbmc/linux/arch/powerpc/platforms/85xx/
H A Dmpc85xx_mds.c58 int scr; in mpc8568_fixup_125_clock() local
62 scr = phy_read(phydev, MV88E1111_SCR); in mpc8568_fixup_125_clock()
64 if (scr < 0) in mpc8568_fixup_125_clock()
65 return scr; in mpc8568_fixup_125_clock()
67 err = phy_write(phydev, MV88E1111_SCR, scr & ~(MV88E1111_SCR_125CLK)); in mpc8568_fixup_125_clock()
77 scr = phy_read(phydev, MV88E1111_SCR); in mpc8568_fixup_125_clock()
79 if (scr < 0) in mpc8568_fixup_125_clock()
80 return scr; in mpc8568_fixup_125_clock()
82 err = phy_write(phydev, MV88E1111_SCR, scr | 0x0008); in mpc8568_fixup_125_clock()
/openbmc/u-boot/drivers/spi/
H A Dpl022_spi.c206 static inline u32 spi_rate(u32 rate, u16 cpsdvsr, u16 scr) in spi_rate() argument
208 return rate / (cpsdvsr * (1 + scr)); in spi_rate()
214 u16 scr = SSP_SCR_MIN, cr0 = 0, cpsr = SSP_CPSR_MIN, best_scr = scr, in pl022_spi_set_speed() local
230 while (scr <= SSP_SCR_MAX) { in pl022_spi_set_speed()
231 tmp = spi_rate(rate, cpsr, scr); in pl022_spi_set_speed()
236 best_scr = scr; in pl022_spi_set_speed()
244 scr++; in pl022_spi_set_speed()
247 scr = SSP_SCR_MIN; in pl022_spi_set_speed()
/openbmc/u-boot/arch/arm/mach-imx/mx6/
H A Dmp.c35 src->scr |= cpu_reset_mask[nr]; in cpu_reset()
41 printf("core %d => %d\n", nr, !!(src->scr & cpu_ctrl_mask[nr])); in cpu_status()
66 src->scr |= cpu_ctrl_mask[nr]; in cpu_release()
84 src->scr &= ~cpu_ctrl_mask[nr]; in cpu_disable()
/openbmc/linux/drivers/mmc/core/
H A Dsd_ops.c263 __be32 *scr; in mmc_app_send_scr() local
274 scr = kmalloc(sizeof(card->raw_scr), GFP_KERNEL); in mmc_app_send_scr()
275 if (!scr) in mmc_app_send_scr()
291 sg_init_one(&sg, scr, 8); in mmc_app_send_scr()
297 card->raw_scr[0] = be32_to_cpu(scr[0]); in mmc_app_send_scr()
298 card->raw_scr[1] = be32_to_cpu(scr[1]); in mmc_app_send_scr()
300 kfree(scr); in mmc_app_send_scr()
H A Dsd.c213 struct sd_scr *scr = &card->scr; in mmc_decode_scr() local
227 scr->sda_vsn = UNSTUFF_BITS(resp, 56, 4); in mmc_decode_scr()
228 scr->bus_widths = UNSTUFF_BITS(resp, 48, 4); in mmc_decode_scr()
229 if (scr->sda_vsn == SCR_SPEC_VER_2) in mmc_decode_scr()
231 scr->sda_spec3 = UNSTUFF_BITS(resp, 47, 1); in mmc_decode_scr()
233 if (scr->sda_spec3) { in mmc_decode_scr()
234 scr->sda_spec4 = UNSTUFF_BITS(resp, 42, 1); in mmc_decode_scr()
235 scr->sda_specx = UNSTUFF_BITS(resp, 38, 4); in mmc_decode_scr()
243 if (scr->sda_spec4) in mmc_decode_scr()
244 scr->cmds = UNSTUFF_BITS(resp, 32, 4); in mmc_decode_scr()
[all …]
/openbmc/linux/arch/sh/boards/mach-hp6xx/
H A Dpm.c101 u8 scr; in hp6x0_pm_enter() local
108 scr = inb(HD64461_PCC1SCR); in hp6x0_pm_enter()
109 scr |= HD64461_PCCSCR_VCC1; in hp6x0_pm_enter()
110 outb(scr, HD64461_PCC1SCR); in hp6x0_pm_enter()
/openbmc/linux/drivers/tty/serial/8250/
H A D8250_pericom.c54 int scr; in pericom_do_set_divisor() local
56 for (scr = 16; scr > 4; scr--) { in pericom_do_set_divisor()
57 unsigned int maxrate = port->uartclk / scr; in pericom_do_set_divisor()
78 serial_port_out(port, 2, 16 - scr); in pericom_do_set_divisor()
/openbmc/linux/sound/soc/fsl/
H A Dfsl_ssi.c123 u32 scr; member
470 vals[dir].scr, vals[dir].scr); in fsl_ssi_config_enable()
510 u32 sier, srcr, stcr, scr; in fsl_ssi_config_disable() local
527 scr = ssi_excl_shared_bits(vals->scr, avals->scr, aactive); in fsl_ssi_config_disable()
530 regmap_update_bits(ssi->regs, REG_SSI_SCR, scr, 0); in fsl_ssi_config_disable()
592 vals[RX].scr = SSI_SCR_SSIEN | SSI_SCR_RE; in fsl_ssi_setup_regvals()
595 vals[TX].scr = SSI_SCR_SSIEN | SSI_SCR_TE; in fsl_ssi_setup_regvals()
599 vals[RX].scr = vals[TX].scr = 0; in fsl_ssi_setup_regvals()
871 vals[RX].scr &= ~SSI_SCR_TCH_EN; in fsl_ssi_hw_params()
872 vals[TX].scr &= ~SSI_SCR_TCH_EN; in fsl_ssi_hw_params()
[all …]
/openbmc/linux/arch/loongarch/kernel/
H A Dlbt.S26 movscr2gr t1, $scr0 # save scr
45 ldptr.d t1, a0, THREAD_SCR0 # restore scr
78 movscr2gr t1, $scr0 # save scr
98 EX ld.d t1, a0, (0 * SCR_REG_WIDTH) # restore scr
/openbmc/linux/drivers/ata/
H A Dpata_pdc2027x.c586 u32 scr; in pdc_detect_pll_input_clock() local
592 scr = ioread32(mmio_base + PDC_SYS_CTL); in pdc_detect_pll_input_clock()
593 dev_dbg(host->dev, "scr[%X]\n", scr); in pdc_detect_pll_input_clock()
594 iowrite32(scr | (0x01 << 14), mmio_base + PDC_SYS_CTL); in pdc_detect_pll_input_clock()
609 scr = ioread32(mmio_base + PDC_SYS_CTL); in pdc_detect_pll_input_clock()
610 dev_dbg(host->dev, "scr[%X]\n", scr); in pdc_detect_pll_input_clock()
611 iowrite32(scr & ~(0x01 << 14), mmio_base + PDC_SYS_CTL); in pdc_detect_pll_input_clock()
/openbmc/u-boot/doc/
H A DREADME.distro185 specific boot.scr scripts are enabled. This enables distros to generate a
186 U-Boot-specific boot.scr script rather than extlinux.conf as the boot
188 CONFIG_DISTRO_DEFAULTS exposes enough parameterization to boot.scr to
189 allow for board-agnostic boot.scr content, this document recommends that
190 distros generate extlinux.conf rather than boot.scr. extlinux.conf is intended
191 to work across multiple bootloaders, whereas boot.scr will only work with
192 U-Boot. TODO: document the contract between U-Boot and boot.scr re: which
193 environment variables a generic boot.scr may rely upon.
258 Mandatory, if the boot script is boot.scr rather than extlinux.conf. The
259 location in RAM where boot.scr will be loaded to prior to execution.
[all …]
/openbmc/u-boot/board/k+p/bootscripts/
H A Dtpcboot.cmd5 # This is an example file to generate boot.scr - a boot script for U-Boot
6 # Generate boot.scr:
7 # ./tools/mkimage -c none -A arm -T script -d tpcboot.cmd boot.scr
/openbmc/openbmc/meta-raspberrypi/recipes-bsp/rpi-u-boot-scr/
H A Drpi-u-boot-scr.bb19 mkimage -A ${UBOOT_ARCH} -T script -C none -n "Boot script" -d "${WORKDIR}/boot.cmd" boot.scr
29 install -m 0644 boot.scr ${DEPLOYDIR}
/openbmc/openbmc/meta-openembedded/meta-oe/recipes-graphics/lxdm/lxdm/
H A D0002-greeter-gdk.c-fix-typo.patch24 scr=gdk_screen_get_default();
25 g_signal_connect(scr, "size-changed", G_CALLBACK(on_screen_size_changed), win);
/openbmc/linux/drivers/spi/
H A Datmel-quadspi.c162 u32 scr; member
548 aq->scr &= ~QSPI_SCR_SCBR_MASK; in atmel_qspi_setup()
549 aq->scr |= QSPI_SCR_SCBR(scbr); in atmel_qspi_setup()
550 atmel_qspi_write(aq->scr, aq, QSPI_SCR); in atmel_qspi_setup()
582 aq->scr &= ~QSPI_SCR_DLYBS_MASK; in atmel_qspi_set_cs_timing()
583 aq->scr |= QSPI_SCR_DLYBS(cs_setup); in atmel_qspi_set_cs_timing()
584 atmel_qspi_write(aq->scr, aq, QSPI_SCR); in atmel_qspi_set_cs_timing()
828 atmel_qspi_write(aq->scr, aq, QSPI_SCR); in atmel_qspi_resume()
/openbmc/u-boot/board/samsung/common/bootscripts/
H A Dautoboot.cmd1 # This is an example file to generate boot.scr - a boot script for U-Boot
2 # Generate boot.scr:
3 # ./tools/mkimage -c none -A arm -T script -d autoboot.cmd boot.scr
/openbmc/u-boot/arch/arm/mach-imx/
H A Dinit.c98 val = readl(&src_regs->scr); in init_src()
100 writel(val, &src_regs->scr); in init_src()
/openbmc/linux/drivers/dma/
H A Dstm32-dma.c533 u32 scr = stm32_dma_read(dmadev, STM32_DMA_SCR(chan->id)); in stm32_dma_dump_reg() local
540 dev_dbg(chan2dev(chan), "SCR: 0x%08x\n", scr); in stm32_dma_dump_reg()
735 static void stm32_dma_handle_chan_done(struct stm32_dma_chan *chan, u32 scr) in stm32_dma_handle_chan_done() argument
746 if (!(scr & (STM32_DMA_SCR_CIRC | STM32_DMA_SCR_DBM))) in stm32_dma_handle_chan_done()
748 else if (scr & STM32_DMA_SCR_DBM) in stm32_dma_handle_chan_done()
765 u32 status, scr, sfcr; in stm32_dma_chan_irq() local
770 scr = stm32_dma_read(dmadev, STM32_DMA_SCR(chan->id)); in stm32_dma_chan_irq()
777 if (!(scr & STM32_DMA_SCR_EN) && in stm32_dma_chan_irq()
793 if (scr & STM32_DMA_SCR_TCIE) { in stm32_dma_chan_irq()
795 stm32_dma_handle_chan_done(chan, scr); in stm32_dma_chan_irq()
[all …]

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