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Searched refs:rfshtmg (Results 1 – 22 of 22) sorted by relevance

/openbmc/u-boot/board/compulab/cl-som-imx7/
H A Dspl.c91 cl_som_imx7_spl_ddrc_regs_val.rfshtmg = 0x00400046; in cl_som_imx7_spl_dram_cfg_size()
102 cl_som_imx7_spl_ddrc_regs_val.rfshtmg = 0x00400046; in cl_som_imx7_spl_dram_cfg_size()
113 cl_som_imx7_spl_ddrc_regs_val.rfshtmg = 0x00400046; in cl_som_imx7_spl_dram_cfg_size()
124 cl_som_imx7_spl_ddrc_regs_val.rfshtmg = 0x0040005E; in cl_som_imx7_spl_dram_cfg_size()
/openbmc/u-boot/board/technexion/pico-imx7d/
H A Dspl.c26 .rfshtmg = 0x00400046,
49 .rfshtmg = 0x00400046,
/openbmc/u-boot/arch/arm/mach-imx/mx7/
H A Dddr.c45 writel(ddrc_regs_val->rfshtmg, &ddrc_regs->rfshtmg); in mx7_dram_cfg()
/openbmc/u-boot/arch/arm/include/asm/arch-mx7/
H A Dmx7-ddr.h17 u32 rfshtmg; /* 0x0064 */ member
/openbmc/u-boot/arch/arm/mach-sunxi/dram_timings/
H A Dddr2_v3s.c83 writel(RFSHTMG_TREFI(trefi) | RFSHTMG_TRFC(trfc), &mctl_ctl->rfshtmg); in mctl_set_timing_params()
H A Dddr3_1333.c86 writel(RFSHTMG_TREFI(trefi) | RFSHTMG_TRFC(trfc), &mctl_ctl->rfshtmg); in mctl_set_timing_params()
H A Dlpddr3_stock.c82 writel(RFSHTMG_TREFI(trefi) | RFSHTMG_TRFC(trfc), &mctl_ctl->rfshtmg); in mctl_set_timing_params()
/openbmc/u-boot/arch/arm/include/asm/arch-sunxi/
H A Ddram_sun8i_a33.h98 u32 rfshtmg; /* 0x90 */ member
H A Ddram_sunxi_dw.h98 u32 rfshtmg; /* 0x90 refresh timing */ member
H A Ddram_sun8i_a83t.h98 u32 rfshtmg; /* 0x90 */ member
H A Ddram_sun50i_h6.h85 u32 rfshtmg; /* 0x064 */ member
H A Ddram_sun9i.h57 u32 rfshtmg; /* 0x64 refresh timing register */ member
H A Ddram_sun8i_a23.h109 u32 rfshtmg; /* 0x64 */ member
/openbmc/u-boot/drivers/ram/stm32mp1/
H A Dstm32mp1_ddr.h70 u32 rfshtmg; member
H A Dstm32mp1_ddr_regs.h30 u32 rfshtmg; /* 0x64 Refresh Timing*/ member
H A Dstm32mp1_ddr.c75 DDRCTL_REG_TIMING(rfshtmg),
/openbmc/u-boot/arch/arm/mach-sunxi/
H A Ddram_sun8i_a33.c167 writel(reg_val, &mctl_ctl->rfshtmg); in auto_set_timing_para()
H A Ddram_sun8i_a23.c208 &mctl_ctl->rfshtmg); in mctl_init()
H A Ddram_sun8i_a83t.c199 writel(reg_val, &mctl_ctl->rfshtmg); in auto_set_timing_para()
H A Ddram_sun9i.c570 &mctl_ctl->rfshtmg); in mctl_channel_init()
H A Ddram_sun50i_h6.c288 writel((trefi << 16) | trfc, &mctl_ctl->rfshtmg); in mctl_set_timing_lpddr3()
/openbmc/u-boot/arch/arm/include/asm/arch-imx8m/
H A Dddr.h25 u32 rfshtmg; member
92 u32 rfshtmg; member