| /openbmc/u-boot/arch/arm/mach-aspeed/ast2500/ |
| H A D | platform.S | 254 ldr r0, =0x1e782024 @ Set Timer3 Reload
255 str r2, [r0]
257 ldr r0, =0x1e6c0038 @ Clear Timer3 ISR
259 str r1, [r0]
261 ldr r0, =0x1e782030 @ Enable Timer3
264 str r1, [r0]
266 ldr r0, =0x1e6c0090 @ Check ISR for Timer3 timeout
270 ldr r1, [r0]
277 ldr r0, =0x1e78203C @ Disable Timer3
280 str r1, [r0]
[all …]
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| /openbmc/u-boot/arch/arm/mach-orion5x/ |
| H A D | lowlevel_init.S | 87 ldr r0, =0x00000001
88 str r0, [r3, #0x480]
94 ldr r0, =0x00000030
95 str r0, [r3, #0xd00]
101 mov r0, #0
102 str r0, [r3, #0x504]
103 str r0, [r3, #0x50C]
104 str r0, [r3, #0x514]
105 str r0, [r3, #0x51C]
108 ldr r0, =SDRAM_CONFIG
[all …]
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| /openbmc/u-boot/arch/arm/mach-aspeed/ast2600/ |
| H A D | platform.S | 75 movw r0, #0xa8a8
76 movt r0, #0x1688 @; magic key to unlock SCU
79 str r0, [r1]
81 str r0, [r1]
86 movw r0, #0x6c00
87 movt r0, #0x02dc
89 ldr r0, =SCU_REV_ID
90 ldr r0, [r0]
93 cmp r0, r1
103 movweq r0, #0x8c00
[all …]
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| /openbmc/u-boot/board/freescale/mx6sllevk/ |
| H A D | plugin.S | 10 ldr r0, =IOMUXC_BASE_ADDR
12 str r1, [r0, #0x550]
14 str r1, [r0, #0x534]
16 str r1, [r0, #0x2AC]
17 str r1, [r0, #0x548]
18 str r1, [r0, #0x52C]
20 str r1, [r0, #0x530]
22 str r1, [r0, #0x2B0]
23 str r1, [r0, #0x2B4]
24 str r1, [r0, #0x2B8]
[all …]
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| /openbmc/u-boot/board/samsung/goni/ |
| H A D | lowlevel_init.S | 34 ldr r0, [r2]
36 and r0, r0, r1
37 cmp r0, r5
45 ldr r0, =S5PC110_RST_STAT
46 ldr r1, [r0]
53 addeq r0, r8, #0x280 @ S5PC100_GPIO_J4
54 addne r0, r8, #0x2C0 @ S5PC110_GPIO_J4
55 ldr r1, [r0, #0x0] @ GPIO_CON_OFFSET
58 str r1, [r0, #0x0] @ GPIO_CON_OFFSET
60 ldr r1, [r0, #0x4] @ GPIO_DAT_OFFSET
[all …]
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| /openbmc/u-boot/arch/arm/mach-aspeed/ast2400/ |
| H A D | platform.S | 104 ldr r0, =0x1e782024 @ Set Timer3 Reload
105 str r2, [r0]
107 ldr r0, =0x1e6c0038 @ Clear Timer3 ISR
109 str r1, [r0]
111 ldr r0, =0x1e782030 @ Enable Timer3
112 ldr r1, [r0]
115 str r1, [r0]
117 ldr r0, =0x1e6c0090 @ Check ISR for Timer3 timeout
121 ldr r1, [r0]
128 ldr r0, =0x1e782030 @ Disable Timer3
[all …]
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| /openbmc/u-boot/board/freescale/mx6ullevk/ |
| H A D | plugin.S | 10 ldr r0, =IOMUXC_BASE_ADDR
12 str r1, [r0, #0x4B4]
14 str r1, [r0, #0x4AC]
16 str r1, [r0, #0x27C]
18 str r1, [r0, #0x250]
19 str r1, [r0, #0x24C]
20 str r1, [r0, #0x490]
22 str r1, [r0, #0x288]
25 str r1, [r0, #0x270]
28 str r1, [r0, #0x260]
[all …]
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| /openbmc/u-boot/arch/arm/mach-imx/mx5/ |
| H A D | lowlevel_init.S | 27 mrc 15, 0, r0, c1, c0, 1
28 bic r0, r0, #0x2
29 mcr 15, 0, r0, c1, c0, 1
32 ldr r0, =0xC0 | /* tag RAM */ \
43 orrls r0, r0, #1 << 25
46 mcr 15, 1, r0, c9, c0, 2
49 mrc 15, 0, r0, c1, c0, 1
50 orr r0, r0, #2
51 mcr 15, 0, r0, c1, c0, 1
62 ldr r0, =AIPS1_BASE_ADDR
[all …]
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| /openbmc/linux/arch/sh/lib/ |
| H A D | checksum.S | 50 mov r4, r0
51 tst #2, r0 ! Check alignment.
62 mov.w @r4+, r0
63 extu.w r0, r0
64 addc r0, r6
68 mov #-5, r0
69 shld r0, r5
123 mov.w @r4+, r0
124 extu.w r0, r0
128 shll16 r0
[all …]
|
| H A D | ashrsi3.S | 30 ! r0: Result
41 ! r0: Shifts
45 ! r0: Result
56 mov r5,r0
59 and #31,r0
61 mov r0,r4
62 mova ashrsi3_table,r0
63 mov.b @(r0,r4),r4
64 add r4,r0
65 jmp @r0
[all …]
|
| H A D | lshrsi3.S | 30 ! r0: Result
40 ! r0: Value to shift
45 ! r0: Result
56 mov r5,r0
59 and #31,r0
61 mov r0,r4
62 mova lshrsi3_table,r0
63 mov.b @(r0,r4),r4
64 add r4,r0
65 jmp @r0
[all …]
|
| H A D | ashlsi3.S | 30 ! r0: Result
41 ! r0: Shifts
45 ! r0: Result
57 mov r5,r0
60 and #31,r0
62 mov r0,r4
63 mova ashlsi3_table,r0
64 mov.b @(r0,r4),r4
65 add r4,r0
66 jmp @r0
[all …]
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| /openbmc/linux/arch/arm/mm/ |
| H A D | proc-arm946.S | 43 mrc p15, 0, r0, c1, c0, 0 @ ctrl register
44 bic r0, r0, #0x00001000 @ i-cache
45 bic r0, r0, #0x00000004 @ d-cache
46 mcr p15, 0, r0, c1, c0, 0 @ disable caches
64 ret r0
73 mcr p15, 0, r0, c7, c0, 4 @ Wait for interrupt
82 mov r0, #0
83 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache
131 sub r3, r1, r0 @ calculate total size
137 mcr p15, 0, r0, c7, c6, 1 @ invalidate D entry
[all …]
|
| H A D | cache-v6.S | 38 mov r0, #0
42 mcr p15, 0, r0, c7, c5, 0 @ invalidate entire I-cache
43 mcr p15, 0, r0, c7, c5, 0 @ invalidate entire I-cache
44 mcr p15, 0, r0, c7, c5, 0 @ invalidate entire I-cache
45 mcr p15, 0, r0, c7, c5, 0 @ invalidate entire I-cache
51 mcr p15, 0, r0, c7, c5, 0 @ invalidate I-cache
64 mov r0, #0
66 mcr p15, 0, r0, c7, c14, 0 @ D cache clean+invalidate
68 mcr p15, 0, r0, c7, c5, 0 @ I+BTB cache invalidate
73 mcr p15, 0, r0, c7, c15, 0 @ Cache clean+invalidate
[all …]
|
| /openbmc/linux/arch/powerpc/lib/ |
| H A D | checksum_64.S | 24 addic r0,r5,0 /* clear carry */
46 adde r0,r0,r6
81 adde r0,r0,r6
85 adde r0,r0,r9
90 adde r0,r0,r10
92 adde r0,r0,r11
94 adde r0,r0,r12
96 adde r0,r0,r14
98 adde r0,r0,r15
102 adde r0,r0,r16
[all …]
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| /openbmc/u-boot/arch/arm/cpu/armv7/ |
| H A D | start.S | 49 adr r0, reset /* r0 <- Runtime value of reset */
51 subs r4, r0, r1 /* r4 <- Run-vs-link offset */
54 adr r0, pie_fixup
56 add r2, r0, r1 /* r2 <- Runtime &__rel_dyn_start */
58 add r3, r0, r1 /* r3 <- Runtime &__rel_dyn_start */
61 ldr r0, [r2] /* r0 <- Link location */
67 add r0, r4
68 ldr r1, [r0]
70 str r1, [r0]
71 str r0, [r2]
[all …]
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| /openbmc/u-boot/board/freescale/mx7ulp_evk/ |
| H A D | plugin.S | 67 ldr r0, =0x40ad0000
69 str r1, [r0, #0x128]
71 str r1, [r0, #0xf8]
73 str r1, [r0, #0xd8]
75 str r1, [r0, #0x108]
77 str r1, [r0, #0x104]
79 str r1, [r0, #0x124]
81 str r1, [r0, #0x80]
83 str r1, [r0, #0x84]
85 str r1, [r0, #0x88]
[all …]
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| /openbmc/u-boot/arch/arm/cpu/arm920t/ep93xx/ |
| H A D | lowlevel_init.S | 31 str r0, [r3, #SDRAM_OFF_DEVCFG0]
34 str r0, [r3, #SDRAM_OFF_DEVCFG1]
37 str r0, [r3, #SDRAM_OFF_DEVCFG2]
40 str r0, [r3, #SDRAM_OFF_DEVCFG3]
110 stmia r0, {r1-r4}
115 ldr r5, [r0]
117 ldreq r5, [r0, #0x0004]
119 ldreq r5, [r0, #0x0008]
121 ldreq r5, [r0, #0x000c]
125 mvnne r0, #0xffffffff
[all …]
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| /openbmc/u-boot/arch/microblaze/cpu/ |
| H A D | start.S | 23 mts rmsr, r0 /* disable cache */
25 addi r8, r0, __end
29 addi r1, r0, CONFIG_SPL_STACK_ADDR
34 addi r1, r0, CONFIG_SYS_INIT_SP_OFFSET - CONFIG_VAL(SYS_MALLOC_F_LEN)
36 addi r1, r0, CONFIG_SYS_INIT_SP_OFFSET
50 addik r6, r0, 0x2 /* BIG/LITTLE endian offset */
51 lwi r7, r0, 0x28
52 swi r6, r0, 0x28 /* used first unused MB vector */
53 lbui r10, r0, 0x28 /* used first unused MB vector */
54 swi r7, r0, 0x28
[all …]
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| /openbmc/linux/arch/sh/kernel/cpu/shmobile/ |
| H A D | sleep.S | 21 #define k0 r0
34 stc vbr, r0
35 mov.l r0, @(SH_SLEEP_VBR, r5)
41 sts pr, r0
42 mov.l r0, @(SH_SLEEP_SPC, r5)
45 stc sr, r0
46 mov.l r0, @(SH_SLEEP_SR, r5)
49 mov.l @(SH_SLEEP_MODE, r5), r0
50 tst #SUSP_SH_REGS, r0
93 mov #SH_SLEEP_REG_STBCR, r0
[all …]
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| /openbmc/u-boot/arch/arm/cpu/pxa/ |
| H A D | start.S | 43 mrs r0,cpsr
44 bic r0,r0,#0x1f
45 orr r0,r0,#0xd3
46 msr cpsr,r0
59 ldr r0,=CKEN
60 ldr r1,[r0]
62 str r1,[r0]
100 mov r0, #0
101 mcr p15, 0, r0, c7, c7, 0 /* Invalidate I+D+BTB caches */
102 mcr p15, 0, r0, c8, c7, 0 /* Invalidate Unified TLB */
[all …]
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| /openbmc/u-boot/post/lib_powerpc/ |
| H A D | asm.S | 19 mflr r0
20 stwu r0, -4(r1)
33 lwz r0, 0(r1)
35 mtlr r0
42 mflr r0
43 stwu r0, -4(r1)
58 lwz r0, 0(r1)
60 mtlr r0
67 mflr r0
68 stwu r0, -4(r1)
[all …]
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| /openbmc/linux/crypto/ |
| H A D | serpent_generic.c | 228 static noinline void __serpent_setkey_sbox(u32 r0, u32 r1, u32 r2, in __serpent_setkey_sbox() argument
232 S3(r3, r4, r0, r1, r2); store_and_load_keys(r1, r2, r4, r3, 28, 24); in __serpent_setkey_sbox()
233 S4(r1, r2, r4, r3, r0); store_and_load_keys(r2, r4, r3, r0, 24, 20); in __serpent_setkey_sbox()
234 S5(r2, r4, r3, r0, r1); store_and_load_keys(r1, r2, r4, r0, 20, 16); in __serpent_setkey_sbox()
235 S6(r1, r2, r4, r0, r3); store_and_load_keys(r4, r3, r2, r0, 16, 12); in __serpent_setkey_sbox()
236 S7(r4, r3, r2, r0, r1); store_and_load_keys(r1, r2, r0, r4, 12, 8); in __serpent_setkey_sbox()
237 S0(r1, r2, r0, r4, r3); store_and_load_keys(r0, r2, r4, r1, 8, 4); in __serpent_setkey_sbox()
238 S1(r0, r2, r4, r1, r3); store_and_load_keys(r3, r4, r1, r0, 4, 0); in __serpent_setkey_sbox()
239 S2(r3, r4, r1, r0, r2); store_and_load_keys(r2, r4, r3, r0, 0, -4); in __serpent_setkey_sbox()
240 S3(r2, r4, r3, r0, r1); store_and_load_keys(r0, r1, r4, r2, -4, -8); in __serpent_setkey_sbox()
[all …]
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| /openbmc/u-boot/arch/sh/lib/ |
| H A D | ashrsi3.S | 29 ! r0: Result
40 mov #31,r0
41 and r0,r5
42 mova ashrsi3_table,r0
43 mov.b @(r0,r5),r5
45 add r5,r0
46 jmp @r0
50 mov r4,r0
88 rotcl r0
90 subc r0,r0
[all …]
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| /openbmc/qemu/tcg/ |
| H A D | tci.c | 74 static void tci_args_r(uint32_t insn, TCGReg *r0) in tci_args_r() argument
76 *r0 = extract32(insn, 8, 4); in tci_args_r()
87 TCGReg *r0, void **l1) in tci_args_rl() argument
89 *r0 = extract32(insn, 8, 4); in tci_args_rl()
93 static void tci_args_rr(uint32_t insn, TCGReg *r0, TCGReg *r1) in tci_args_rr() argument
95 *r0 = extract32(insn, 8, 4); in tci_args_rr()
99 static void tci_args_ri(uint32_t insn, TCGReg *r0, tcg_target_ulong *i1) in tci_args_ri() argument
101 *r0 = extract32(insn, 8, 4); in tci_args_ri()
105 static void tci_args_rrm(uint32_t insn, TCGReg *r0, in tci_args_rrm() argument
108 *r0 = extract32(insn, 8, 4); in tci_args_rrm()
[all …]
|