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Searched refs:num_lanes (Results 1 – 25 of 75) sorted by relevance

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/openbmc/linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dpppcielanes.c56 uint8_t encode_pcie_lane_width(uint32_t num_lanes) in encode_pcie_lane_width() argument
58 return pp_r600_encode_lanes[num_lanes]; in encode_pcie_lane_width()
61 uint8_t decode_pcie_lane_width(uint32_t num_lanes) in decode_pcie_lane_width() argument
63 return pp_r600_decoded_lanes[num_lanes]; in decode_pcie_lane_width()
H A Dpppcielanes.h27 extern uint8_t encode_pcie_lane_width(uint32_t num_lanes);
28 extern uint8_t decode_pcie_lane_width(uint32_t num_lanes);
/openbmc/linux/drivers/media/i2c/adv748x/
H A Dadv748x-core.c367 tx->active_lanes = min(tx->num_lanes, 2U); in adv748x_link_setup()
380 tx->active_lanes = tx->num_lanes; in adv748x_link_setup()
613 unsigned int num_lanes; in adv748x_parse_csi2_lanes() local
623 num_lanes = vep.bus.mipi_csi2.num_data_lanes; in adv748x_parse_csi2_lanes()
626 if (num_lanes != 1 && num_lanes != 2 && num_lanes != 4) { in adv748x_parse_csi2_lanes()
628 num_lanes); in adv748x_parse_csi2_lanes()
632 state->txa.num_lanes = num_lanes; in adv748x_parse_csi2_lanes()
633 state->txa.active_lanes = num_lanes; in adv748x_parse_csi2_lanes()
634 adv_dbg(state, "TXA: using %u lanes\n", state->txa.num_lanes); in adv748x_parse_csi2_lanes()
638 if (num_lanes != 1) { in adv748x_parse_csi2_lanes()
[all …]
/openbmc/linux/drivers/phy/rockchip/
H A Dphy-rockchip-snps-pcie3.c61 int num_lanes; member
99 for (int i = 0; i < priv->num_lanes; i++) { in rockchip_p3phy_rk3568_init()
144 for (int i = 0; i < priv->num_lanes; i++) { in rockchip_p3phy_rk3588_init()
264 priv->num_lanes = of_property_read_variable_u32_array(dev->of_node, "data-lanes", in rockchip_p3phy_probe()
269 if (priv->num_lanes == -EINVAL) { in rockchip_p3phy_probe()
271 priv->num_lanes = 1; in rockchip_p3phy_probe()
273 } else if (priv->num_lanes < 0) { in rockchip_p3phy_probe()
274 dev_err(dev, "failed to read data-lanes property %d\n", priv->num_lanes); in rockchip_p3phy_probe()
275 return priv->num_lanes; in rockchip_p3phy_probe()
/openbmc/linux/drivers/pci/controller/dwc/
H A Dpci-keystone.c129 int num_lanes; member
1001 int num_lanes = ks_pcie->num_lanes; in ks_pcie_disable_phy() local
1003 while (num_lanes--) { in ks_pcie_disable_phy()
1004 phy_power_off(ks_pcie->phy[num_lanes]); in ks_pcie_disable_phy()
1005 phy_exit(ks_pcie->phy[num_lanes]); in ks_pcie_disable_phy()
1013 int num_lanes = ks_pcie->num_lanes; in ks_pcie_enable_phy() local
1015 for (i = 0; i < num_lanes; i++) { in ks_pcie_enable_phy()
1167 u32 num_lanes; in ks_pcie_probe() local
1224 ret = of_property_read_u32(np, "num-lanes", &num_lanes); in ks_pcie_probe()
1226 num_lanes = 1; in ks_pcie_probe()
[all …]
/openbmc/linux/drivers/phy/ti/
H A Dphy-j721e-wiz.c385 u32 num_lanes; member
417 u32 num_lanes = wiz->num_lanes; in wiz_p_mac_div_sel() local
421 for (i = 0; i < num_lanes; i++) { in wiz_p_mac_div_sel()
440 u32 num_lanes = wiz->num_lanes; in wiz_mode_select() local
445 for (i = 0; i < num_lanes; i++) { in wiz_mode_select()
469 u32 num_lanes = wiz->num_lanes; in wiz_init_raw_interface() local
473 for (i = 0; i < num_lanes; i++) { in wiz_init_raw_interface()
522 int num_lanes = wiz->num_lanes; in wiz_regfield_init() local
611 for (i = 0; i < num_lanes; i++) { in wiz_regfield_init()
1274 u32 num_lanes = wiz->num_lanes; in wiz_phy_reset_deassert() local
[all …]
/openbmc/u-boot/drivers/soc/keystone/
H A Dkeystone_serdes.c126 static int ks2_serdes_init_cfg(u32 base, struct cfg_entry *cfg, u32 num_lanes) in ks2_serdes_init_cfg() argument
133 for (i = 0; i < num_lanes; i++) in ks2_serdes_init_cfg()
186 int ks2_serdes_init(u32 base, struct ks2_serdes *serdes, u32 num_lanes) in ks2_serdes_init() argument
200 ks2_serdes_init_cfg(base, &cfgs[i], num_lanes); in ks2_serdes_init()
203 for (i = 0; i < num_lanes; i++) in ks2_serdes_init()
/openbmc/linux/drivers/phy/mediatek/
H A Dphy-mtk-pcie.c55 int num_lanes; member
122 for (i = 0; i < pcie_phy->data->num_lanes; i++) in mtk_pcie_phy_init()
184 pcie_phy->efuse = devm_kzalloc(dev, pcie_phy->data->num_lanes * in mtk_pcie_read_efuse()
189 for (i = 0; i < pcie_phy->data->num_lanes; i++) { in mtk_pcie_read_efuse()
245 .num_lanes = 2,
/openbmc/linux/drivers/gpu/drm/bridge/adv7511/
H A Dadv7533.c174 u32 num_lanes; in adv7533_parse_dt() local
176 of_property_read_u32(np, "adi,dsi-lanes", &num_lanes); in adv7533_parse_dt()
178 if (num_lanes < 2 || num_lanes > 4) in adv7533_parse_dt()
181 adv->num_dsi_lanes = num_lanes; in adv7533_parse_dt()
/openbmc/linux/drivers/nvdimm/
H A Dregion.c24 if (nd_region->num_lanes > num_online_cpus() in nd_region_probe()
25 && nd_region->num_lanes < num_possible_cpus() in nd_region_probe()
28 num_online_cpus(), nd_region->num_lanes, in nd_region_probe()
31 nd_region->num_lanes); in nd_region_probe()
/openbmc/linux/drivers/gpu/drm/bridge/cadence/
H A Dcdns-mhdp8546-core.c633 values[1] = link->num_lanes; in cdns_mhdp_link_configure()
896 CDNS_DP_LANE_EN_LANES(mhdp->link.num_lanes)); in cdns_mhdp_link_training_init()
900 phy_cfg.dp.lanes = mhdp->link.num_lanes; in cdns_mhdp_link_training_init()
941 for (i = 0; i < mhdp->link.num_lanes; i++) { in cdns_mhdp_get_adjust_train()
1006 for (i = 0; i < mhdp->link.num_lanes; i++) { in cdns_mhdp_adjust_requested_eq()
1029 for (i = 0; i < mhdp->link.num_lanes; i++) { in cdns_mhdp_print_lt_status()
1039 mhdp->link.num_lanes, mhdp->link.rate / 100, in cdns_mhdp_print_lt_status()
1072 phy_cfg.dp.lanes = mhdp->link.num_lanes; in cdns_mhdp_link_training_channel_eq()
1084 cdns_mhdp_adjust_lt(mhdp, mhdp->link.num_lanes, in cdns_mhdp_link_training_channel_eq()
1087 r = drm_dp_clock_recovery_ok(link_status, mhdp->link.num_lanes); in cdns_mhdp_link_training_channel_eq()
[all …]
/openbmc/linux/drivers/media/platform/cadence/
H A Dcdns-csi2rx.c84 u8 num_lanes; member
146 reg = csi2rx->num_lanes << 8; in csi2rx_start()
147 for (i = 0; i < csi2rx->num_lanes; i++) { in csi2rx_start()
158 for (i = csi2rx->num_lanes; i < csi2rx->max_lanes; i++) { in csi2rx_start()
170 for (i = 0; i < csi2rx->num_lanes; i++) { in csi2rx_start()
471 csi2rx->num_lanes = v4l2_ep.bus.mipi_csi2.num_data_lanes; in csi2rx_parse_dt()
472 if (csi2rx->num_lanes > csi2rx->max_lanes) { in csi2rx_parse_dt()
474 csi2rx->num_lanes); in csi2rx_parse_dt()
543 csi2rx->num_lanes, csi2rx->max_lanes, csi2rx->max_streams, in csi2rx_probe()
H A Dcdns-csi2tx.c116 unsigned int num_lanes; member
252 for (i = 0; i < csi2tx->num_lanes; i++) in csi2tx_dphy_init_finish()
274 for (i = 0; i < csi2tx->num_lanes; i++) in csi2tx_dphy_setup()
520 csi2tx->num_lanes = v4l2_ep.bus.mipi_csi2.num_data_lanes; in csi2tx_check_lanes()
521 if (csi2tx->num_lanes > csi2tx->max_lanes) { in csi2tx_check_lanes()
528 for (i = 0; i < csi2tx->num_lanes; i++) { in csi2tx_check_lanes()
628 csi2tx->num_lanes, csi2tx->max_lanes, csi2tx->max_streams, in csi2tx_probe()
/openbmc/linux/drivers/gpu/drm/msm/dp/
H A Ddp_panel.c97 link_info->num_lanes = dpcd[DP_MAX_LANE_COUNT] & DP_MAX_LANE_COUNT_MASK; in dp_panel_read_dpcd()
100 if (link_info->num_lanes > dp_panel->max_dp_lanes) in dp_panel_read_dpcd()
101 link_info->num_lanes = dp_panel->max_dp_lanes; in dp_panel_read_dpcd()
109 drm_dbg_dp(panel->drm_dev, "lane_count=%d\n", link_info->num_lanes); in dp_panel_read_dpcd()
146 data_rate_khz = link_info->num_lanes * link_info->rate * 8; in dp_panel_get_supported_bpp()
201 !is_lane_count_valid(dp_panel->link_info.num_lanes) || in dp_panel_read_sink_caps()
204 dp_panel->link_info.num_lanes); in dp_panel_read_sink_caps()
242 !is_lane_count_valid(dp_panel->link_info.num_lanes) in dp_panel_read_sink_caps()
H A Ddp_ctrl.c95 values[1] = link->num_lanes; in dp_aux_link_configure()
141 config |= ((ctrl->link->link_params.num_lanes - 1) in dp_ctrl_config_ctrl()
953 in.nlanes = ctrl->link->link_params.num_lanes; in dp_ctrl_calc_tu_parameters()
1038 lane_cnt = ctrl->link->link_params.num_lanes; in dp_ctrl_update_vx_px()
1115 ctrl->link->link_params.num_lanes)) { in dp_ctrl_link_train_1()
1171 if (ctrl->link->link_params.num_lanes == 1) in dp_ctrl_link_lane_down_shift()
1174 ctrl->link->link_params.num_lanes /= 2; in dp_ctrl_link_lane_down_shift()
1227 ctrl->link->link_params.num_lanes)) { in dp_ctrl_link_train_2()
1252 link_info.num_lanes = ctrl->link->link_params.num_lanes; in dp_ctrl_link_train()
1346 opts_dp->lanes = ctrl->link->link_params.num_lanes; in dp_ctrl_enable_mainlink_clocks()
[all …]
/openbmc/linux/drivers/pci/controller/cadence/
H A Dpci-j721e.c57 u32 num_lanes; member
212 u32 lanes = pcie->num_lanes; in j721e_pcie_set_lane_count()
379 u32 num_lanes; in j721e_pcie_probe() local
448 ret = of_property_read_u32(node, "num-lanes", &num_lanes); in j721e_pcie_probe()
449 if (ret || num_lanes > data->max_lanes) { in j721e_pcie_probe()
451 num_lanes = 1; in j721e_pcie_probe()
454 pcie->num_lanes = num_lanes; in j721e_pcie_probe()
/openbmc/linux/drivers/media/i2c/
H A Dov8858.c122 unsigned int num_lanes; member
1341 reg_list = ov8858->num_lanes == 4 in ov8858_start_stream()
1721 pixel_rate = OV8858_LINK_FREQ * 2 * ov8858->num_lanes / 10; in ov8858_init_ctrls()
1806 ov8858->global_regs = ov8858->num_lanes == 4 in ov8858_check_sensor_id()
1809 } else if (ov8858->num_lanes == 2) { in ov8858_check_sensor_id()
1859 ov8858->num_lanes = vep.bus.mipi_csi2.num_data_lanes; in ov8858_parse_of()
1860 switch (ov8858->num_lanes) { in ov8858_parse_of()
1866 ov8858->num_lanes); in ov8858_parse_of()
/openbmc/linux/drivers/phy/cadence/
H A Dphy-cadence-torrent.c344 u32 num_lanes; member
1101 pll_bits = ((1 << inst->num_lanes) - 1); in cdns_torrent_dp_set_pll_en()
1120 u32 num_lanes, in cdns_torrent_dp_set_power_state() argument
1146 for (i = 0; i < num_lanes; i++) { in cdns_torrent_dp_set_power_state()
1167 struct cdns_torrent_inst *inst, u32 num_lanes) in cdns_torrent_dp_run() argument
1188 ret = cdns_torrent_dp_set_power_state(cdns_phy, inst, num_lanes, in cdns_torrent_dp_run()
1193 ret = cdns_torrent_dp_set_power_state(cdns_phy, inst, num_lanes, in cdns_torrent_dp_run()
1218 u32 rate, u32 num_lanes) in cdns_torrent_dp_pma_cmn_rate() argument
1259 for (i = 0; i < num_lanes; i++) in cdns_torrent_dp_pma_cmn_rate()
1390 if (dp->lanes > inst->num_lanes) in cdns_torrent_dp_verify_config()
[all …]
/openbmc/linux/drivers/gpu/drm/bridge/
H A Dsii902x.c835 int num_lanes, i; in sii902x_audio_codec_init() local
843 num_lanes = of_property_read_variable_u8_array(dev->of_node, in sii902x_audio_codec_init()
848 if (num_lanes == -EINVAL) { in sii902x_audio_codec_init()
852 num_lanes = 1; in sii902x_audio_codec_init()
854 } else if (num_lanes < 0) { in sii902x_audio_codec_init()
857 __func__, num_lanes); in sii902x_audio_codec_init()
858 return num_lanes; in sii902x_audio_codec_init()
860 codec_data.max_i2s_channels = 2 * num_lanes; in sii902x_audio_codec_init()
862 for (i = 0; i < num_lanes; i++) in sii902x_audio_codec_init()
H A Dtc358767.c276 u8 num_lanes; member
488 if (tc->link.num_lanes == 2) in tc_srcctrl()
729 u8 revision, num_lanes; in tc_get_display_props() local
742 num_lanes = drm_dp_max_lane_count(tc->link.dpcd); in tc_get_display_props()
751 if (num_lanes > 2) { in tc_get_display_props()
753 num_lanes = 2; in tc_get_display_props()
756 tc->link.num_lanes = num_lanes; in tc_get_display_props()
777 tc->link.num_lanes, in tc_get_display_props()
902 out_bw = tc->link.num_lanes * tc->link.rate; in tc_set_edp_video_mode()
1017 if (tc->link.num_lanes == 2) in tc_main_link_enable()
[all …]
/openbmc/linux/drivers/media/platform/samsung/exynos4-is/
H A Dmipi-csis.c216 u32 num_lanes; member
322 mask = (1 << (state->num_lanes + 1)) - 1; in s5pcsis_system_enable()
360 val = (val & ~S5PCSIS_CFG_NR_LANE_MASK) | (state->num_lanes - 1); in s5pcsis_set_params()
754 state->num_lanes = endpoint.bus.mipi_csi2.num_data_lanes; in s5pcsis_parse_dt()
792 if (state->num_lanes == 0 || state->num_lanes > state->max_num_lanes) { in s5pcsis_probe()
794 state->num_lanes, state->max_num_lanes); in s5pcsis_probe()
875 state->num_lanes, state->hs_settle, state->wclk_ext, in s5pcsis_probe()
/openbmc/u-boot/drivers/pci/
H A Dpci_tegra.c198 unsigned int num_lanes; member
526 unsigned int index = 0, num_lanes = 0; in tegra_pcie_parse_dt() local
529 err = tegra_pcie_parse_port_info(subnode, &index, &num_lanes); in tegra_pcie_parse_dt()
535 lanes |= num_lanes << (index << 3); in tegra_pcie_parse_dt()
545 port->num_lanes = num_lanes; in tegra_pcie_parse_dt()
1022 port->num_lanes);
/openbmc/linux/drivers/gpu/drm/xlnx/
H A Dzynqmp_dp.c310 u8 num_lanes; member
390 for (i = 0; i < dp->num_lanes; i++) { in zynqmp_dp_phy_init()
404 for (i = dp->num_lanes - 1; i >= 0; i--) { in zynqmp_dp_phy_init()
426 for (i = 0; i < dp->num_lanes; i++) { in zynqmp_dp_phy_exit()
433 for (i = 0; i < dp->num_lanes; i++) { in zynqmp_dp_phy_exit()
468 if (dp->num_lanes) in zynqmp_dp_phy_probe()
485 dp->num_lanes++; in zynqmp_dp_phy_probe()
504 ready = (1 << dp->num_lanes) - 1; in zynqmp_dp_phy_ready()
1552 dp->num_lanes); in zynqmp_dp_bridge_detect()
1765 dp->num_lanes); in zynqmp_dp_probe()
/openbmc/linux/drivers/staging/media/atomisp/pci/
H A Dia_css_input_port.h55 unsigned int num_lanes; /** Number of lanes used (4-lane port only) */ member
/openbmc/u-boot/arch/arm/include/asm/ti-common/
H A Dkeystone_serdes.h52 int ks2_serdes_init(u32 base, struct ks2_serdes *serdes, u32 num_lanes);

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