xref: /openbmc/u-boot/arch/arm/include/asm/ti-common/keystone_serdes.h (revision 83d290c56fab2d38cd1ab4c4cc7099559c1d5046)
1*83d290c5STom Rini /* SPDX-License-Identifier: GPL-2.0+ */
2a43febdeSKhoronzhuk, Ivan /*
3a43febdeSKhoronzhuk, Ivan  * Texas Instruments Keystone SerDes driver
4a43febdeSKhoronzhuk, Ivan  *
5a43febdeSKhoronzhuk, Ivan  * (C) Copyright 2014
6a43febdeSKhoronzhuk, Ivan  *     Texas Instruments Incorporated, <www.ti.com>
7a43febdeSKhoronzhuk, Ivan  */
8a43febdeSKhoronzhuk, Ivan 
9a43febdeSKhoronzhuk, Ivan #ifndef __TI_KEYSTONE_SERDES_H__
10a43febdeSKhoronzhuk, Ivan #define __TI_KEYSTONE_SERDES_H__
11a43febdeSKhoronzhuk, Ivan 
1292a16c81SHao Zhang /* SERDES Reference clock */
1392a16c81SHao Zhang enum ks2_serdes_clock {
1492a16c81SHao Zhang 	SERDES_CLOCK_100M,		/* 100 MHz */
1592a16c81SHao Zhang 	SERDES_CLOCK_122P88M,		/* 122.88 MHz */
1692a16c81SHao Zhang 	SERDES_CLOCK_125M,		/* 125 MHz */
1792a16c81SHao Zhang 	SERDES_CLOCK_156P25M,		/* 156.25 MHz */
1892a16c81SHao Zhang 	SERDES_CLOCK_312P5M,		/* 312.5 MHz */
1992a16c81SHao Zhang };
2092a16c81SHao Zhang 
2192a16c81SHao Zhang /* SERDES Lane Baud Rate */
2292a16c81SHao Zhang enum ks2_serdes_rate {
2392a16c81SHao Zhang 	SERDES_RATE_4P9152G,		/* 4.9152 GBaud */
2492a16c81SHao Zhang 	SERDES_RATE_5G,			/* 5 GBaud */
2592a16c81SHao Zhang 	SERDES_RATE_6P144G,		/* 6.144 GBaud */
2692a16c81SHao Zhang 	SERDES_RATE_6P25G,		/* 6.25 GBaud */
2792a16c81SHao Zhang 	SERDES_RATE_10p3125g,		/* 10.3215 GBaud */
2892a16c81SHao Zhang 	SERDES_RATE_12p5g,		/* 12.5 GBaud */
2992a16c81SHao Zhang };
3092a16c81SHao Zhang 
3192a16c81SHao Zhang /* SERDES Lane Rate Mode */
3292a16c81SHao Zhang enum ks2_serdes_rate_mode {
3392a16c81SHao Zhang 	SERDES_FULL_RATE,
3492a16c81SHao Zhang 	SERDES_HALF_RATE,
3592a16c81SHao Zhang 	SERDES_QUARTER_RATE,
3692a16c81SHao Zhang };
3792a16c81SHao Zhang 
3892a16c81SHao Zhang /* SERDES PHY TYPE */
3992a16c81SHao Zhang enum ks2_serdes_interface {
4092a16c81SHao Zhang 	SERDES_PHY_SGMII,
4192a16c81SHao Zhang 	SERDES_PHY_PCSR,		/* XGE SERDES */
4292a16c81SHao Zhang };
4392a16c81SHao Zhang 
4492a16c81SHao Zhang struct ks2_serdes {
4592a16c81SHao Zhang 	enum ks2_serdes_clock clk;
4692a16c81SHao Zhang 	enum ks2_serdes_rate rate;
4792a16c81SHao Zhang 	enum ks2_serdes_rate_mode rate_mode;
4892a16c81SHao Zhang 	enum ks2_serdes_interface intf;
4992a16c81SHao Zhang 	u32 loopback;
5092a16c81SHao Zhang };
5192a16c81SHao Zhang 
5292a16c81SHao Zhang int ks2_serdes_init(u32 base, struct ks2_serdes *serdes, u32 num_lanes);
53a43febdeSKhoronzhuk, Ivan 
54a43febdeSKhoronzhuk, Ivan #endif /* __TI_KEYSTONE_SERDES_H__ */
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