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Searched refs:new_rate (Results 1 – 25 of 72) sorted by relevance

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/openbmc/linux/drivers/clk/ti/
H A Dclkt_dpll.c140 static int _dpll_test_mult(int *m, int n, unsigned long *new_rate, in _dpll_test_mult() argument
155 *new_rate = _dpll_compute_new_rate(parent_rate, *m, n); in _dpll_test_mult()
156 if (*new_rate > target_rate) { in _dpll_test_mult()
158 *new_rate = 0; in _dpll_test_mult()
164 *new_rate = 0; in _dpll_test_mult()
168 if (*new_rate == 0) in _dpll_test_mult()
169 *new_rate = _dpll_compute_new_rate(parent_rate, *m, n); in _dpll_test_mult()
290 unsigned long new_rate = 0; in omap2_dpll_round_rate() local
335 r = _dpll_test_mult(&m, n, &new_rate, target_rate, in omap2_dpll_round_rate()
343 delta = target_rate - new_rate; in omap2_dpll_round_rate()
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/openbmc/linux/drivers/clk/hisilicon/
H A Dclk-hi6220-stub.c143 unsigned long new_rate = rate / 1000; /* kHz */ in hi6220_stub_clk_set_rate() local
148 ret = hi6220_acpu_set_freq(stub_clk, new_rate); in hi6220_stub_clk_set_rate()
160 pr_debug("%s: set rate=%ldkHz\n", __func__, new_rate); in hi6220_stub_clk_set_rate()
168 unsigned long new_rate = rate / 1000; /* kHz */ in hi6220_stub_clk_round_rate() local
172 new_rate = hi6220_acpu_round_freq(stub_clk, new_rate); in hi6220_stub_clk_round_rate()
175 new_rate *= 1000; in hi6220_stub_clk_round_rate()
184 return new_rate; in hi6220_stub_clk_round_rate()
/openbmc/linux/drivers/cpufreq/
H A Dvexpress-spc-cpufreq.c110 u32 new_rate, prev_rate; in ve_spc_cpufreq_set_rate() local
121 new_rate = find_cluster_maxfreq(new_cluster); in ve_spc_cpufreq_set_rate()
122 new_rate = ACTUAL_FREQ(new_cluster, new_rate); in ve_spc_cpufreq_set_rate()
124 new_rate = rate; in ve_spc_cpufreq_set_rate()
127 ret = clk_set_rate(clk[new_cluster], new_rate * 1000); in ve_spc_cpufreq_set_rate()
137 if (clk_get_rate(clk[new_cluster]) != new_rate * 1000) in ve_spc_cpufreq_set_rate()
162 new_rate = find_cluster_maxfreq(old_cluster); in ve_spc_cpufreq_set_rate()
163 new_rate = ACTUAL_FREQ(old_cluster, new_rate); in ve_spc_cpufreq_set_rate()
165 if (new_rate && in ve_spc_cpufreq_set_rate()
166 clk_set_rate(clk[old_cluster], new_rate * 1000)) { in ve_spc_cpufreq_set_rate()
H A Dhighbank-cpufreq.c40 if (clk_data->new_rate > clk_data->old_rate) in hb_cpufreq_clk_notify()
41 while (hb_voltage_change(clk_data->new_rate)) in hb_cpufreq_clk_notify()
45 if (clk_data->new_rate < clk_data->old_rate) in hb_cpufreq_clk_notify()
46 while (hb_voltage_change(clk_data->new_rate)) in hb_cpufreq_clk_notify()
/openbmc/linux/drivers/clocksource/
H A Dtimer-cadence-ttc.c241 if (ndata->new_rate > ndata->old_rate) { in ttc_rate_change_clocksource_cb()
242 factor = DIV_ROUND_CLOSEST(ndata->new_rate, in ttc_rate_change_clocksource_cb()
245 rate_high = ndata->new_rate; in ttc_rate_change_clocksource_cb()
248 ndata->new_rate); in ttc_rate_change_clocksource_cb()
249 rate_low = ndata->new_rate; in ttc_rate_change_clocksource_cb()
272 if (ndata->new_rate < ndata->old_rate) in ttc_rate_change_clocksource_cb()
287 if (ndata->new_rate < ndata->old_rate) in ttc_rate_change_clocksource_cb()
297 if (ndata->new_rate > ndata->old_rate) in ttc_rate_change_clocksource_cb()
307 if (ndata->new_rate < ndata->old_rate) in ttc_rate_change_clocksource_cb()
392 ttc->freq = ndata->new_rate; in ttc_rate_change_clockevent_cb()
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H A Darm_global_timer.c295 psv = DIV_ROUND_CLOSEST(ndata->new_rate, gt_target_rate); in gt_clk_rate_change_cb()
297 abs(gt_target_rate - (ndata->new_rate / psv)) > MAX_F_ERR) in gt_clk_rate_change_cb()
313 if (ndata->new_rate < ndata->old_rate) in gt_clk_rate_change_cb()
322 if (ndata->new_rate > ndata->old_rate) in gt_clk_rate_change_cb()
331 if (ndata->new_rate < ndata->old_rate) in gt_clk_rate_change_cb()
/openbmc/u-boot/drivers/clk/rockchip/
H A Dclk_rk3288.c746 ulong new_rate, gclk_rate; in rk3288_clk_get_rate() local
751 new_rate = rkclk_pll_get_rate(priv->cru, clk->id); in rk3288_clk_get_rate()
759 new_rate = rockchip_mmc_get_clk(priv->cru, gclk_rate, clk->id); in rk3288_clk_get_rate()
764 new_rate = rockchip_spi_get_clk(priv->cru, gclk_rate, clk->id); in rk3288_clk_get_rate()
776 new_rate = rockchip_saradc_get_clk(priv->cru); in rk3288_clk_get_rate()
782 return new_rate; in rk3288_clk_get_rate()
789 ulong new_rate, gclk_rate; in rk3288_clk_set_rate() local
798 new_rate = rate; in rk3288_clk_set_rate()
801 new_rate = rkclk_configure_ddr(priv->cru, priv->grf, rate); in rk3288_clk_set_rate()
809 new_rate = rockchip_mmc_set_clk(cru, gclk_rate, clk->id, rate); in rk3288_clk_set_rate()
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H A Dclk_rv1108.c574 ulong new_rate; in rv1108_clk_set_rate() local
578 new_rate = rv1108_mac_set_clk(priv->cru, rate); in rv1108_clk_set_rate()
581 new_rate = rv1108_sfc_set_clk(priv->cru, rate); in rv1108_clk_set_rate()
584 new_rate = rv1108_saradc_set_clk(priv->cru, rate); in rv1108_clk_set_rate()
587 new_rate = rv1108_aclk_vio0_set_clk(priv->cru, rate); in rv1108_clk_set_rate()
590 new_rate = rv1108_aclk_vio1_set_clk(priv->cru, rate); in rv1108_clk_set_rate()
593 new_rate = rv1108_dclk_vop_set_clk(priv->cru, rate); in rv1108_clk_set_rate()
596 new_rate = rv1108_aclk_bus_set_clk(priv->cru, rate); in rv1108_clk_set_rate()
599 new_rate = rv1108_aclk_peri_set_clk(priv->cru, rate); in rv1108_clk_set_rate()
602 new_rate = rv1108_hclk_peri_set_clk(priv->cru, rate); in rv1108_clk_set_rate()
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H A Dclk_rk3188.c461 ulong new_rate, gclk_rate; in rk3188_clk_get_rate() local
466 new_rate = rkclk_pll_get_rate(priv->cru, clk->id); in rk3188_clk_get_rate()
474 new_rate = rockchip_mmc_get_clk(priv->cru, PERI_HCLK_HZ, in rk3188_clk_get_rate()
479 new_rate = rockchip_spi_get_clk(priv->cru, PERI_PCLK_HZ, in rk3188_clk_get_rate()
492 return new_rate; in rk3188_clk_get_rate()
499 ulong new_rate; in rk3188_clk_set_rate() local
503 new_rate = rkclk_configure_cpu(priv->cru, priv->grf, rate, in rk3188_clk_set_rate()
507 new_rate = rkclk_configure_ddr(priv->cru, priv->grf, rate, in rk3188_clk_set_rate()
516 new_rate = rockchip_mmc_set_clk(cru, PERI_HCLK_HZ, in rk3188_clk_set_rate()
521 new_rate = rockchip_spi_set_clk(cru, PERI_PCLK_HZ, in rk3188_clk_set_rate()
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H A Dclk_rk3128.c508 ulong new_rate, gclk_rate; in rk3128_clk_set_rate() local
517 new_rate = rk3128_vop_set_clk(priv->cru, in rk3128_clk_set_rate()
521 new_rate = rockchip_mmc_set_clk(priv->cru, gclk_rate, in rk3128_clk_set_rate()
529 new_rate = rk3128_peri_set_pclk(priv->cru, clk->id, rate); in rk3128_clk_set_rate()
532 new_rate = rk3128_saradc_set_clk(priv->cru, rate); in rk3128_clk_set_rate()
538 return new_rate; in rk3128_clk_set_rate()
H A Dclk_rk322x.c373 ulong new_rate, gclk_rate; in rk322x_clk_set_rate() local
381 new_rate = rockchip_mmc_set_clk(priv->cru, gclk_rate, in rk322x_clk_set_rate()
385 new_rate = rk322x_ddr_set_clk(priv->cru, rate); in rk322x_clk_set_rate()
388 new_rate = rk322x_mac_set_clk(priv->cru, rate); in rk322x_clk_set_rate()
396 return new_rate; in rk322x_clk_set_rate()
/openbmc/linux/drivers/clk/rockchip/
H A Dclk-cpu.c162 rate = rockchip_get_cpuclk_settings(cpuclk, ndata->new_rate); in rockchip_cpuclk_pre_rate_change()
165 __func__, ndata->new_rate); in rockchip_cpuclk_pre_rate_change()
231 rate = rockchip_get_cpuclk_settings(cpuclk, ndata->new_rate); in rockchip_cpuclk_post_rate_change()
234 __func__, ndata->new_rate); in rockchip_cpuclk_post_rate_change()
240 if (ndata->old_rate < ndata->new_rate) in rockchip_cpuclk_post_rate_change()
270 if (ndata->old_rate > ndata->new_rate) in rockchip_cpuclk_post_rate_change()
291 __func__, event, ndata->old_rate, ndata->new_rate); in rockchip_cpuclk_notifier_cb()
/openbmc/u-boot/drivers/clk/
H A Dclk_zynq.c292 ulong new_rate, best_rate = 0; in zynq_clk_calc_peripheral_two_divs() local
297 new_rate = DIV_ROUND_CLOSEST( in zynq_clk_calc_peripheral_two_divs()
299 new_err = abs(new_rate - rate); in zynq_clk_calc_peripheral_two_divs()
305 best_rate = new_rate; in zynq_clk_calc_peripheral_two_divs()
319 ulong pll_rate, new_rate; in zynq_clk_set_peripheral_rate() local
330 new_rate = zynq_clk_calc_peripheral_two_divs(rate, pll_rate, in zynq_clk_set_peripheral_rate()
337 new_rate = DIV_ROUND_CLOSEST(rate, div0); in zynq_clk_set_peripheral_rate()
345 return new_rate; in zynq_clk_set_peripheral_rate()
H A Dclk_zynqmp.c498 ulong new_rate, best_rate = 0; in zynqmp_clk_calc_peripheral_two_divs() local
503 new_rate = DIV_ROUND_CLOSEST( in zynqmp_clk_calc_peripheral_two_divs()
505 new_err = abs(new_rate - rate); in zynqmp_clk_calc_peripheral_two_divs()
511 best_rate = new_rate; in zynqmp_clk_calc_peripheral_two_divs()
525 ulong pll_rate, new_rate; in zynqmp_clk_set_peripheral_rate() local
545 new_rate = zynqmp_clk_calc_peripheral_two_divs(rate, pll_rate, in zynqmp_clk_set_peripheral_rate()
552 new_rate = DIV_ROUND_CLOSEST(rate, div0); in zynqmp_clk_set_peripheral_rate()
565 return new_rate; in zynqmp_clk_set_peripheral_rate()
/openbmc/linux/drivers/clk/tegra/
H A Dclk-device.c74 if (cnd->new_rate > cnd->old_rate) in tegra_clock_change_notify()
75 err = tegra_clock_set_pd_state(clk_dev, cnd->new_rate); in tegra_clock_change_notify()
83 if (cnd->new_rate < cnd->old_rate) in tegra_clock_change_notify()
84 err = tegra_clock_set_pd_state(clk_dev, cnd->new_rate); in tegra_clock_change_notify()
/openbmc/linux/drivers/clk/samsung/
H A Dclk-cpu.c159 while ((cfg_data->prate * 1000) != ndata->new_rate) { in exynos_cpuclk_pre_rate_change()
188 if (alt_prate > ndata->old_rate || ndata->old_rate > ndata->new_rate) { in exynos_cpuclk_pre_rate_change()
189 unsigned long tmp_rate = min(ndata->old_rate, ndata->new_rate); in exynos_cpuclk_pre_rate_change()
236 while ((cfg_data->prate * 1000) != ndata->new_rate) { in exynos_cpuclk_post_rate_change()
287 while ((cfg_data->prate * 1000) != ndata->new_rate) { in exynos5433_cpuclk_pre_rate_change()
310 if (alt_prate > ndata->old_rate || ndata->old_rate > ndata->new_rate) { in exynos5433_cpuclk_pre_rate_change()
311 unsigned long tmp_rate = min(ndata->old_rate, ndata->new_rate); in exynos5433_cpuclk_pre_rate_change()
/openbmc/linux/drivers/net/wireless/realtek/rtw88/
H A Dbf.h94 u8 fixrate_en, u8 *new_rate);
111 u8 fixrate_en, u8 *new_rate) in rtw_chip_cfg_csi_rate() argument
115 fixrate_en, new_rate); in rtw_chip_cfg_csi_rate()
/openbmc/u-boot/drivers/clk/aspeed/
H A Dclk_ast2500.c371 ulong new_rate; in ast2500_configure_d2pll() local
384 new_rate = ast2500_calc_clock_config(clkin, rate, &div_cfg); in ast2500_configure_d2pll()
401 return new_rate; in ast2500_configure_d2pll()
408 ulong new_rate; in ast2500_clk_set_rate() local
412 new_rate = ast2500_configure_ddr(priv->scu, rate); in ast2500_clk_set_rate()
416 new_rate = ast2500_configure_d2pll(priv->scu, rate); in ast2500_clk_set_rate()
423 return new_rate; in ast2500_clk_set_rate()
/openbmc/linux/arch/arm/kernel/
H A Dsmp_twd.c104 static void twd_update_frequency(void *new_rate) in twd_update_frequency() argument
106 twd_timer_rate = *((unsigned long *) new_rate); in twd_update_frequency()
123 (void *)&cnd->new_rate, 1); in twd_rate_change()
/openbmc/u-boot/arch/arm/cpu/armv7/bcm281xx/
H A Dclk-core.c165 unsigned long new_rate = 0, div = 1; in peri_clk_set_rate() local
186 new_rate = ref->clk.rate / div; in peri_clk_set_rate()
189 if (abs(new_rate - rate) < diff) { in peri_clk_set_rate()
190 diff = abs(new_rate - rate); in peri_clk_set_rate()
193 c->rate = new_rate; in peri_clk_set_rate()
/openbmc/u-boot/arch/arm/cpu/armv7/bcm235xx/
H A Dclk-core.c165 unsigned long new_rate = 0, div = 1; in peri_clk_set_rate() local
186 new_rate = ref->clk.rate / div; in peri_clk_set_rate()
189 if (abs(new_rate - rate) < diff) { in peri_clk_set_rate()
190 diff = abs(new_rate - rate); in peri_clk_set_rate()
193 c->rate = new_rate; in peri_clk_set_rate()
/openbmc/linux/drivers/clk/
H A Dclk.c74 unsigned long new_rate; member
1828 unsigned long old_rate, unsigned long new_rate) in __clk_notify() argument
1835 cnd.new_rate = new_rate; in __clk_notify()
2213 unsigned long new_rate; in __clk_speculate_rates() local
2218 new_rate = clk_recalc(core, parent_rate); in __clk_speculate_rates()
2222 ret = __clk_notify(core, PRE_RATE_CHANGE, core->rate, new_rate); in __clk_speculate_rates()
2231 ret = __clk_speculate_rates(child, new_rate); in __clk_speculate_rates()
2240 static void clk_calc_subtree(struct clk_core *core, unsigned long new_rate, in clk_calc_subtree() argument
2245 core->new_rate = new_rate; in clk_calc_subtree()
2254 child->new_rate = clk_recalc(child, new_rate); in clk_calc_subtree()
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/openbmc/u-boot/drivers/clk/imx/
H A Dclk-imx8.c141 u32 new_rate = rate; in imx8_clk_set_rate() local
219 ret = sc_pm_set_clock_rate(-1, resource, pm_clk, &new_rate); in imx8_clk_set_rate()
225 return new_rate; in imx8_clk_set_rate()
/openbmc/linux/drivers/net/wireless/intel/iwlegacy/
H A D4965-rs.c1077 s32 new_rate, high, low, start_hi; in il4965_rs_get_best_rate() local
1081 new_rate = high = low = start_hi = RATE_INVALID; in il4965_rs_get_best_rate()
1116 new_rate = start_hi; in il4965_rs_get_best_rate()
1120 new_rate = rate; in il4965_rs_get_best_rate()
1135 if (new_rate != RATE_INVALID) in il4965_rs_get_best_rate()
1145 new_rate = rate; in il4965_rs_get_best_rate()
1151 return new_rate; in il4965_rs_get_best_rate()
2357 u32 new_rate) in il4965_rs_fill_link_cmd() argument
2369 il4965_rs_dbgfs_set_mcs(lq_sta, &new_rate, idx); in il4965_rs_fill_link_cmd()
2372 il4965_rs_get_tbl_info_from_mcs(new_rate, lq_sta->band, &tbl_type, in il4965_rs_fill_link_cmd()
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/openbmc/linux/drivers/usb/serial/
H A Dcypress_m8.c235 static int analyze_baud_rate(struct usb_serial_port *port, speed_t new_rate) in analyze_baud_rate() argument
241 return new_rate; in analyze_baud_rate()
245 return new_rate; in analyze_baud_rate()
264 if (new_rate > 4800) { in analyze_baud_rate()
267 __func__, new_rate); in analyze_baud_rate()
273 if (new_rate <= 600) { in analyze_baud_rate()
279 __func__, new_rate); in analyze_baud_rate()
286 return new_rate; in analyze_baud_rate()

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