| /openbmc/linux/arch/csky/abiv2/inc/abi/ |
| H A D | ckmmu.h | 16 mtcr("cr<0, 15>", value); in write_mmu_index()
31 mtcr("cr<6, 15>", value); in write_mmu_pagemask()
41 mtcr("cr<4, 15>", value); in write_mmu_entryhi()
51 mtcr("cr<30, 15>", value); in write_mmu_msa0()
61 mtcr("cr<31, 15>", value); in write_mmu_msa1()
69 mtcr("cr<8, 15>", 0x80000000); in tlb_probe()
74 mtcr("cr<8, 15>", 0x40000000); in tlb_read()
88 mtcr("cr<8, 15>", 0x04000000); in tlb_invalid_all()
109 mtcr("cr<8, 15>", 0x02000000); in tlb_invalid_indexed()
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| H A D | entry.h | 73 mtcr a0, epc
75 mtcr a0, epsr
78 mtcr a0, usp
79 mtcr a0, ss0
87 mtcr a0, cr14
148 mtcr a0, cr14
192 mtcr lr, cr14
229 mtcr \rx, cr<4, 15>
233 mtcr \rx, cr<8, 15>
249 mtcr r6, psr
[all …]
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| H A D | fpu.h | 12 static inline void init_fpu(void) { mtcr("cr<1, 2>", 0); } in init_fpu()
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| /openbmc/linux/arch/csky/abiv1/inc/abi/ |
| H A D | entry.h | 21 mtcr sp, usp
26 mtcr sp, ss0
31 mtcr r13, ss2
84 mtcr a0, epc
86 mtcr a0, epsr
90 mtcr a0, ss1
156 mtcr r6, psr
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| /openbmc/linux/drivers/clocksource/ |
| H A D | timer-mp-csky.c | 23 mtcr(PTIM_LVR, delta); in csky_mptimer_set_next_event()
30 mtcr(PTIM_CTLR, 0); in csky_mptimer_shutdown()
37 mtcr(PTIM_CTLR, 1); in csky_mptimer_oneshot()
44 mtcr(PTIM_CTLR, 0); in csky_mptimer_oneshot_stopped()
66 mtcr(PTIM_TSR, 0); in csky_timer_interrupt()
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| /openbmc/linux/arch/csky/mm/ |
| H A D | cachev1.c | 27 mtcr("cr22", i); in cache_op_line()
28 mtcr("cr17", val); in cache_op_line()
34 mtcr("cr17", value | CACHE_CLR); in cache_op_all()
38 mtcr("cr24", value | CACHE_CLR); in cache_op_all()
72 mtcr("cr24", val); in cache_op_range()
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| H A D | cachev2.c | 19 mtcr("cr17", INS_CACHE|CACHE_INV); in local_icache_inv_all()
42 mtcr("cr22", i); in cache_op_line()
43 mtcr("cr17", val); in cache_op_line()
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| /openbmc/linux/arch/csky/kernel/ |
| H A D | smp.c | 224 mtcr("cr17", 0x22); in __cpu_up()
231 mtcr("cr<29, 0>", mask); in __cpu_up()
251 mtcr("cr31", secondary_hint); in csky_start_secondary()
252 mtcr("cr<21, 1>", secondary_hint2); in csky_start_secondary()
253 mtcr("cr18", secondary_ccr); in csky_start_secondary()
255 mtcr("vbr", vec_base); in csky_start_secondary()
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| H A D | head.S | 27 mtcr r6, cr<31, 15>
32 mtcr r6, cr<28, 15>
33 mtcr r6, cr<29, 15>
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| H A D | atomic.S | 53 mtcr a3, epc
55 mtcr a3, epsr
57 mtcr a3, usp
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| H A D | traps.c | 51 mtcr("vbr", vec_base); in pre_trap_init()
76 mtcr("cr<28, 0>", virt_to_phys(vec_base)); in trap_init()
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| /openbmc/linux/arch/csky/abiv2/ |
| H A D | fpu.c | 57 mtcr("cr<1, 2>", regx); in fpu_libc_helper()
59 mtcr("cr<2, 2>", regx); in fpu_libc_helper()
222 mtcr("cr<1, 2>", tmp1); in restore_from_user_fp()
223 mtcr("cr<2, 2>", tmp2); in restore_from_user_fp()
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| /openbmc/qemu/tests/tcg/tricore/c/ |
| H A D | crt0-tc2x.S | 61 mtcr $isp,%d0
68 mtcr $btv,%d0
78 mtcr $psw,%d0
87 mtcr $psw,%d0
111 mtcr $psw,%d0
161 mtcr $pcxi,%d0
182 mtcr $lcx,%d1 #; initialize LCX
197 mtcr $fcx,%d1 #; initialize FCX
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| /openbmc/u-boot/drivers/ddr/fsl/ |
| H A D | fsl_ddr_gen4.c | 67 u32 mtcr, err_detect, err_sbe; in fsl_ddr_set_memctl_regs() local
535 mtcr = BIST_CR; in fsl_ddr_set_memctl_regs()
536 ddr_out32(&ddr->mtcr, mtcr); in fsl_ddr_set_memctl_regs()
538 while (timeout > 0 && (mtcr & BIST_CR_EN)) { in fsl_ddr_set_memctl_regs()
541 mtcr = ddr_in32(&ddr->mtcr); in fsl_ddr_set_memctl_regs()
549 if (mtcr & BIST_CR_STAT) { in fsl_ddr_set_memctl_regs()
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| /openbmc/linux/arch/powerpc/kernel/ |
| H A D | entry_32.S | 156 mtcr r5
165 3: mtcr r5
224 mtcr r10
290 mtcr r3
344 mtcr r6
361 mtcr r6
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| H A D | rtas_entry.S | 85 mtcr r0
160 mtcr r4
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| H A D | interrupt_64.S | 153 mtcr r2
170 mtcr r2
347 mtcr r2
495 mtcr r3
663 mtcr r6
682 mtcr r6
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| /openbmc/linux/arch/powerpc/lib/ |
| H A D | test_emulate_step_exec_instr.S | 70 mtcr r0
139 mtcr r0
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| /openbmc/linux/arch/powerpc/kvm/ |
| H A D | book3s_rmhandlers.S | 62 2: mtcr r12
133 mtcr r12
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| H A D | book3s_64_entry.S | 236 mtcr r1
257 mtcr r1
332 mtcr r4
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| H A D | fpu.S | 125 mtcr r6
217 mtcr r6; \
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| H A D | tm.S | 137 mtcr r6
307 mtcr r6
357 mtcr r6
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| /openbmc/linux/arch/csky/include/asm/ |
| H A D | reg_ops.h | 17 #define mtcr(reg, val) \ macro
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| H A D | irqflags.h | 37 mtcr("psr", flags); in arch_local_irq_restore()
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| /openbmc/u-boot/post/lib_powerpc/ |
| H A D | asm.S | 116 mtcr r0
146 mtcr r0
295 mtcr r7
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