1*735ee005SGuo Ren /* SPDX-License-Identifier: GPL-2.0 */ 2*735ee005SGuo Ren 3*735ee005SGuo Ren #ifndef __ASM_REGS_OPS_H 4*735ee005SGuo Ren #define __ASM_REGS_OPS_H 5*735ee005SGuo Ren 6*735ee005SGuo Ren #define mfcr(reg) \ 7*735ee005SGuo Ren ({ \ 8*735ee005SGuo Ren unsigned int tmp; \ 9*735ee005SGuo Ren asm volatile( \ 10*735ee005SGuo Ren "mfcr %0, "reg"\n" \ 11*735ee005SGuo Ren : "=r"(tmp) \ 12*735ee005SGuo Ren : \ 13*735ee005SGuo Ren : "memory"); \ 14*735ee005SGuo Ren tmp; \ 15*735ee005SGuo Ren }) 16*735ee005SGuo Ren 17*735ee005SGuo Ren #define mtcr(reg, val) \ 18*735ee005SGuo Ren ({ \ 19*735ee005SGuo Ren asm volatile( \ 20*735ee005SGuo Ren "mtcr %0, "reg"\n" \ 21*735ee005SGuo Ren : \ 22*735ee005SGuo Ren : "r"(val) \ 23*735ee005SGuo Ren : "memory"); \ 24*735ee005SGuo Ren }) 25*735ee005SGuo Ren 26*735ee005SGuo Ren #endif /* __ASM_REGS_OPS_H */ 27