| /openbmc/u-boot/drivers/fpga/ |
| H A D | socfpga_gen5.c | 32 unsigned long msel, i; in fpgamgr_program_init() local
35 msel = readl(&fpgamgr_regs->stat); in fpgamgr_program_init()
36 msel &= FPGAMGRREGS_STAT_MSEL_MASK; in fpgamgr_program_init()
37 msel >>= FPGAMGRREGS_STAT_MSEL_LSB; in fpgamgr_program_init()
43 if (msel & 0x8) { in fpgamgr_program_init()
49 if ((msel & 0x3) == 0x0) in fpgamgr_program_init()
52 else if ((msel & 0x3) == 0x1) in fpgamgr_program_init()
55 else if ((msel & 0x3) == 0x2) in fpgamgr_program_init()
64 if ((msel & 0x3) == 0x0) in fpgamgr_program_init()
67 else if ((msel & 0x3) == 0x1) in fpgamgr_program_init()
[all …]
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| H A D | socfpga_arria10.c | 141 u32 msel = fpgamgr_get_msel(); in fpgamgr_verify_msel() local
143 if (msel & ~BIT(0)) { in fpgamgr_verify_msel()
144 printf("Fail: read msel=%d\n", msel); in fpgamgr_verify_msel()
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| /openbmc/linux/drivers/clk/nxp/ |
| H A D | clk-lpc18xx-cgu.c | 306 static u32 lpc18xx_pll0_msel2mdec(u32 msel) in lpc18xx_pll0_msel2mdec() argument
310 switch (msel) { in lpc18xx_pll0_msel2mdec()
315 for (i = msel; i <= LPC18XX_PLL0_MSEL_MAX; i++) in lpc18xx_pll0_msel2mdec()
322 static u32 lpc18xx_pll0_msel2seli(u32 msel) in lpc18xx_pll0_msel2seli() argument
326 if (msel > 16384) return 1; in lpc18xx_pll0_msel2seli()
327 if (msel > 8192) return 2; in lpc18xx_pll0_msel2seli()
328 if (msel > 2048) return 4; in lpc18xx_pll0_msel2seli()
329 if (msel >= 501) return 8; in lpc18xx_pll0_msel2seli()
330 if (msel >= 60) { in lpc18xx_pll0_msel2seli()
331 tmp = 1024 / (msel + 9); in lpc18xx_pll0_msel2seli()
[all …]
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| /openbmc/linux/drivers/fpga/ |
| H A D | socfpga-a10.c | 278 u32 msel, stat, mask; in socfpga_a10_fpga_write_init() local
287 msel = socfpga_a10_fpga_read_stat(priv); in socfpga_a10_fpga_write_init()
288 msel &= A10_FPGAMGR_IMGCFG_STAT_F2S_MSEL_MASK; in socfpga_a10_fpga_write_init()
289 msel >>= A10_FPGAMGR_IMGCFG_STAT_F2S_MSEL_SHIFT; in socfpga_a10_fpga_write_init()
290 if ((msel != 0) && (msel != 1)) { in socfpga_a10_fpga_write_init()
291 dev_dbg(&mgr->dev, "Fail: invalid msel=%d\n", msel); in socfpga_a10_fpga_write_init()
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| H A D | socfpga.c | 322 u32 msel; in socfpga_fpga_cfg_mode_get() local
324 msel = socfpga_fpga_readl(priv, SOCFPGA_FPGMGR_STAT_OFST); in socfpga_fpga_cfg_mode_get()
325 msel &= SOCFPGA_FPGMGR_STAT_MSEL_MASK; in socfpga_fpga_cfg_mode_get()
326 msel >>= SOCFPGA_FPGMGR_STAT_MSEL_SHIFT; in socfpga_fpga_cfg_mode_get()
329 if ((msel >= ARRAY_SIZE(cfgmgr_modes)) || !cfgmgr_modes[msel].valid) in socfpga_fpga_cfg_mode_get()
332 return msel; in socfpga_fpga_cfg_mode_get()
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| /openbmc/u-boot/arch/powerpc/cpu/mpc8xxx/ |
| H A D | fsl_lbc.c | 111 u32 msel = BR_UPMx_TO_MSEL(upm); in upmconfig() local
125 if ((get_lbc_br(i) & (BR_V | BR_MSEL)) == (BR_V | msel)) { in upmconfig()
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| /openbmc/qemu/docs/system/riscv/ |
| H A D | sifive_u.rst | 86 Otherwise QEMU will jump to DRAM or L2LIM depending on the msel= value.
89 - msel=[6|11]
108 msel=6 means FSBL and SSBL are both on the QSPI flash. msel=11 means FSBL
288 Boot U-Boot from SD card, by specifying msel=11 and pass the SD card image
293 $ qemu-system-riscv64 -M sifive_u,msel=11 -smp 5 -m 8G \
298 Changing msel= value to 6, allows booting U-Boot from the SPI flash:
302 $ qemu-system-riscv64 -M sifive_u,msel=6 -smp 5 -m 8G \
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| /openbmc/linux/drivers/pinctrl/renesas/ |
| H A D | sh_pfc.h | 381 #define PINMUX_IPSR_NOGM(ipsr, fn, msel) \ argument
382 PINMUX_DATA(fn##_MARK, FN_##fn, FN_##msel)
404 #define PINMUX_IPSR_MSEL(ipsr, fn, msel) \ argument
405 PINMUX_DATA(fn##_MARK, FN_##msel, FN_##fn, FN_##ipsr)
416 #define PINMUX_IPSR_PHYS_MSEL(ipsr, fn, psel, msel) \ argument
417 PINMUX_DATA(fn##_MARK, FN_##psel, FN_##msel, FN_##fn, FN_##ipsr)
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| /openbmc/qemu/include/hw/riscv/ |
| H A D | sifive_u.h | 74 uint32_t msel; member
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| /openbmc/u-boot/drivers/pinctrl/renesas/ |
| H A D | sh_pfc.h | 318 #define PINMUX_IPSR_NOGM(ipsr, fn, msel) \ argument
319 PINMUX_DATA(fn##_MARK, FN_##fn, FN_##msel)
341 #define PINMUX_IPSR_MSEL(ipsr, fn, msel) \ argument
342 PINMUX_DATA(fn##_MARK, FN_##msel, FN_##fn, FN_##ipsr)
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| H A D | pfc-r8a77995.c | 477 #define PINMUX_IPSR_PHYS(ipsr, fn, msel) \ argument
478 PINMUX_DATA(fn##_MARK, FN_##msel)
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| /openbmc/qemu/hw/riscv/ |
| H A D | sifive_u.c | 573 s->msel = MSEL_MEMMAP_QSPI0_FLASH; in sifive_u_machine_init()
576 switch (s->msel) { in sifive_u_machine_init()
618 s->msel, /* MSEL pin state */ in sifive_u_machine_init()
700 s->msel = 0; in sifive_u_machine_instance_init()
701 object_property_add_uint32_ptr(obj, "msel", &s->msel, in sifive_u_machine_instance_init()
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| /openbmc/linux/drivers/net/dsa/sja1105/ |
| H A D | sja1105_clocking.c | 57 u64 msel; member
329 sja1105_packing(buf, &cmd->msel, 23, 16, size, op); in sja1105_cgu_pll_control_packing()
701 pll.msel = 0x1; in sja1105_cgu_rmii_pll_config()
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