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Searched refs:misaligned (Results 1 – 25 of 43) sorted by relevance

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/openbmc/linux/block/
H A Dblk-settings.c58 lim->misaligned = 0; in blk_set_default_limits()
387 q->limits.misaligned = 0; in blk_queue_alignment_offset()
581 t->misaligned |= b->misaligned; in blk_stack_limits()
596 t->misaligned = 1; in blk_stack_limits()
618 t->misaligned = 1; in blk_stack_limits()
625 t->misaligned = 1; in blk_stack_limits()
632 t->misaligned = 1; in blk_stack_limits()
639 t->misaligned = 1; in blk_stack_limits()
653 t->misaligned = 1; in blk_stack_limits()
973 if (q->limits.misaligned) in bdev_alignment_offset()
/openbmc/linux/drivers/dma/
H A Dpxa_dma.c90 bool misaligned; member
112 bool misaligned; member
450 static void phy_enable(struct pxad_phy *phy, bool misaligned) in phy_enable() argument
460 phy, phy->idx, misaligned); in phy_enable()
469 if (misaligned) in phy_enable()
512 phy_enable(chan->phy, chan->misaligned); in pxad_launch_chan()
571 to_pxad_sw_desc(vd)->misaligned) in pxad_try_hotchain()
652 chan->misaligned = in pxad_chan_handler()
807 if (chan->misaligned || !to_pxad_sw_desc(vd)->misaligned) in pxad_tx_submit()
816 chan->misaligned |= to_pxad_sw_desc(vd)->misaligned; in pxad_tx_submit()
[all …]
/openbmc/linux/arch/nios2/kernel/
H A DMakefile26 obj-$(CONFIG_NIOS2_ALIGNMENT_TRAP) += misaligned.o
/openbmc/linux/arch/alpha/lib/
H A Dev67-strlen.S29 ldq_u $1, 0($16) # L : load first quadword ($16 may be misaligned)
H A Dev67-strcat.S35 ldq_u $1, 0($16) # L : load first quadword (a0 may be misaligned)
H A Dstrcat.S23 ldq_u $1, 0($16) # load first quadword (a0 may be misaligned)
H A Dstrlen.S25 ldq_u $1, 0($16) # load first quadword ($16 may be misaligned)
H A Dstrncat.S28 ldq_u $1, 0($16) # load first quadword ($16 may be misaligned)
H A Dev6-clear_user.S57 and $1, 7, $2 # .. .. E .. : number of misaligned bytes in tail
69 mskql $5, $16, $5 # .. U .. .. : take care of misaligned head
H A Dev67-strncat.S37 ldq_u $1, 0($16) # L : load first quadword ($16 may be misaligned)
H A Dev6-memcpy.S39 bne $1, $misaligned # U : Nope - gotta do this the slow way
181 $misaligned:
H A Dclear_user.S81 mskql $5, $16, $5 # e0 : take care of misaligned head
/openbmc/linux/Documentation/arch/arm/
H A Dmem_alignment.rst5 Too many problems popped up because of unnoticed misaligned memory access in
16 alignment trap can fixup misaligned access for the exception cases, but at
/openbmc/linux/Documentation/riscv/
H A Dhwprobe.rst83 * :c:macro:`RISCV_HWPROBE_MISALIGNED_UNKNOWN`: The performance of misaligned
98 not supported at all and will generate a misaligned address fault.
/openbmc/linux/arch/m68k/ifpsp060/
H A DCHANGES86 bit 27 = 1 (misaligned bit)
108 bit 27 = 0 (misaligned bit)
H A Disp.doc46 cas (w/ a misaligned effective address)
174 The instructions "cas2" and "cas" (when used with a misaligned effective
/openbmc/qemu/target/riscv/insn_trans/
H A Dtrans_rvi.c.inc54 * misaligned, according to spec we should raise sw check exception
98 TCGLabel *misaligned = NULL;
112 misaligned = gen_new_label();
114 tcg_gen_brcondi_tl(TCG_COND_NE, t0, 0x0, misaligned);
135 if (misaligned) {
136 gen_set_label(misaligned);
241 /* misaligned */
/openbmc/linux/scripts/coccinelle/misc/
H A Dcond_no_effect.cocci26 // /* misaligned */
/openbmc/qemu/tests/qemu-iotests/
H A D033.out4 === Test aligned and misaligned write zeroes operations ===
170 === Test misaligned write zeroes via truncate ===
/openbmc/linux/Documentation/core-api/
H A Dprintk-index.rst50 <5> block/blk-settings.c:661 disk_stack_limits "%s: Warning: Device %s is misaligned\n"
/openbmc/linux/lib/
H A DKconfig.ubsan136 bool "Perform checking for misaligned pointer usage"
/openbmc/qemu/hw/nvme/
H A Dtrace-events179 …ddr) "nvme_start_ctrl failed because the admin submission queue address is misaligned: 0x%"PRIx64""
180 …ddr) "nvme_start_ctrl failed because the admin completion queue address is misaligned: 0x%"PRIx64""
/openbmc/linux/Documentation/sphinx/
H A Dkerneldoc-preamble.sty183 % For CJK ascii-art alignment (still misaligned for Hangul)
/openbmc/linux/arch/arm/kernel/
H A Dhead.S589 THUMB( mov r6, r6, lsr #16 ) @ to be robust against misaligned r0.
/openbmc/linux/tools/perf/Documentation/
H A Dperf-arm-spe.txt154 bit 11 - misaligned access

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