11da177e4SLinus Torvalds~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 21da177e4SLinus TorvaldsMOTOROLA MICROPROCESSOR & MEMORY TECHNOLOGY GROUP 31da177e4SLinus TorvaldsM68000 Hi-Performance Microprocessor Division 41da177e4SLinus TorvaldsM68060 Software Package 51da177e4SLinus TorvaldsProduction Release P1.00 -- October 10, 1994 61da177e4SLinus Torvalds 7*96de0e25SJan EngelhardtM68060 Software Package Copyright © 1993, 1994 Motorola Inc. All rights reserved. 81da177e4SLinus Torvalds 91da177e4SLinus TorvaldsTHE SOFTWARE is provided on an "AS IS" basis and without warranty. 101da177e4SLinus TorvaldsTo the maximum extent permitted by applicable law, 111da177e4SLinus TorvaldsMOTOROLA DISCLAIMS ALL WARRANTIES WHETHER EXPRESS OR IMPLIED, 121da177e4SLinus TorvaldsINCLUDING IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE 131da177e4SLinus Torvaldsand any warranty against infringement with regard to the SOFTWARE 141da177e4SLinus Torvalds(INCLUDING ANY MODIFIED VERSIONS THEREOF) and any accompanying written materials. 151da177e4SLinus Torvalds 161da177e4SLinus TorvaldsTo the maximum extent permitted by applicable law, 171da177e4SLinus TorvaldsIN NO EVENT SHALL MOTOROLA BE LIABLE FOR ANY DAMAGES WHATSOEVER 181da177e4SLinus Torvalds(INCLUDING WITHOUT LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, 191da177e4SLinus TorvaldsBUSINESS INTERRUPTION, LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) 201da177e4SLinus TorvaldsARISING OF THE USE OR INABILITY TO USE THE SOFTWARE. 211da177e4SLinus TorvaldsMotorola assumes no responsibility for the maintenance and support of the SOFTWARE. 221da177e4SLinus Torvalds 231da177e4SLinus TorvaldsYou are hereby granted a copyright license to use, modify, and distribute the SOFTWARE 241da177e4SLinus Torvaldsso long as this entire notice is retained without alteration in any modified and/or 251da177e4SLinus Torvaldsredistributed versions, and that such modified versions are clearly identified as such. 261da177e4SLinus TorvaldsNo licenses are granted by implication, estoppel or otherwise under any patents 271da177e4SLinus Torvaldsor trademarks of Motorola, Inc. 281da177e4SLinus Torvalds~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 291da177e4SLinus Torvalds 301da177e4SLinus TorvaldsCHANGES SINCE LAST RELEASE: 311da177e4SLinus Torvalds--------------------------- 321da177e4SLinus Torvalds 331da177e4SLinus Torvalds1) "movep" emulation where data was being read from memory 341da177e4SLinus Torvaldswas reading the intermediate bytes. Emulation now only 351da177e4SLinus Torvaldsreads the required bytes. 361da177e4SLinus Torvalds 371da177e4SLinus Torvalds2) "flogn", "flog2", and "flog10" of "1" was setting the 381da177e4SLinus TorvaldsInexact FPSR bit. Emulation now does not set Inexact for 391da177e4SLinus Torvaldsthis case. 401da177e4SLinus Torvalds 411da177e4SLinus Torvalds3) For an opclass three FP instruction where the effective addressing 421da177e4SLinus Torvaldsmode was pre-decrement or post-increment and the address register 431da177e4SLinus Torvaldswas A0 or A1, the address register was not being updated as a result 441da177e4SLinus Torvaldsof the operation. This has been corrected. 451da177e4SLinus Torvalds 461da177e4SLinus Torvalds4) Beta B.2 version had the following erratum: 471da177e4SLinus Torvalds 481da177e4SLinus Torvalds Scenario: 491da177e4SLinus Torvalds --------- 501da177e4SLinus Torvalds If {i,d}mem_{read,write}_{byte,word,long}() returns 511da177e4SLinus Torvalds a failing value to the 68060SP, the package ignores 521da177e4SLinus Torvalds this return value and continues with program execution 531da177e4SLinus Torvalds as if it never received a failing value. 541da177e4SLinus Torvalds 551da177e4SLinus Torvalds Effect: 561da177e4SLinus Torvalds ------- 571da177e4SLinus Torvalds For example, if a user executed "fsin.x ADDR,fp0" where 581da177e4SLinus Torvalds ADDR should cause a "segmentation violation", the memory read 591da177e4SLinus Torvalds requested by the package should return a failing value 601da177e4SLinus Torvalds to the package. Since the package currently ignores this 611da177e4SLinus Torvalds return value, the user program will continue to the 621da177e4SLinus Torvalds next instruction, and the result created in fp0 will be 631da177e4SLinus Torvalds undefined. 641da177e4SLinus Torvalds 651da177e4SLinus Torvalds Fix: 661da177e4SLinus Torvalds ---- 671da177e4SLinus Torvalds This has been fixed in the current release. 681da177e4SLinus Torvalds 691da177e4SLinus Torvalds Notes: 701da177e4SLinus Torvalds ------ 711da177e4SLinus Torvalds Upon receiving a non-zero (failing) return value from 721da177e4SLinus Torvalds a {i,d}mem_{read,write}_{byte,word,long}() "call-out", 731da177e4SLinus Torvalds the package creates a 16-byte access error stack frame 741da177e4SLinus Torvalds from the current exception stack frame and exits 751da177e4SLinus Torvalds through the "call-out" _real_access(). This is the process 761da177e4SLinus Torvalds as described in the MC68060 User's Manual. 771da177e4SLinus Torvalds 781da177e4SLinus Torvalds For instruction read access errors, the info stacked is: 791da177e4SLinus Torvalds SR = SR at time of exception 801da177e4SLinus Torvalds PC = PC of instruction being emulated 811da177e4SLinus Torvalds VOFF = $4008 (stack frame format type) 821da177e4SLinus Torvalds ADDRESS = PC of instruction being emulated 831da177e4SLinus Torvalds FSLW = FAULT STATUS LONGWORD 841da177e4SLinus Torvalds 851da177e4SLinus Torvalds The valid FSLW bits are: 861da177e4SLinus Torvalds bit 27 = 1 (misaligned bit) 871da177e4SLinus Torvalds bit 24 = 1 (read) 881da177e4SLinus Torvalds bit 23 = 0 (write) 891da177e4SLinus Torvalds bit 22:21 = 10 (SIZE = word) 901da177e4SLinus Torvalds bit 20:19 = 00 (TT) 911da177e4SLinus Torvalds bit 18:16 = x10 (TM; x = 1 for supervisor mode) 921da177e4SLinus Torvalds bit 15 = 1 (IO) 931da177e4SLinus Torvalds bit 0 = 1 (Software Emulation Error) 941da177e4SLinus Torvalds 951da177e4SLinus Torvalds all other bits are EQUAL TO ZERO and can be set by the _real_access() 961da177e4SLinus Torvalds "call-out" stub by the user as appropriate. The MC68060 User's Manual 971da177e4SLinus Torvalds stated that ONLY "bit 0" would be set. The 060SP attempts to set a few 981da177e4SLinus Torvalds other bits. 991da177e4SLinus Torvalds 1001da177e4SLinus Torvalds For data read/write access errors, the info stacked is: 1011da177e4SLinus Torvalds SR = SR at time of exception 1021da177e4SLinus Torvalds PC = PC of instruction being emulated 1031da177e4SLinus Torvalds VOFF = $4008 (stack frame format type) 1041da177e4SLinus Torvalds ADDRESS = Address of source or destination operand 1051da177e4SLinus Torvalds FSLW = FAULT STATUS LONGWORD 1061da177e4SLinus Torvalds 1071da177e4SLinus Torvalds The valid FSLW bits are: 1081da177e4SLinus Torvalds bit 27 = 0 (misaligned bit) 1091da177e4SLinus Torvalds bit 24 = x (read; 1 if read, 0 if write) 1101da177e4SLinus Torvalds bit 23 = x (write; 1 if write, 0 if read) 1111da177e4SLinus Torvalds bit 22:21 = xx (SIZE; see MC68060 User's Manual) 1121da177e4SLinus Torvalds bit 20:19 = 00 (TT) 1131da177e4SLinus Torvalds bit 18:16 = x01 (TM; x = 1 for supervisor mode) 1141da177e4SLinus Torvalds bit 15 = 0 (IO) 1151da177e4SLinus Torvalds bit 0 = 1 (Software Emulation Error) 1161da177e4SLinus Torvalds 1171da177e4SLinus Torvalds all other bits are EQUAL TO ZERO and can be set by the _real_access() 1181da177e4SLinus Torvalds "call-out" stub by the user as appropriate. The MC68060 User's Manual 1191da177e4SLinus Torvalds stated that ONLY "bit 0" would be set. The 060SP attempts to set a few 1201da177e4SLinus Torvalds other bits. 121