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Searched refs:main_pll (Results 1 – 11 of 11) sorted by relevance

/openbmc/u-boot/arch/arm/mach-socfpga/
H A Dclock_manager_s10.c26 writel(val, &clock_manager_base->main_pll.bypass); in cm_write_bypass_mainpll()
71 &clock_manager_base->main_pll.pllglob); in cm_basic_init()
72 writel(cfg->main_pll_fdbck, &clock_manager_base->main_pll.fdbck); in cm_basic_init()
73 writel(vcocalib, &clock_manager_base->main_pll.vcocalib); in cm_basic_init()
74 writel(cfg->main_pll_pllc0, &clock_manager_base->main_pll.pllc0); in cm_basic_init()
75 writel(cfg->main_pll_pllc1, &clock_manager_base->main_pll.pllc1); in cm_basic_init()
76 writel(cfg->main_pll_nocdiv, &clock_manager_base->main_pll.nocdiv); in cm_basic_init()
102 setbits_le32(&clock_manager_base->main_pll.pllglob, in cm_basic_init()
118 writel(0xff, &clock_manager_base->main_pll.mpuclk); in cm_basic_init()
119 writel(0xff, &clock_manager_base->main_pll.nocclk); in cm_basic_init()
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H A Dclock_manager_gen5.c92 &clock_manager_base->main_pll.en); in cm_basic_init()
106 &clock_manager_base->main_pll.vco); in cm_basic_init()
124 &clock_manager_base->main_pll.l4src); in cm_basic_init()
127 readl(&clock_manager_base->main_pll.vco); in cm_basic_init()
136 writel(cfg->main_vco_base, &clock_manager_base->main_pll.vco); in cm_basic_init()
147 writel(cfg->mpuclk, &clock_manager_base->main_pll.mpuclk); in cm_basic_init()
153 writel(cfg->mainclk, &clock_manager_base->main_pll.mainclk); in cm_basic_init()
156 writel(cfg->dbgatclk, &clock_manager_base->main_pll.dbgatclk); in cm_basic_init()
160 &clock_manager_base->main_pll.cfgs2fuser0clk); in cm_basic_init()
169 writel(cfg->mainqspiclk, &clock_manager_base->main_pll.mainqspiclk); in cm_basic_init()
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H A Dclock_manager_arria10.c554 &clock_manager_base->main_pll.vco1); in cm_pll_ramp_main()
559 main_cfg->vco1_numer, &clock_manager_base->main_pll.vco1); in cm_pll_ramp_main()
641 &clock_manager_base->main_pll.enr); in cm_full_cfg()
648 &clock_manager_base->main_pll.bypasss); in cm_full_cfg()
660 &clock_manager_base->main_pll.vco0); in cm_full_cfg()
667 writel(CLKMGR_MAINPLL_VCO1_RESET, &clock_manager_base->main_pll.vco1); in cm_full_cfg()
693 &clock_manager_base->main_pll.vco1); in cm_full_cfg()
697 &clock_manager_base->main_pll.vco1); in cm_full_cfg()
723 clrbits_le32(&clock_manager_base->main_pll.vco0, in cm_full_cfg()
734 writel((readl(&clock_manager_base->main_pll.vco0) & in cm_full_cfg()
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/openbmc/u-boot/arch/arm/dts/
H A Dsocfpga_arria10.dtsi133 main_pll: main_pll@40 { label
146 clocks = <&main_pll>;
153 clocks = <&main_pll>;
161 clocks = <&main_pll>;
168 clocks = <&main_pll>;
175 clocks = <&main_pll>;
182 clocks = <&main_pll>;
190 clocks = <&main_pll>;
197 clocks = <&main_pll>;
204 clocks = <&main_pll>;
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H A Dsocfpga.dtsi142 main_pll: main_pll@40 { label
153 clocks = <&main_pll>;
161 clocks = <&main_pll>;
169 clocks = <&main_pll>, <&osc1>;
177 clocks = <&main_pll>;
184 clocks = <&main_pll>;
191 clocks = <&main_pll>;
/openbmc/linux/arch/arm/boot/dts/intel/socfpga/
H A Dsocfpga_arria10.dtsi119 main_pll: main_pll@40 { label
131 clocks = <&main_pll>;
138 clocks = <&main_pll>;
145 clocks = <&main_pll>;
152 clocks = <&main_pll>;
159 clocks = <&main_pll>;
166 clocks = <&main_pll>;
174 clocks = <&main_pll>;
181 clocks = <&main_pll>;
188 clocks = <&main_pll>;
[all …]
H A Dsocfpga.dtsi144 main_pll: main_pll@40 { label
155 clocks = <&main_pll>;
163 clocks = <&main_pll>;
171 clocks = <&main_pll>, <&osc1>;
179 clocks = <&main_pll>;
186 clocks = <&main_pll>;
193 clocks = <&main_pll>;
/openbmc/u-boot/arch/arm/mach-socfpga/include/mach/
H A Dclock_manager_arria10.h86 struct socfpga_clock_manager_main_pll main_pll; member
H A Dclock_manager_s10.h138 struct socfpga_clock_manager_main_pll main_pll; member
H A Dclock_manager_gen5.h107 struct socfpga_clock_manager_main_pll main_pll; member
/openbmc/linux/drivers/media/tuners/
H A Dtda18271-maps.c1036 struct tda18271_pll_map *main_pll; member
1065 map = priv->maps->main_pll; in tda18271_lookup_pll_map()
1242 .main_pll = tda18271c1_main_pll,
1255 .main_pll = tda18271c2_main_pll,