Merge branch 'master' of git://git.denx.de/u-boot-socfpga

dts: arm: socfpga: merge gen5 devicetrees from linux

Add -u-boot.dtsi files to keep the current U-Boot behaviour:
- add u-boot,dm-pre-reloc where required
- disable watchdog
- set uart clock frequen

dts: arm: socfpga: merge gen5 devicetrees from linux

Add -u-boot.dtsi files to keep the current U-Boot behaviour:
- add u-boot,dm-pre-reloc where required
- disable watchdog
- set uart clock frequency
- add gpio bank-name properties
where appropriate:
- make qspi work (add alias for spi0, fix compatible for flash)
- enable usb (status okay, add alias for udc0)

Adapt board dts files that are not in Linux to keep their old
behaviour.

Change licenses to SPDX.

(Patman warnings/errors are in 1:1 copied files from Linux)

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>

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spi: cadence_qspi: use "cdns,qspi-nor" as compatible

Linux uses "cdns,qspi-nor" as compatible string for the cadence
qspi driver, so change driver, docs and all device trees.

Signed-off-by: Simon G

spi: cadence_qspi: use "cdns,qspi-nor" as compatible

Linux uses "cdns,qspi-nor" as compatible string for the cadence
qspi driver, so change driver, docs and all device trees.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>

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Merge branch 'master' of git://git.denx.de/u-boot-socfpga

ARM: socfpga: Convert to DM serial

Pull the serial port configuration from DT and use DM serial instead
of having the serial configuration in two places, DT and board config.

Signed-off-by: Marek V

ARM: socfpga: Convert to DM serial

Pull the serial port configuration from DT and use DM serial instead
of having the serial configuration in two places, DT and board config.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>

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SPDX: Convert all of our single license tags to Linux Kernel style

When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from. So

SPDX: Convert all of our single license tags to Linux Kernel style

When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from. So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry. Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents. There's also a few places where I found we did not have a tag
and have introduced one.

Signed-off-by: Tom Rini <trini@konsulko.com>

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Merge git://git.denx.de/u-boot-socfpga

arm: dts: socfpga: add reset property

Add reset dts property to the i2c nodes.

Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>

arm: dts: socfpga: enables i2c0 in socfpga_de0_nano

Add all the appropriate i2c alias in the base socfpga dtsi and enables
the i2c node on the DE0 NANO board.

Signed-off-by: Dinh Nguyen <dinguyen@k

arm: dts: socfpga: enables i2c0 in socfpga_de0_nano

Add all the appropriate i2c alias in the base socfpga dtsi and enables
the i2c node on the DE0 NANO board.

Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>

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Merge git://git.denx.de/u-boot-spi

dts: cadence_spi: Sync DT bindings with Linux

Adopt the Linux DT bindings and clean-up duplicate
and unused values.

Fix indentation of the QSPI node in the keystone k2g
device tree.

Tested on TI K

dts: cadence_spi: Sync DT bindings with Linux

Adopt the Linux DT bindings and clean-up duplicate
and unused values.

Fix indentation of the QSPI node in the keystone k2g
device tree.

Tested on TI K2G platform:
Tested-by: Vignesh R <vigneshr@ti.com>

Tested on a socfpga-cyclonev board:
Tested-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>

Signed-off-by: Jason Rush <jarush@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Acked-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Acked-by: Marek Vasut <marex@denx.de>

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Merge git://git.denx.de/u-boot-socfpga

Conflicts:
configs/socfpga_arria5_defconfig
configs/socfpga_cyclone5_defconfig
configs/socfpga_socrates_defconfig

Merged these by hand and re-ran savedefco

Merge git://git.denx.de/u-boot-socfpga

Conflicts:
configs/socfpga_arria5_defconfig
configs/socfpga_cyclone5_defconfig
configs/socfpga_socrates_defconfig

Merged these by hand and re-ran savedefconfig on them.

Signed-off-by: Tom Rini <trini@konsulko.com>

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arm: socfpga: dts: Add bank-name property to each GPIO bank

Add "bank-name" property to each GPIO bank to give it unique name.
The approach here is exactly the same as with the "regulator-name"
prop

arm: socfpga: dts: Add bank-name property to each GPIO bank

Add "bank-name" property to each GPIO bank to give it unique name.
The approach here is exactly the same as with the "regulator-name"
property for regulators.

Signed-off-by: Marek Vasut <marex@denx.de>

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arm: socfpga: Make the DT mmc node consistent

The socfpga_cyclone5.dtsi has an mmc0 node, socrates has mmc node.
This makes aliases not very usable, so make everything into mmc0.
Moreover, zap the u

arm: socfpga: Make the DT mmc node consistent

The socfpga_cyclone5.dtsi has an mmc0 node, socrates has mmc node.
This makes aliases not very usable, so make everything into mmc0.
Moreover, zap the useless mmc alias while at this.

Signed-off-by: Marek Vasut <marex@denx.de>

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arm: dts: socfpga: Add mmc alias

Add alias for the SD/MMC controller, so it can be located by U-Boot OF support.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.alte

arm: dts: socfpga: Add mmc alias

Add alias for the SD/MMC controller, so it can be located by U-Boot OF support.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>

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arm: dts: socfpga: Fix SPI aliases

The SPI aliases are completely wrong. First, they point to non-existing
/spi@.* nodes instead of the correct /soc/spi@.* nodes. Second, the use
ad-hoc string inste

arm: dts: socfpga: Fix SPI aliases

The SPI aliases are completely wrong. First, they point to non-existing
/spi@.* nodes instead of the correct /soc/spi@.* nodes. Second, the use
ad-hoc string instead of a handle. Furthermore, they are copied multiple
times in each board DTS.

So fix it such that we move these into socfpga.dtsi and make them use
the usual handles.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>

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Merge branch 'master' of git://git.denx.de/u-boot

Merge branch 'master' of git://git.denx.de/u-boot-spi

spi: cadence_qspi: get sram size from device tree

sram size could be different on different socs, e.g. on stv0991 it is 256 while
on altera platform it is 128. It is better to receive it from device

spi: cadence_qspi: get sram size from device tree

sram size could be different on different socs, e.g. on stv0991 it is 256 while
on altera platform it is 128. It is better to receive it from device tree.

Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
Tested-by: Stefan Roese <sr@denx.de>
Reviewed-by: Jagannadh Teki <jteki@openedev.com>

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Merge branch 'master' of git://git.denx.de/u-boot-spi

dt: socfpga: Replace num-chipselect with num-cs

This optional DT property is called 'num-cs', so repair the misnomers.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@opensourc

dt: socfpga: Replace num-chipselect with num-cs

This optional DT property is called 'num-cs', so repair the misnomers.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@opensource.altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Pavel Machek <pavel@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Vince Bridgers <vbridger@opensource.altera.com>
Acked-by: Pavel Machek <pavel@denx.de>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>

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dt: socfpga: Rename snps, dw-spi-mmio to snps, dw-apb-ssi

Linux now also contains SPI driver, yet the name is 'snps,dw-apb-ssi'.
Fix the naming before we have to support both names.

Signed-off-by:

dt: socfpga: Rename snps, dw-spi-mmio to snps, dw-apb-ssi

Linux now also contains SPI driver, yet the name is 'snps,dw-apb-ssi'.
Fix the naming before we have to support both names.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@opensource.altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Pavel Machek <pavel@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Vince Bridgers <vbridger@opensource.altera.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Acked-by: Pavel Machek <pavel@denx.de>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>

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Merge branch 'master' of git://git.denx.de/u-boot-socfpga

arm: socfpga: dts: Add spi0/1 dts nodes for the Designware master SPI devices

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc:

arm: socfpga: dts: Add spi0/1 dts nodes for the Designware master SPI devices

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Vince Bridgers <vbridger@altera.com>
Cc: Marek Vasut <marex@denx.de>
Acked-by: Pavel Machek <pavel@denx.de>

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arm: socfpga: dts: Add Cadence QSPI DT node to socfpga.dtsi

This DT node is taken from the Rocketboard.org Linux repsitory. And
is needed to enable (configure) the Cadence DM SPI driver.

Signed-off

arm: socfpga: dts: Add Cadence QSPI DT node to socfpga.dtsi

This DT node is taken from the Rocketboard.org Linux repsitory. And
is needed to enable (configure) the Cadence DM SPI driver.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Vince Bridgers <vbridger@altera.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Pavel Machek <pavel@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>

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