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Searched refs:maccr (Results 1 – 15 of 15) sorted by relevance

/openbmc/u-boot/drivers/net/
H A Dftmac110.c52 uint32_t maccr; member
123 uint32_t maccr; in ftmac110_phyqry() local
128 maccr = MACCR_100M | MACCR_FD; in ftmac110_phyqry()
169 maccr = MACCR_100M | MACCR_FD; in ftmac110_phyqry()
171 maccr = MACCR_100M; in ftmac110_phyqry()
173 maccr = MACCR_FD; in ftmac110_phyqry()
175 maccr = 0; in ftmac110_phyqry()
178 maccr = MACCR_100M; in ftmac110_phyqry()
180 maccr = 0; in ftmac110_phyqry()
182 maccr |= MACCR_FD; in ftmac110_phyqry()
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H A Dftgmac100.c193 u32 maccr; in ftgmac100_phy_adjust_link() local
201 maccr = readl(&ftgmac100->maccr) & in ftgmac100_phy_adjust_link()
207 maccr |= FTGMAC100_MACCR_GIGA_MODE; in ftgmac100_phy_adjust_link()
210 maccr |= FTGMAC100_MACCR_FAST_MODE; in ftgmac100_phy_adjust_link()
213 maccr |= FTGMAC100_MACCR_FULLDUP; in ftgmac100_phy_adjust_link()
216 writel(maccr, &ftgmac100->maccr); in ftgmac100_phy_adjust_link()
254 setbits_le32(&ftgmac100->maccr, FTGMAC100_MACCR_SW_RST); in ftgmac100_reset()
256 while (readl(&ftgmac100->maccr) & FTGMAC100_MACCR_SW_RST) in ftgmac100_reset()
288 writel(0, &ftgmac100->maccr); in ftgmac100_stop()
300 unsigned int maccr; in ftgmac100_start() local
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H A Dftmac100.c39 writel (FTMAC100_MACCR_SW_RST, &ftmac100->maccr); in ftmac100_reset()
41 while (readl (&ftmac100->maccr) & FTMAC100_MACCR_SW_RST) in ftmac100_reset()
73 writel (0, &ftmac100->maccr); in _ftmac100_halt()
84 unsigned int maccr; in _ftmac100_init() local
126 maccr = FTMAC100_MACCR_XMT_EN | in _ftmac100_init()
135 writel (maccr, &ftmac100->maccr); in _ftmac100_init()
H A Dftmac100.h29 unsigned int maccr; /* 0x88 */ member
H A Dftmac110.h27 uint32_t maccr; /* 0x88: MAC Control Register */ member
H A Dftgmac100.h37 unsigned int maccr; /* 0x50 */ member
/openbmc/linux/drivers/net/ethernet/faraday/
H A Dftmac100.c123 unsigned int maccr; in ftmac100_reset() local
125 maccr = ioread32(priv->base + FTMAC100_OFFSET_MACCR); in ftmac100_reset()
126 if (!(maccr & FTMAC100_MACCR_SW_RST)) { in ftmac100_reset()
167 static void ftmac100_set_rx_bits(struct ftmac100 *priv, unsigned int *maccr) in ftmac100_set_rx_bits() argument
172 *maccr &= ~(FTMAC100_MACCR_RCV_ALL | FTMAC100_MACCR_RX_MULTIPKT | in ftmac100_set_rx_bits()
177 *maccr |= FTMAC100_MACCR_RCV_ALL; in ftmac100_set_rx_bits()
179 *maccr |= FTMAC100_MACCR_RX_MULTIPKT; in ftmac100_set_rx_bits()
181 *maccr |= FTMAC100_MACCR_HT_MULTI_EN; in ftmac100_set_rx_bits()
198 unsigned int maccr = MACCR_ENABLE_ALL; in ftmac100_start_hw() local
217 maccr |= FTMAC100_MACCR_RX_FTL; in ftmac100_start_hw()
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H A Dftgmac100.c114 static int ftgmac100_reset_mac(struct ftgmac100 *priv, u32 maccr) in ftgmac100_reset_mac() argument
120 iowrite32(maccr, priv->base + FTGMAC100_OFFSET_MACCR); in ftgmac100_reset_mac()
121 iowrite32(maccr | FTGMAC100_MACCR_SW_RST, in ftgmac100_reset_mac()
124 unsigned int maccr; in ftgmac100_reset_mac() local
126 maccr = ioread32(priv->base + FTGMAC100_OFFSET_MACCR); in ftgmac100_reset_mac()
127 if (!(maccr & FTGMAC100_MACCR_SW_RST)) in ftgmac100_reset_mac()
139 u32 maccr = 0; in ftgmac100_reset_and_config_mac() local
147 maccr |= FTGMAC100_MACCR_FAST_MODE; in ftgmac100_reset_and_config_mac()
151 maccr |= FTGMAC100_MACCR_GIGA_MODE; in ftgmac100_reset_and_config_mac()
165 if (ftgmac100_reset_mac(priv, maccr)) in ftgmac100_reset_and_config_mac()
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/openbmc/linux/drivers/net/ethernet/asix/
H A Dax88796c_ioctl.c73 int maccr = 0; in ax88796c_set_pauseparam() local
76 maccr |= (ax_local->flowctrl & AX_FC_RX) ? MACCR_RXFC_ENABLE : 0; in ax88796c_set_pauseparam()
77 maccr |= (ax_local->flowctrl & AX_FC_TX) ? MACCR_TXFC_ENABLE : 0; in ax88796c_set_pauseparam()
81 maccr |= AX_READ(&ax_local->ax_spi, P0_MACCR) & in ax88796c_set_pauseparam()
83 AX_WRITE(&ax_local->ax_spi, maccr, P0_MACCR); in ax88796c_set_pauseparam()
H A Dax88796c_main.c691 u16 maccr; in ax88796c_set_mac() local
693 maccr = (ax_local->link) ? MACCR_RXEN : 0; in ax88796c_set_mac()
697 maccr |= MACCR_SPEED_100; in ax88796c_set_mac()
708 maccr |= MACCR_SPEED_100; in ax88796c_set_mac()
719 maccr |= ax_local->pause ? MACCR_RXFC_ENABLE : 0; in ax88796c_set_mac()
720 maccr |= !ax_local->pause != !ax_local->asym_pause ? in ax88796c_set_mac()
723 maccr |= (ax_local->flowctrl & AX_FC_RX) ? MACCR_RXFC_ENABLE : 0; in ax88796c_set_mac()
724 maccr |= (ax_local->flowctrl & AX_FC_TX) ? MACCR_TXFC_ENABLE : 0; in ax88796c_set_mac()
729 maccr |= AX_READ(&ax_local->ax_spi, P0_MACCR) & in ax88796c_set_mac()
732 AX_WRITE(&ax_local->ax_spi, maccr, P0_MACCR); in ax88796c_set_mac()
/openbmc/qemu/hw/net/
H A Dftgmac100.c262 int max = (s->maccr & FTGMAC100_MACCR_JUMBO_LF ? 9216 : 1518); in ftgmac100_max_frame_size()
646 if ((s->maccr & (FTGMAC100_MACCR_RXDMA_EN | FTGMAC100_MACCR_RXMAC_EN)) in ftgmac100_can_receive()
676 uint32_t speed = (s->maccr & FTGMAC100_MACCR_FAST_MODE) ? 1 : 0; in ftgmac100_rxpoll()
682 if (s->maccr & FTGMAC100_MACCR_GIGA_MODE) { in ftgmac100_rxpoll()
710 s->maccr &= FTGMAC100_MACCR_GIGA_MODE | FTGMAC100_MACCR_FAST_MODE; in ftgmac100_do_reset()
712 s->maccr = 0; in ftgmac100_do_reset()
764 return s->maccr; in ftgmac100_read()
840 if ((s->maccr & (FTGMAC100_MACCR_TXDMA_EN | FTGMAC100_MACCR_TXMAC_EN)) in ftgmac100_write()
869 s->maccr = value; in ftgmac100_write()
993 if (s->maccr & FTGMAC100_MACCR_RX_ALL) { in ftgmac100_filter()
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/openbmc/u-boot/cmd/aspeed/nettest/
H A Dmac.c901 mac_cr_t maccr; in init_mac() local
904 maccr.w = 0; in init_mac()
905 maccr.b.sw_rst = 1; in init_mac()
906 mac_reg_write(eng, 0x50, maccr.w); in init_mac()
910 maccr.w = mac_reg_read(eng, 0x50); in init_mac()
911 } while(maccr.b.sw_rst); in init_mac()
941 maccr.b.txdma_en = 1; in init_mac()
942 maccr.b.rxdma_en = 1; in init_mac()
943 maccr.b.txmac_en = 1; in init_mac()
944 maccr.b.rxmac_en = 1; in init_mac()
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H A Dcomminf.h411 mac_cr_t maccr; member
H A Dmactest.c316 p_eng->reg.maccr.w = mac_reg_read(p_eng, 0x50); in push_reg()
341 mac_reg_write(p_eng, 0x50, p_eng->reg.maccr.w); in pop_reg()
/openbmc/qemu/include/hw/net/
H A Dftgmac100.h56 uint32_t maccr; member