| /openbmc/linux/drivers/phy/freescale/ |
| H A D | phy-fsl-lynx-28g.c | 24 #define LYNX_28G_LNa_PCC_OFFSET(lane) (4 * (LYNX_28G_NUM_LANE - (lane->id) - 1)) argument
47 #define LYNX_28G_LNaGCR0(lane) (0x800 + (lane) * 0x100 + 0x0) argument
56 #define LYNX_28G_LNaTRSTCTL(lane) (0x800 + (lane) * 0x100 + 0x20) argument
62 #define LYNX_28G_LNaTGCR0(lane) (0x800 + (lane) * 0x100 + 0x24) argument
71 #define LYNX_28G_LNaTECR0(lane) (0x800 + (lane) * 0x100 + 0x30) argument
74 #define LYNX_28G_LNaRRSTCTL(lane) (0x800 + (lane) * 0x100 + 0x40) argument
81 #define LYNX_28G_LNaRGCR0(lane) (0x800 + (lane) * 0x100 + 0x44) argument
91 #define LYNX_28G_LNaRGCR1(lane) (0x800 + (lane) * 0x100 + 0x48) argument
93 #define LYNX_28G_LNaRECR0(lane) (0x800 + (lane) * 0x100 + 0x50) argument
94 #define LYNX_28G_LNaRECR1(lane) (0x800 + (lane) * 0x100 + 0x54) argument
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| /openbmc/linux/drivers/phy/marvell/ |
| H A D | phy-mvebu-a3700-comphy.c | 184 #define COMPHY_PHY_REG(lane, reg) (((1 - (lane)) * 0x28) + ((reg) & 0x3f)) argument
227 unsigned int lane; member
234 .lane = _lane, \
397 static void comphy_lane_reg_set(struct mvebu_a3700_comphy_lane *lane, in comphy_lane_reg_set() argument
400 if (lane->id == 2) { in comphy_lane_reg_set()
402 comphy_set_indirect(lane->priv, in comphy_lane_reg_set()
406 void __iomem *base = lane->id == 1 ? in comphy_lane_reg_set()
407 lane->priv->lane1_phy_regs : in comphy_lane_reg_set()
408 lane->priv->lane0_phy_regs; in comphy_lane_reg_set()
415 static int comphy_lane_reg_poll(struct mvebu_a3700_comphy_lane *lane, in comphy_lane_reg_poll() argument
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| H A D | phy-mvebu-cp110-comphy.c | 182 unsigned lane; member
190 .lane = _lane, \
200 .lane = _lane, \
277 unsigned long lane, unsigned long mode) in mvebu_comphy_smc() argument
282 arm_smccc_smc(function, phys, lane, mode, 0, 0, 0, 0, &res); in mvebu_comphy_smc()
295 static int mvebu_comphy_get_mode(bool fw_mode, int lane, int port, in mvebu_comphy_get_mode() argument
309 if (conf->lane == lane && in mvebu_comphy_get_mode()
325 static inline int mvebu_comphy_get_mux(int lane, int port, in mvebu_comphy_get_mux() argument
328 return mvebu_comphy_get_mode(false, lane, port, mode, submode); in mvebu_comphy_get_mux()
331 static inline int mvebu_comphy_get_fw_mode(int lane, int port, in mvebu_comphy_get_fw_mode() argument
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| H A D | phy-armada38x-comphy.c | 47 struct a38x_comphy_lane lane[MAX_A38X_COMPHY]; member
59 static void a38x_set_conf(struct a38x_comphy_lane *lane, bool enable) in a38x_set_conf() argument
61 struct a38x_comphy *priv = lane->priv; in a38x_set_conf()
67 conf |= BIT(lane->port); in a38x_set_conf()
69 conf &= ~BIT(lane->port); in a38x_set_conf()
74 static void a38x_comphy_set_reg(struct a38x_comphy_lane *lane, in a38x_comphy_set_reg() argument
79 val = readl_relaxed(lane->base + offset) & ~mask; in a38x_comphy_set_reg()
80 writel(val | value, lane->base + offset); in a38x_comphy_set_reg()
83 static void a38x_comphy_set_speed(struct a38x_comphy_lane *lane, in a38x_comphy_set_speed() argument
86 a38x_comphy_set_reg(lane, COMPHY_CFG1, in a38x_comphy_set_speed()
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| /openbmc/linux/drivers/net/dsa/b53/ |
| H A D | b53_serdes.c | 42 static void b53_serdes_set_lane(struct b53_device *dev, u8 lane) in b53_serdes_set_lane() argument
44 if (dev->serdes_lane == lane) in b53_serdes_set_lane()
47 WARN_ON(lane > 1); in b53_serdes_set_lane()
50 SERDES_XGXSBLK0_BLOCKADDRESS, lane); in b53_serdes_set_lane()
51 dev->serdes_lane = lane; in b53_serdes_set_lane()
54 static void b53_serdes_write(struct b53_device *dev, u8 lane, in b53_serdes_write() argument
57 b53_serdes_set_lane(dev, lane); in b53_serdes_write()
61 static u16 b53_serdes_read(struct b53_device *dev, u8 lane, in b53_serdes_read() argument
64 b53_serdes_set_lane(dev, lane); in b53_serdes_read()
74 u8 lane = pcs_to_b53_pcs(pcs)->lane; in b53_serdes_config() local
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| /openbmc/u-boot/drivers/phy/marvell/ |
| H A D | comphy_a3700.c | 339 static void usb3_reg_set16(u32 reg, u16 data, u16 mask, u32 lane) in usb3_reg_set16() argument
349 if (lane == 2) in usb3_reg_set16()
361 static int comphy_usb3_power_up(u32 lane, u32 type, u32 speed, u32 invert) in comphy_usb3_power_up() argument
381 usb3_reg_set16(LANE_CFG0, 0x1, 0xFF, lane); in comphy_usb3_power_up()
395 | gen2_tx_data_dly_mask | tx_elec_idle_mode_en, lane); in comphy_usb3_power_up()
398 usb3_reg_set16(LANE_CFG4, bf_spread_spectrum_clock_en, 0x80, lane); in comphy_usb3_power_up()
404 usb3_reg_set16(TEST_MODE_CTRL, rb_mode_margin_override, 0xFFFF, lane); in comphy_usb3_power_up()
408 usb3_reg_set16(GLOB_CLK_SRC_LO, 0x0, 0xFF, lane); in comphy_usb3_power_up()
411 usb3_reg_set16(GEN2_SETTINGS_2, g2_tx_ssc_amp, 0xF000, lane); in comphy_usb3_power_up()
417 usb3_reg_set16(GEN2_SETTINGS_3, 0x0, 0xFFFF, lane); in comphy_usb3_power_up()
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| H A D | comphy_mux.c | 23 int lane, opt, valid; in comphy_mux_check_config() local
27 for (lane = 0; lane < comphy_max_lanes; in comphy_mux_check_config()
28 lane++, comphy_map_data++, mux_data++) { in comphy_mux_check_config()
43 lane, comphy_map_data->type); in comphy_mux_check_config()
44 debug("set lane %d as type %d\n", lane, in comphy_mux_check_config()
49 lane, comphy_map_data->type); in comphy_mux_check_config()
57 u32 type, int lane) in comphy_mux_get_mux_value() argument
84 u32 lane, value, offset, mask; in comphy_mux_reg_write() local
88 for (lane = 0; lane < comphy_max_lanes; in comphy_mux_reg_write()
89 lane++, comphy_map_data++, mux_data++) { in comphy_mux_reg_write()
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| H A D | comphy_core.c | 54 u32 lane; in comphy_print() local
56 for (lane = 0; lane < chip_cfg->comphy_lanes_count; in comphy_print()
57 lane++, comphy_map_data++) { in comphy_print()
59 printf("Comphy-%d: %-13s\n", lane, in comphy_print()
62 printf("Comphy-%d: %-13s %-10s\n", lane, in comphy_print()
81 int lane; in comphy_probe() local
128 lane = 0; in comphy_probe()
134 comphy_map_data[lane].speed = fdtdec_get_int( in comphy_probe()
136 comphy_map_data[lane].type = fdtdec_get_int( in comphy_probe()
138 comphy_map_data[lane].invert = fdtdec_get_int( in comphy_probe()
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| /openbmc/u-boot/arch/powerpc/cpu/mpc85xx/ |
| H A D | fsl_corenet_serdes.c | 95 int serdes_get_lane_idx(int lane) in serdes_get_lane_idx() argument
97 return lanes[lane].idx; in serdes_get_lane_idx()
100 int serdes_get_bank_by_lane(int lane) in serdes_get_bank_by_lane() argument
102 return lanes[lane].bank; in serdes_get_bank_by_lane()
105 int serdes_lane_enabled(int lane) in serdes_lane_enabled() argument
110 int bank = lanes[lane].bank; in serdes_lane_enabled()
111 int word = lanes[lane].lpd / 32; in serdes_lane_enabled()
112 int bit = lanes[lane].lpd % 32; in serdes_lane_enabled()
124 return !(srds_lpd_b[bank] & (8 >> (lane - (6 + 4 * bank)))); in serdes_lane_enabled()
189 int lane; in serdes_get_bank_by_device() local
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| H A D | p1010_serdes.c | 57 int lane; in fsl_serdes_init() local
69 for (lane = 0; lane < SRDS1_MAX_LANES; lane++) { in fsl_serdes_init()
70 enum srds_prtcl lane_prtcl = serdes1_cfg_tbl[srds_cfg][lane]; in fsl_serdes_init()
82 for (lane = 0; lane < SRDS2_MAX_LANES; lane++) { in fsl_serdes_init()
83 enum srds_prtcl lane_prtcl = serdes2_cfg_tbl[srds_cfg][lane]; in fsl_serdes_init()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/link/protocols/ |
| H A D | link_dp_training_fixed_vs_pe_retimer.c | 52 uint8_t lane; in dp_fixed_vs_pe_read_lane_adjust() local
65 for (lane = 0; lane < LANE_COUNT_DP_MAX; lane++) { in dp_fixed_vs_pe_read_lane_adjust()
66 dpcd_lane_adjust[lane].bits.VOLTAGE_SWING_SET = (dprx_vs >> (2 * lane)) & 0x3; in dp_fixed_vs_pe_read_lane_adjust()
67 dpcd_lane_adjust[lane].bits.PRE_EMPHASIS_SET = (dprx_pe >> (2 * lane)) & 0x3; in dp_fixed_vs_pe_read_lane_adjust()
80 uint8_t lane = 0; in dp_fixed_vs_pe_set_retimer_lane_settings() local
82 for (lane = 0; lane < lane_count; lane++) { in dp_fixed_vs_pe_set_retimer_lane_settings()
84 dpcd_lane_adjust[lane].bits.VOLTAGE_SWING_SET << (2 * lane); in dp_fixed_vs_pe_set_retimer_lane_settings()
86 dpcd_lane_adjust[lane].bits.PRE_EMPHASIS_SET << (2 * lane); in dp_fixed_vs_pe_set_retimer_lane_settings()
106 uint8_t lane = 0; in perform_fixed_vs_pe_nontransparent_training_sequence() local
168 for (lane = 0; lane < LANE_COUNT_DP_MAX; lane++) { in perform_fixed_vs_pe_nontransparent_training_sequence()
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| H A D | link_dp_training.c | 305 uint32_t lane; in maximize_lane_settings() local
313 for (lane = 1; lane < lt_settings->link_settings.lane_count; lane++) { in maximize_lane_settings()
314 if (lane_settings[lane].VOLTAGE_SWING > max_requested.VOLTAGE_SWING) in maximize_lane_settings()
315 max_requested.VOLTAGE_SWING = lane_settings[lane].VOLTAGE_SWING; in maximize_lane_settings()
317 if (lane_settings[lane].PRE_EMPHASIS > max_requested.PRE_EMPHASIS) in maximize_lane_settings()
318 max_requested.PRE_EMPHASIS = lane_settings[lane].PRE_EMPHASIS; in maximize_lane_settings()
319 if (lane_settings[lane].FFE_PRESET.settings.level > in maximize_lane_settings()
322 lane_settings[lane].FFE_PRESET.settings.level; in maximize_lane_settings()
343 for (lane = 0; lane < LANE_COUNT_DP_MAX; lane++) { in maximize_lane_settings()
344 lane_settings[lane].VOLTAGE_SWING = max_requested.VOLTAGE_SWING; in maximize_lane_settings()
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| /openbmc/u-boot/board/highbank/ |
| H A D | ahci.c | 81 static void cphy_spread_spectrum_override(u8 phy, u8 lane, u32 val) in cphy_spread_spectrum_override() argument
84 tmp = combo_phy_read(phy, CPHY_RX_INPUT_STS + lane * SPHY_LANE); in cphy_spread_spectrum_override()
86 combo_phy_write(phy, CPHY_RX_INPUT_OVERRIDE + lane * SPHY_LANE, tmp); in cphy_spread_spectrum_override()
89 combo_phy_write(phy, CPHY_RX_INPUT_OVERRIDE + lane * SPHY_LANE, tmp); in cphy_spread_spectrum_override()
93 combo_phy_write(phy, CPHY_RX_INPUT_OVERRIDE + lane * SPHY_LANE, tmp); in cphy_spread_spectrum_override()
96 static void cphy_tx_attenuation_override(u8 phy, u8 lane) in cphy_tx_attenuation_override() argument
102 shift = ((phy == 5) ? 4 : lane) * 4; in cphy_tx_attenuation_override()
109 tmp = combo_phy_read(phy, CPHY_TX_INPUT_STS + lane * SPHY_LANE); in cphy_tx_attenuation_override()
111 combo_phy_write(phy, CPHY_TX_INPUT_OVERRIDE + lane * SPHY_LANE, tmp); in cphy_tx_attenuation_override()
114 combo_phy_write(phy, CPHY_TX_INPUT_OVERRIDE + lane * SPHY_LANE, tmp); in cphy_tx_attenuation_override()
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| /openbmc/linux/drivers/phy/tegra/ |
| H A D | xusb.c | 115 int tegra_xusb_lane_parse_dt(struct tegra_xusb_lane *lane, in tegra_xusb_lane_parse_dt() argument
118 struct device *dev = &lane->pad->dev; in tegra_xusb_lane_parse_dt()
126 err = match_string(lane->soc->funcs, lane->soc->num_funcs, function); in tegra_xusb_lane_parse_dt()
133 lane->function = err; in tegra_xusb_lane_parse_dt()
141 struct tegra_xusb_lane *lane = phy_get_drvdata(phy); in tegra_xusb_lane_destroy() local
143 lane->pad->ops->remove(lane); in tegra_xusb_lane_destroy()
191 struct phy *lane; in tegra_xusb_pad_register() local
199 pad->lanes = devm_kcalloc(&pad->dev, pad->soc->num_lanes, sizeof(lane), in tegra_xusb_pad_register()
208 struct tegra_xusb_lane *lane; in tegra_xusb_pad_register() local
223 lane = pad->ops->probe(pad, np, i); in tegra_xusb_pad_register()
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| H A D | xusb.h | 55 int tegra_xusb_lane_parse_dt(struct tegra_xusb_lane *lane,
63 to_usb3_lane(struct tegra_xusb_lane *lane) in to_usb3_lane() argument
65 return container_of(lane, struct tegra_xusb_usb3_lane, base); in to_usb3_lane()
76 to_usb2_lane(struct tegra_xusb_lane *lane) in to_usb2_lane() argument
78 return container_of(lane, struct tegra_xusb_usb2_lane, base); in to_usb2_lane()
86 to_ulpi_lane(struct tegra_xusb_lane *lane) in to_ulpi_lane() argument
88 return container_of(lane, struct tegra_xusb_ulpi_lane, base); in to_ulpi_lane()
105 to_hsic_lane(struct tegra_xusb_lane *lane) in to_hsic_lane() argument
107 return container_of(lane, struct tegra_xusb_hsic_lane, base); in to_hsic_lane()
115 to_pcie_lane(struct tegra_xusb_lane *lane) in to_pcie_lane() argument
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| H A D | xusb-tegra210.c | 447 static int tegra210_usb3_lane_map(struct tegra_xusb_lane *lane) in tegra210_usb3_lane_map() argument
452 if (map->index == lane->index && in tegra210_usb3_lane_map()
453 strcmp(map->type, lane->pad->soc->name) == 0) { in tegra210_usb3_lane_map()
454 dev_dbg(lane->pad->padctl->dev, "lane = %s map to port = usb3-%d\n", in tegra210_usb3_lane_map()
455 lane->pad->soc->lanes[lane->index].name, map->port); in tegra210_usb3_lane_map()
706 struct tegra_xusb_lane *lane = tegra_xusb_find_lane(padctl, "sata", 0); in tegra210_sata_uphy_enable() local
716 if (IS_ERR(lane)) in tegra210_sata_uphy_enable()
722 usb = tegra_xusb_lane_check(lane, "usb3-ss"); in tegra210_sata_uphy_enable()
1058 static int tegra210_usb3_enable_phy_sleepwalk(struct tegra_xusb_lane *lane, in tegra210_usb3_enable_phy_sleepwalk() argument
1061 struct tegra_xusb_padctl *padctl = lane->pad->padctl; in tegra210_usb3_enable_phy_sleepwalk()
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| H A D | xusb-tegra124.c | 292 struct tegra_xusb_lane *lane; in tegra124_usb3_save_context() local
300 lane = port->base.lane; in tegra124_usb3_save_context()
302 if (lane->pad == padctl->pcie) in tegra124_usb3_save_context()
303 offset = XUSB_PADCTL_IOPHY_MISC_PAD_PX_CTL6(lane->index); in tegra124_usb3_save_context()
452 static void tegra124_usb2_lane_remove(struct tegra_xusb_lane *lane) in tegra124_usb2_lane_remove() argument
454 struct tegra_xusb_usb2_lane *usb2 = to_usb2_lane(lane); in tegra124_usb2_lane_remove()
466 struct tegra_xusb_lane *lane = phy_get_drvdata(phy); in tegra124_usb2_phy_init() local
468 return tegra124_xusb_padctl_enable(lane->pad->padctl); in tegra124_usb2_phy_init()
473 struct tegra_xusb_lane *lane = phy_get_drvdata(phy); in tegra124_usb2_phy_exit() local
475 return tegra124_xusb_padctl_disable(lane->pad->padctl); in tegra124_usb2_phy_exit()
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| /openbmc/linux/drivers/phy/ |
| H A D | phy-xgene.c | 658 static void serdes_wr(struct xgene_phy_ctx *ctx, int lane, u32 reg, u32 data) in serdes_wr() argument
664 reg += lane * SERDES_LANE_STRIDE; in serdes_wr()
673 static void serdes_rd(struct xgene_phy_ctx *ctx, int lane, u32 reg, u32 *data) in serdes_rd() argument
678 reg += lane * SERDES_LANE_STRIDE; in serdes_rd()
684 static void serdes_clrbits(struct xgene_phy_ctx *ctx, int lane, u32 reg, in serdes_clrbits() argument
689 serdes_rd(ctx, lane, reg, &val); in serdes_clrbits()
691 serdes_wr(ctx, lane, reg, val); in serdes_clrbits()
694 static void serdes_setbits(struct xgene_phy_ctx *ctx, int lane, u32 reg, in serdes_setbits() argument
699 serdes_rd(ctx, lane, reg, &val); in serdes_setbits()
701 serdes_wr(ctx, lane, reg, val); in serdes_setbits()
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| /openbmc/linux/drivers/net/dsa/mv88e6xxx/ |
| H A D | serdes.c | 37 int lane, int device, int reg, u16 *val) in mv88e6390_serdes_read() argument
39 return mv88e6xxx_phy_read_c45(chip, lane, device, reg, val); in mv88e6390_serdes_read()
244 int lane = -ENODEV; in mv88e6341_serdes_get_lane() local
251 lane = MV88E6341_PORT5_LANE; in mv88e6341_serdes_get_lane()
255 return lane; in mv88e6341_serdes_get_lane()
261 int lane = -ENODEV; in mv88e6390_serdes_get_lane() local
268 lane = MV88E6390_PORT9_LANE0; in mv88e6390_serdes_get_lane()
274 lane = MV88E6390_PORT10_LANE0; in mv88e6390_serdes_get_lane()
278 return lane; in mv88e6390_serdes_get_lane()
286 int lane = -ENODEV; in mv88e6390x_serdes_get_lane() local
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| /openbmc/u-boot/board/freescale/p2041rdb/ |
| H A D | eth.c | 92 int lane = serdes_get_first_lane(SGMII_FM1_DTSEC1 + port); in board_ft_fman_fixup_port() local
94 if (lane < 0) in board_ft_fman_fixup_port()
96 slot = lane_to_slot[lane]; in board_ft_fman_fixup_port()
112 int lane = serdes_get_first_lane(XAUI_FM1); in board_ft_fman_fixup_port() local
113 if (lane >= 0) { in board_ft_fman_fixup_port()
115 sprintf(phy, "phy_xgmii_%u", lane_to_slot[lane]); in board_ft_fman_fixup_port()
128 int lane; in board_eth_init() local
163 lane = serdes_get_first_lane(SGMII_FM1_DTSEC1 + idx); in board_eth_init()
164 if (lane < 0) in board_eth_init()
166 slot = lane_to_slot[lane]; in board_eth_init()
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| /openbmc/linux/drivers/gpu/drm/i915/display/ |
| H A D | intel_cx0_phy_regs.h | 15 #define XELPDP_PORT_M2P_MSGBUS_CTL(port, lane) _MMIO(_PICK_EVEN_2RANGES(port, PORT_TC1, \ argument
19 _XELPDP_PORT_M2P_MSGBUS_CTL_LN0_USBC2) + (lane) * 4)
30 #define XELPDP_PORT_P2M_MSGBUS_STATUS(port, lane) _MMIO(_PICK_EVEN_2RANGES(port, PORT_TC1, \ argument
34 _XELPDP_PORT_M2P_MSGBUS_CTL_LN0_USBC2) + (lane) * 4 + 8)
84 #define XELPDP_LANE_PIPE_RESET(lane) _PICK(lane, REG_BIT(31), REG_BIT(30)) argument
85 #define XELPDP_LANE_PHY_CURRENT_STATUS(lane) _PICK(lane, REG_BIT(29), REG_BIT(28)) argument
86 #define XELPDP_LANE_POWERDOWN_UPDATE(lane) _PICK(lane, REG_BIT(25), REG_BIT(24)) argument
91 #define XELPDP_LANE_POWERDOWN_NEW_STATE(lane, val) _PICK(lane, \ argument
122 #define XELPDP_LANE_PCLK_PLL_REQUEST(lane) REG_BIT(31 - ((lane) * 4)) argument
123 #define XELPDP_LANE_PCLK_PLL_ACK(lane) REG_BIT(30 - ((lane) * 4)) argument
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| /openbmc/u-boot/board/freescale/corenet_ds/ |
| H A D | eth_superhydra.c | 217 int lane, slot, phy; in board_ft_fman_fixup_port() local
224 lane = serdes_get_first_lane(device); in board_ft_fman_fixup_port()
225 slot = lane_to_slot[lane]; in board_ft_fman_fixup_port()
299 int lane, slot; in fdt_fixup_board_enet() local
306 lane = serdes_get_first_lane(SGMII_FM1_DTSEC1 + idx); in fdt_fixup_board_enet()
307 if (lane >= 0) { in fdt_fixup_board_enet()
310 slot = lane_to_slot[lane]; in fdt_fixup_board_enet()
326 lane = serdes_get_first_lane(XAUI_FM1); in fdt_fixup_board_enet()
327 if (lane >= 0) { in fdt_fixup_board_enet()
330 slot = lane_to_slot[lane]; in fdt_fixup_board_enet()
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| /openbmc/u-boot/board/freescale/t1040qds/ |
| H A D | eth.c | 299 int lane = serdes_get_first_lane(FSL_SRDS_1, SGMII_FM1_DTSEC1 in board_ft_fman_fixup_port() local
302 if (lane < 0) in board_ft_fman_fixup_port()
304 slot = lane_to_slot[lane]; in board_ft_fman_fixup_port()
317 int i, lane, idx; in fdt_fixup_board_enet() local
323 lane = serdes_get_first_lane(FSL_SRDS_1, in fdt_fixup_board_enet()
325 if (lane < 0) in fdt_fixup_board_enet()
369 int lane, idx, slot; in t1040_handle_phy_interface_sgmii() local
371 lane = serdes_get_first_lane(FSL_SRDS_1, in t1040_handle_phy_interface_sgmii()
374 if (lane < 0) in t1040_handle_phy_interface_sgmii()
376 slot = lane_to_slot[lane]; in t1040_handle_phy_interface_sgmii()
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| /openbmc/u-boot/arch/powerpc/cpu/mpc86xx/ |
| H A D | mpc8610_serdes.c | 54 int lane; in fsl_serdes_init() local
66 for (lane = 0; lane < SRDS1_MAX_LANES; lane++) { in fsl_serdes_init()
67 enum srds_prtcl lane_prtcl = serdes1_cfg_tbl[srds_cfg][lane]; in fsl_serdes_init()
79 for (lane = 0; lane < SRDS2_MAX_LANES; lane++) { in fsl_serdes_init()
80 enum srds_prtcl lane_prtcl = serdes2_cfg_tbl[srds_cfg][lane]; in fsl_serdes_init()
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| /openbmc/u-boot/arch/arm/mach-tegra/ |
| H A D | xusb-padctl-common.c | 129 const struct tegra_xusb_padctl_lane *lane, in tegra_xusb_padctl_lane_find_function() argument
139 for (i = 0; i < lane->num_funcs; i++) in tegra_xusb_padctl_lane_find_function()
140 if (lane->funcs[i] == func) in tegra_xusb_padctl_lane_find_function()
153 const struct tegra_xusb_padctl_lane *lane; in tegra_xusb_padctl_group_apply() local
157 lane = tegra_xusb_padctl_find_lane(padctl, group->pins[i]); in tegra_xusb_padctl_group_apply()
158 if (!lane) { in tegra_xusb_padctl_group_apply()
163 func = tegra_xusb_padctl_lane_find_function(padctl, lane, in tegra_xusb_padctl_group_apply()
167 group->func, lane->name, func); in tegra_xusb_padctl_group_apply()
171 value = padctl_readl(padctl, lane->offset); in tegra_xusb_padctl_group_apply()
174 value &= ~(lane->mask << lane->shift); in tegra_xusb_padctl_group_apply()
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