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Searched refs:instrs (Results 1 – 25 of 37) sorted by relevance

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/openbmc/linux/arch/powerpc/lib/
H A Dfeature-fixups.c134 static int do_patch_fixups(long *start, long *end, unsigned int *instrs, int num) in do_patch_fixups() argument
142 if (!is_fixup_addr_valid(dest, sizeof(*instrs) * num)) in do_patch_fixups()
148 patch_instruction(dest + j, ppc_inst(instrs[j])); in do_patch_fixups()
155 static int do_patch_entry_fixups(long *start, long *end, unsigned int *instrs, in do_patch_entry_fixups() argument
163 if (!is_fixup_addr_valid(dest, sizeof(*instrs) * 3)) in do_patch_entry_fixups()
170 patch_instruction(dest, ppc_inst(instrs[0])); in do_patch_entry_fixups()
171 patch_instruction(dest + 2, ppc_inst(instrs[2])); in do_patch_entry_fixups()
174 patch_instruction(dest + 1, ppc_inst(instrs[1])); in do_patch_entry_fixups()
175 patch_instruction(dest + 2, ppc_inst(instrs[2])); in do_patch_entry_fixups()
176 patch_instruction(dest, ppc_inst(instrs[0])); in do_patch_entry_fixups()
[all …]
/openbmc/linux/drivers/mtd/nand/raw/
H A Dnand_base.c1143 struct nand_op_instr instrs[] = { in nand_sp_exec_read_page_op() local
1150 struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs); in nand_sp_exec_read_page_op()
1158 instrs[0].ctx.cmd.opcode = NAND_CMD_READOOB; in nand_sp_exec_read_page_op()
1161 instrs[0].ctx.cmd.opcode = NAND_CMD_READ1; in nand_sp_exec_read_page_op()
1172 instrs[1].ctx.addr.naddrs++; in nand_sp_exec_read_page_op()
1185 struct nand_op_instr instrs[] = { in nand_lp_exec_read_page_op() local
1193 struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs); in nand_lp_exec_read_page_op()
1209 instrs[1].ctx.addr.naddrs++; in nand_lp_exec_read_page_op()
1384 struct nand_op_instr instrs[] = { in nand_read_param_page_op() local
1392 struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs); in nand_read_param_page_op()
[all …]
H A Dfsl_upm.c148 ret = func_exec_instr(chip, &op->instrs[i]); in fun_exec_op()
152 if (op->instrs[i].delay_ns) in fun_exec_op()
153 ndelay(op->instrs[i].delay_ns); in fun_exec_op()
H A Dnand_hynix.c75 struct nand_op_instr instrs[] = { in hynix_nand_cmd_op() local
78 struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs); in hynix_nand_cmd_op()
93 struct nand_op_instr instrs[] = { in hynix_nand_reg_write_op() local
97 struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs); in hynix_nand_reg_write_op()
H A Dgpio.c151 ret = gpio_nand_exec_instr(chip, &op->instrs[i]); in gpio_nand_exec_op()
155 if (op->instrs[i].delay_ns) in gpio_nand_exec_op()
156 ndelay(op->instrs[i].delay_ns); in gpio_nand_exec_op()
H A Darasan-nand-controller.c615 instr = &subop->instrs[op_id]; in anfc_parse_instructions()
768 if (subop->instrs[0].ctx.cmd.opcode == NAND_CMD_RNDOUT && in anfc_data_read_type_exec()
769 subop->instrs[2].ctx.cmd.opcode == NAND_CMD_RNDOUTSTART) in anfc_data_read_type_exec()
820 if (subop->instrs[0].ctx.cmd.opcode != NAND_CMD_STATUS) in anfc_status_type_exec()
828 memcpy(subop->instrs[1].ctx.data.buf.in, &tmp, 1); in anfc_status_type_exec()
917 instr = &op->instrs[op_id]; in anfc_check_op()
950 op->instrs[0].type == NAND_OP_CMD_INSTR && in anfc_check_op()
951 op->instrs[0].ctx.cmd.opcode != NAND_CMD_STATUS && in anfc_check_op()
952 op->instrs[1].type == NAND_OP_DATA_IN_INSTR) in anfc_check_op()
H A Dnand_toshiba.c37 struct nand_op_instr instrs[] = { in toshiba_nand_benand_read_eccstatus_op() local
42 struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs); in toshiba_nand_benand_read_eccstatus_op()
H A Dnand_macronix.c264 struct nand_op_instr instrs[] = { in nand_power_down_op() local
268 struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs); in nand_power_down_op()
H A Dams-delta.c151 for (instr = op->instrs; instr < op->instrs + op->ninstrs; instr++) { in gpio_nand_exec_op()
H A Dcadence-nand-controller.c2053 instr = &subop->instrs[op_id]; in cadence_nand_cmd_opcode()
2087 instr = &subop->instrs[op_id]; in cadence_nand_cmd_address()
2121 if (subop->instrs[0].ctx.cmd.opcode == NAND_CMD_ERASE1) { in cadence_nand_cmd_erase()
2128 instr = &subop->instrs[1]; in cadence_nand_cmd_erase()
2147 .instrs = &subop->instrs[op_id], in cadence_nand_cmd_erase()
2168 instr = &subop->instrs[op_id]; in cadence_nand_cmd_data()
2234 const struct nand_op_instr *instr = &subop->instrs[op_id]; in cadence_nand_cmd_waitrdy()
H A Ddiskonchip.c348 struct nand_op_instr instrs[] = { in doc200x_readid() local
354 struct nand_operation op = NAND_OPERATION(cs, instrs); in doc200x_readid()
583 doc200x_exec_instr(this, &op->instrs[i]); in doc200x_exec_op()
655 doc2001plus_exec_instr(this, &op->instrs[i]); in doc2001plus_exec_op()
H A Dau1550nd.c227 ret = au1550nd_exec_instr(this, &op->instrs[i]); in au1550nd_exec_op()
H A Dcs553x_nand.c206 ret = cs553x_exec_instr(cs553x, &op->instrs[i]); in cs553x_exec_op()
H A Dqcom_nandc.c2604 instr = &subop->instrs[op_id]; in qcom_parse_instructions()
2802 int instrs = 1; in qcom_misc_cmd_type_exec() local
2817 instrs = 3; in qcom_misc_cmd_type_exec()
2832 write_reg_dma(nandc, NAND_FLASH_CMD, instrs, NAND_BAM_NEXT_SGL); in qcom_misc_cmd_type_exec()
2981 instr = &op->instrs[op_id]; in qcom_check_op()
H A Dmxic_nand.c402 instr = &op->instrs[op_id]; in mxic_nfc_exec_op()
H A Ddavinci_nand.c695 ret = davinci_nand_exec_instr(info, &op->instrs[i]); in davinci_nand_exec_op()
H A Dintel-nand-controller.c526 instr = &op->instrs[op_id]; in ebu_nand_exec_op()
H A Dmeson_nand.c996 instr = &op->instrs[op_id]; in meson_nfc_check_op()
1033 instr = &op->instrs[op_id]; in meson_nfc_exec_op()
H A Dmarvell_nand.c1727 instr = &subop->instrs[op_id]; in marvell_nfc_parse_instructions()
1909 switch (subop->instrs[0].type) { in marvell_nfc_naked_access_exec()
1956 if (subop->instrs[0].type == NAND_OP_DATA_OUT_INSTR) { in marvell_nfc_naked_access_exec()
H A Dvf610_nfc.c354 return &subop->instrs[*op_id]; in vf610_get_next_instr()
H A Dsunxi_nand.c1774 const struct nand_op_instr *instr = &subop->instrs[i]; in sunxi_nfc_exec_subop()
1864 subop->instrs[0].ctx.waitrdy.timeout_ms); in sunxi_nfc_soft_waitrdy()
H A Dnandsim.c2171 instr = &op->instrs[op_id]; in ns_exec_op()
2184 instr = &op->instrs[op_id]; in ns_exec_op()
/openbmc/linux/drivers/mtd/nand/raw/ingenic/
H A Dingenic_nand_drv.c327 ret = ingenic_nand_exec_instr(chip, cs, &op->instrs[i]); in ingenic_nand_exec_op()
331 if (op->instrs[i].delay_ns) in ingenic_nand_exec_op()
332 ndelay(op->instrs[i].delay_ns); in ingenic_nand_exec_op()
/openbmc/linux/include/linux/mtd/
H A Drawnand.h863 const struct nand_op_instr *instrs; member
1013 const struct nand_op_instr *instrs; member
1020 .instrs = _instrs, \
/openbmc/linux/drivers/mtd/nand/raw/atmel/
H A Dnand-controller.c623 ret = atmel_smc_nand_exec_instr(nand, &op->instrs[i]); in atmel_smc_nand_exec_op()
643 const struct nand_op_instr *instr = &subop->instrs[i]; in atmel_hsmc_exec_cmd_addr()
663 const struct nand_op_instr *instr = subop->instrs; in atmel_hsmc_exec_rw()
681 const struct nand_op_instr *instr = subop->instrs; in atmel_hsmc_exec_waitrdy()

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