| /openbmc/qemu/target/riscv/ |
| H A D | fpu_helper.c | 181 return do_fmadd_s(env, frs1, frs2, frs3, float_muladd_negate_product); in helper_fnmsub_s()
187 return float64_muladd(frs1, frs2, frs3, float_muladd_negate_product, in helper_fnmsub_d()
194 return do_fmadd_h(env, frs1, frs2, frs3, float_muladd_negate_product); in helper_fnmsub_h()
201 float_muladd_negate_c | float_muladd_negate_product); in helper_fnmadd_s()
208 float_muladd_negate_product, &env->fp_status); in helper_fnmadd_d()
215 float_muladd_negate_c | float_muladd_negate_product); in helper_fnmadd_h()
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| H A D | vector_helper.c | 3393 float_muladd_negate_product, s);
3399 float_muladd_negate_product, s); in fnmacc32()
3405 float_muladd_negate_product, s); in fnmacc64()
3451 return float16_muladd(a, b, d, float_muladd_negate_product, s); in RVVCALL()
3456 return float32_muladd(a, b, d, float_muladd_negate_product, s); in fnmsac32()
3461 return float64_muladd(a, b, d, float_muladd_negate_product, s); in fnmsac64()
3508 float_muladd_negate_product, s); in RVVCALL()
3514 float_muladd_negate_product, s); in fnmadd32()
3520 float_muladd_negate_product, s); in fnmadd64()
3566 return float16_muladd(d, b, a, float_muladd_negate_product, s); in RVVCALL()
[all …]
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| /openbmc/qemu/target/xtensa/ |
| H A D | fpu_helper.c | 175 return float32_muladd(b, c, a, float_muladd_negate_product, in HELPER()
230 return float64_muladd(b, c, a, float_muladd_negate_product, in HELPER()
237 return float32_muladd(b, c, a, float_muladd_negate_product, in HELPER()
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| /openbmc/qemu/target/hppa/ |
| H A D | fpu_helper.c | 437 float32 ret = float32_muladd(a, b, c, float_muladd_negate_product, in HELPER()
452 float64 ret = float64_muladd(a, b, c, float_muladd_negate_product, in HELPER()
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| /openbmc/qemu/target/tricore/ |
| H A D | fpu_helper.c | 315 f_result = float32_muladd(arg1, arg2, arg3, float_muladd_negate_product, in helper_fmsub()
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| /openbmc/qemu/target/i386/tcg/ |
| H A D | emit.c.inc | 657 FMA_SSE(VFNMADD231, OP_PTR1, OP_PTR2, OP_PTR0, float_muladd_negate_product)
658 FMA_SSE(VFNMADD213, OP_PTR1, OP_PTR0, OP_PTR2, float_muladd_negate_product)
659 FMA_SSE(VFNMADD132, OP_PTR0, OP_PTR2, OP_PTR1, float_muladd_negate_product)
665 FMA_SSE(VFNMSUB231, OP_PTR1, OP_PTR2, OP_PTR0, float_muladd_negate_c|float_muladd_negate_product)
666 FMA_SSE(VFNMSUB213, OP_PTR1, OP_PTR0, OP_PTR2, float_muladd_negate_c|float_muladd_negate_product)
667 FMA_SSE(VFNMSUB132, OP_PTR0, OP_PTR2, OP_PTR1, float_muladd_negate_c|float_muladd_negate_product)
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| /openbmc/qemu/target/mips/tcg/ |
| H A D | fpu_helper.c | 1744 fdret = float32_muladd(fs, ft, fd, float_muladd_negate_product, in helper_float_msubf_s()
1756 fdret = float64_muladd(fs, ft, fd, float_muladd_negate_product, in helper_float_msubf_d()
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| H A D | msa_helper.c | 7273 float_muladd_negate_product, 32); in helper_msa_fmsub_df()
7280 float_muladd_negate_product, 64); in helper_msa_fmsub_df()
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| /openbmc/qemu/fpu/ |
| H A D | softfloat.c | 2292 prod_sign ^= !!(flags & float_muladd_negate_product); in float32_muladd()
2303 if (flags & float_muladd_negate_product) { in float32_muladd()
2363 prod_sign ^= !!(flags & float_muladd_negate_product); in float64_muladd()
2374 if (flags & float_muladd_negate_product) { in float64_muladd()
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| H A D | softfloat-parts.c.inc | 504 if (flags & float_muladd_negate_product) {
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| /openbmc/qemu/include/fpu/ |
| H A D | softfloat.h | 128 float_muladd_negate_product = 2, enumerator
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