19483bf27SMax Filippov /*
29483bf27SMax Filippov * Copyright (c) 2011 - 2019, Max Filippov, Open Source and Linux Lab.
39483bf27SMax Filippov * All rights reserved.
49483bf27SMax Filippov *
59483bf27SMax Filippov * Redistribution and use in source and binary forms, with or without
69483bf27SMax Filippov * modification, are permitted provided that the following conditions are met:
79483bf27SMax Filippov * * Redistributions of source code must retain the above copyright
89483bf27SMax Filippov * notice, this list of conditions and the following disclaimer.
99483bf27SMax Filippov * * Redistributions in binary form must reproduce the above copyright
109483bf27SMax Filippov * notice, this list of conditions and the following disclaimer in the
119483bf27SMax Filippov * documentation and/or other materials provided with the distribution.
129483bf27SMax Filippov * * Neither the name of the Open Source and Linux Lab nor the
139483bf27SMax Filippov * names of its contributors may be used to endorse or promote products
149483bf27SMax Filippov * derived from this software without specific prior written permission.
159483bf27SMax Filippov *
169483bf27SMax Filippov * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
179483bf27SMax Filippov * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
189483bf27SMax Filippov * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
199483bf27SMax Filippov * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
209483bf27SMax Filippov * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
219483bf27SMax Filippov * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
229483bf27SMax Filippov * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
239483bf27SMax Filippov * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
249483bf27SMax Filippov * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
259483bf27SMax Filippov * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
269483bf27SMax Filippov */
279483bf27SMax Filippov
289483bf27SMax Filippov #include "qemu/osdep.h"
29cd617484SPhilippe Mathieu-Daudé #include "qemu/log.h"
309483bf27SMax Filippov #include "cpu.h"
319483bf27SMax Filippov #include "exec/helper-proto.h"
329483bf27SMax Filippov #include "qemu/host-utils.h"
339483bf27SMax Filippov #include "exec/exec-all.h"
349483bf27SMax Filippov #include "fpu/softfloat.h"
359483bf27SMax Filippov
36cfa9f051SMax Filippov enum {
37cfa9f051SMax Filippov XTENSA_FP_I = 0x1,
38cfa9f051SMax Filippov XTENSA_FP_U = 0x2,
39cfa9f051SMax Filippov XTENSA_FP_O = 0x4,
40cfa9f051SMax Filippov XTENSA_FP_Z = 0x8,
41cfa9f051SMax Filippov XTENSA_FP_V = 0x10,
42cfa9f051SMax Filippov };
43cfa9f051SMax Filippov
44cfa9f051SMax Filippov enum {
45cfa9f051SMax Filippov XTENSA_FCR_FLAGS_SHIFT = 2,
46cfa9f051SMax Filippov XTENSA_FSR_FLAGS_SHIFT = 7,
47cfa9f051SMax Filippov };
48cfa9f051SMax Filippov
49cfa9f051SMax Filippov static const struct {
50cfa9f051SMax Filippov uint32_t xtensa_fp_flag;
51cfa9f051SMax Filippov int softfloat_fp_flag;
52cfa9f051SMax Filippov } xtensa_fp_flag_map[] = {
53cfa9f051SMax Filippov { XTENSA_FP_I, float_flag_inexact, },
54cfa9f051SMax Filippov { XTENSA_FP_U, float_flag_underflow, },
55cfa9f051SMax Filippov { XTENSA_FP_O, float_flag_overflow, },
56cfa9f051SMax Filippov { XTENSA_FP_Z, float_flag_divbyzero, },
57cfa9f051SMax Filippov { XTENSA_FP_V, float_flag_invalid, },
58cfa9f051SMax Filippov };
59cfa9f051SMax Filippov
xtensa_use_first_nan(CPUXtensaState * env,bool use_first)6080de5f24SPeter Maydell void xtensa_use_first_nan(CPUXtensaState *env, bool use_first)
6180de5f24SPeter Maydell {
6280de5f24SPeter Maydell set_use_first_nan(use_first, &env->fp_status);
63*8d988eb4SPeter Maydell set_float_2nan_prop_rule(use_first ? float_2nan_prop_ab : float_2nan_prop_ba,
64*8d988eb4SPeter Maydell &env->fp_status);
6580de5f24SPeter Maydell }
6680de5f24SPeter Maydell
HELPER(wur_fpu2k_fcr)675680f207SMax Filippov void HELPER(wur_fpu2k_fcr)(CPUXtensaState *env, uint32_t v)
689483bf27SMax Filippov {
699483bf27SMax Filippov static const int rounding_mode[] = {
709483bf27SMax Filippov float_round_nearest_even,
719483bf27SMax Filippov float_round_to_zero,
729483bf27SMax Filippov float_round_up,
739483bf27SMax Filippov float_round_down,
749483bf27SMax Filippov };
759483bf27SMax Filippov
769483bf27SMax Filippov env->uregs[FCR] = v & 0xfffff07f;
779483bf27SMax Filippov set_float_rounding_mode(rounding_mode[v & 3], &env->fp_status);
789483bf27SMax Filippov }
799483bf27SMax Filippov
HELPER(wur_fpu_fcr)80cfa9f051SMax Filippov void HELPER(wur_fpu_fcr)(CPUXtensaState *env, uint32_t v)
81cfa9f051SMax Filippov {
82cfa9f051SMax Filippov static const int rounding_mode[] = {
83cfa9f051SMax Filippov float_round_nearest_even,
84cfa9f051SMax Filippov float_round_to_zero,
85cfa9f051SMax Filippov float_round_up,
86cfa9f051SMax Filippov float_round_down,
87cfa9f051SMax Filippov };
88cfa9f051SMax Filippov
89cfa9f051SMax Filippov if (v & 0xfffff000) {
90cfa9f051SMax Filippov qemu_log_mask(LOG_GUEST_ERROR,
91cfa9f051SMax Filippov "MBZ field of FCR is written non-zero: %08x\n", v);
92cfa9f051SMax Filippov }
93cfa9f051SMax Filippov env->uregs[FCR] = v & 0x0000007f;
94cfa9f051SMax Filippov set_float_rounding_mode(rounding_mode[v & 3], &env->fp_status);
95cfa9f051SMax Filippov }
96cfa9f051SMax Filippov
HELPER(wur_fpu_fsr)97cfa9f051SMax Filippov void HELPER(wur_fpu_fsr)(CPUXtensaState *env, uint32_t v)
98cfa9f051SMax Filippov {
99cfa9f051SMax Filippov uint32_t flags = v >> XTENSA_FSR_FLAGS_SHIFT;
100cfa9f051SMax Filippov int fef = 0;
101cfa9f051SMax Filippov unsigned i;
102cfa9f051SMax Filippov
103cfa9f051SMax Filippov if (v & 0xfffff000) {
104cfa9f051SMax Filippov qemu_log_mask(LOG_GUEST_ERROR,
105cfa9f051SMax Filippov "MBZ field of FSR is written non-zero: %08x\n", v);
106cfa9f051SMax Filippov }
107cfa9f051SMax Filippov env->uregs[FSR] = v & 0x00000f80;
108cfa9f051SMax Filippov for (i = 0; i < ARRAY_SIZE(xtensa_fp_flag_map); ++i) {
109cfa9f051SMax Filippov if (flags & xtensa_fp_flag_map[i].xtensa_fp_flag) {
110cfa9f051SMax Filippov fef |= xtensa_fp_flag_map[i].softfloat_fp_flag;
111cfa9f051SMax Filippov }
112cfa9f051SMax Filippov }
113cfa9f051SMax Filippov set_float_exception_flags(fef, &env->fp_status);
114cfa9f051SMax Filippov }
115cfa9f051SMax Filippov
HELPER(rur_fpu_fsr)116cfa9f051SMax Filippov uint32_t HELPER(rur_fpu_fsr)(CPUXtensaState *env)
117cfa9f051SMax Filippov {
118cfa9f051SMax Filippov uint32_t flags = 0;
119cfa9f051SMax Filippov int fef = get_float_exception_flags(&env->fp_status);
120cfa9f051SMax Filippov unsigned i;
121cfa9f051SMax Filippov
122cfa9f051SMax Filippov for (i = 0; i < ARRAY_SIZE(xtensa_fp_flag_map); ++i) {
123cfa9f051SMax Filippov if (fef & xtensa_fp_flag_map[i].softfloat_fp_flag) {
124cfa9f051SMax Filippov flags |= xtensa_fp_flag_map[i].xtensa_fp_flag;
125cfa9f051SMax Filippov }
126cfa9f051SMax Filippov }
127cfa9f051SMax Filippov env->uregs[FSR] = flags << XTENSA_FSR_FLAGS_SHIFT;
128cfa9f051SMax Filippov return flags << XTENSA_FSR_FLAGS_SHIFT;
129cfa9f051SMax Filippov }
130cfa9f051SMax Filippov
HELPER(abs_d)131cfa9f051SMax Filippov float64 HELPER(abs_d)(float64 v)
132cfa9f051SMax Filippov {
133cfa9f051SMax Filippov return float64_abs(v);
134cfa9f051SMax Filippov }
135cfa9f051SMax Filippov
HELPER(abs_s)1369483bf27SMax Filippov float32 HELPER(abs_s)(float32 v)
1379483bf27SMax Filippov {
1389483bf27SMax Filippov return float32_abs(v);
1399483bf27SMax Filippov }
1409483bf27SMax Filippov
HELPER(neg_d)141cfa9f051SMax Filippov float64 HELPER(neg_d)(float64 v)
142cfa9f051SMax Filippov {
143cfa9f051SMax Filippov return float64_chs(v);
144cfa9f051SMax Filippov }
145cfa9f051SMax Filippov
HELPER(neg_s)1469483bf27SMax Filippov float32 HELPER(neg_s)(float32 v)
1479483bf27SMax Filippov {
1489483bf27SMax Filippov return float32_chs(v);
1499483bf27SMax Filippov }
1509483bf27SMax Filippov
HELPER(fpu2k_add_s)1515680f207SMax Filippov float32 HELPER(fpu2k_add_s)(CPUXtensaState *env, float32 a, float32 b)
1529483bf27SMax Filippov {
1539483bf27SMax Filippov return float32_add(a, b, &env->fp_status);
1549483bf27SMax Filippov }
1559483bf27SMax Filippov
HELPER(fpu2k_sub_s)1565680f207SMax Filippov float32 HELPER(fpu2k_sub_s)(CPUXtensaState *env, float32 a, float32 b)
1579483bf27SMax Filippov {
1589483bf27SMax Filippov return float32_sub(a, b, &env->fp_status);
1599483bf27SMax Filippov }
1609483bf27SMax Filippov
HELPER(fpu2k_mul_s)1615680f207SMax Filippov float32 HELPER(fpu2k_mul_s)(CPUXtensaState *env, float32 a, float32 b)
1629483bf27SMax Filippov {
1639483bf27SMax Filippov return float32_mul(a, b, &env->fp_status);
1649483bf27SMax Filippov }
1659483bf27SMax Filippov
HELPER(fpu2k_madd_s)1665680f207SMax Filippov float32 HELPER(fpu2k_madd_s)(CPUXtensaState *env,
1675680f207SMax Filippov float32 a, float32 b, float32 c)
1689483bf27SMax Filippov {
1699483bf27SMax Filippov return float32_muladd(b, c, a, 0, &env->fp_status);
1709483bf27SMax Filippov }
1719483bf27SMax Filippov
HELPER(fpu2k_msub_s)1725680f207SMax Filippov float32 HELPER(fpu2k_msub_s)(CPUXtensaState *env,
1735680f207SMax Filippov float32 a, float32 b, float32 c)
1749483bf27SMax Filippov {
1759483bf27SMax Filippov return float32_muladd(b, c, a, float_muladd_negate_product,
1769483bf27SMax Filippov &env->fp_status);
1779483bf27SMax Filippov }
1789483bf27SMax Filippov
HELPER(add_d)179cfa9f051SMax Filippov float64 HELPER(add_d)(CPUXtensaState *env, float64 a, float64 b)
1809483bf27SMax Filippov {
18180de5f24SPeter Maydell xtensa_use_first_nan(env, true);
182cfa9f051SMax Filippov return float64_add(a, b, &env->fp_status);
1839483bf27SMax Filippov }
1849483bf27SMax Filippov
HELPER(add_s)185cfa9f051SMax Filippov float32 HELPER(add_s)(CPUXtensaState *env, float32 a, float32 b)
1869483bf27SMax Filippov {
18780de5f24SPeter Maydell xtensa_use_first_nan(env, env->config->use_first_nan);
188cfa9f051SMax Filippov return float32_add(a, b, &env->fp_status);
189cfa9f051SMax Filippov }
190cfa9f051SMax Filippov
HELPER(sub_d)191cfa9f051SMax Filippov float64 HELPER(sub_d)(CPUXtensaState *env, float64 a, float64 b)
192cfa9f051SMax Filippov {
19380de5f24SPeter Maydell xtensa_use_first_nan(env, true);
194cfa9f051SMax Filippov return float64_sub(a, b, &env->fp_status);
195cfa9f051SMax Filippov }
196cfa9f051SMax Filippov
HELPER(sub_s)197cfa9f051SMax Filippov float32 HELPER(sub_s)(CPUXtensaState *env, float32 a, float32 b)
198cfa9f051SMax Filippov {
19980de5f24SPeter Maydell xtensa_use_first_nan(env, env->config->use_first_nan);
200cfa9f051SMax Filippov return float32_sub(a, b, &env->fp_status);
201cfa9f051SMax Filippov }
202cfa9f051SMax Filippov
HELPER(mul_d)203cfa9f051SMax Filippov float64 HELPER(mul_d)(CPUXtensaState *env, float64 a, float64 b)
204cfa9f051SMax Filippov {
20580de5f24SPeter Maydell xtensa_use_first_nan(env, true);
206cfa9f051SMax Filippov return float64_mul(a, b, &env->fp_status);
207cfa9f051SMax Filippov }
208cfa9f051SMax Filippov
HELPER(mul_s)209cfa9f051SMax Filippov float32 HELPER(mul_s)(CPUXtensaState *env, float32 a, float32 b)
210cfa9f051SMax Filippov {
21180de5f24SPeter Maydell xtensa_use_first_nan(env, env->config->use_first_nan);
212cfa9f051SMax Filippov return float32_mul(a, b, &env->fp_status);
213cfa9f051SMax Filippov }
214cfa9f051SMax Filippov
HELPER(madd_d)215cfa9f051SMax Filippov float64 HELPER(madd_d)(CPUXtensaState *env, float64 a, float64 b, float64 c)
216cfa9f051SMax Filippov {
21780de5f24SPeter Maydell xtensa_use_first_nan(env, env->config->use_first_nan);
218cfa9f051SMax Filippov return float64_muladd(b, c, a, 0, &env->fp_status);
219cfa9f051SMax Filippov }
220cfa9f051SMax Filippov
HELPER(madd_s)221cfa9f051SMax Filippov float32 HELPER(madd_s)(CPUXtensaState *env, float32 a, float32 b, float32 c)
222cfa9f051SMax Filippov {
22380de5f24SPeter Maydell xtensa_use_first_nan(env, env->config->use_first_nan);
224cfa9f051SMax Filippov return float32_muladd(b, c, a, 0, &env->fp_status);
225cfa9f051SMax Filippov }
226cfa9f051SMax Filippov
HELPER(msub_d)227cfa9f051SMax Filippov float64 HELPER(msub_d)(CPUXtensaState *env, float64 a, float64 b, float64 c)
228cfa9f051SMax Filippov {
22980de5f24SPeter Maydell xtensa_use_first_nan(env, env->config->use_first_nan);
230cfa9f051SMax Filippov return float64_muladd(b, c, a, float_muladd_negate_product,
231cfa9f051SMax Filippov &env->fp_status);
232cfa9f051SMax Filippov }
233cfa9f051SMax Filippov
HELPER(msub_s)234cfa9f051SMax Filippov float32 HELPER(msub_s)(CPUXtensaState *env, float32 a, float32 b, float32 c)
235cfa9f051SMax Filippov {
23680de5f24SPeter Maydell xtensa_use_first_nan(env, env->config->use_first_nan);
237cfa9f051SMax Filippov return float32_muladd(b, c, a, float_muladd_negate_product,
238cfa9f051SMax Filippov &env->fp_status);
239cfa9f051SMax Filippov }
240cfa9f051SMax Filippov
HELPER(mkdadj_d)241f8c61370SMax Filippov float64 HELPER(mkdadj_d)(CPUXtensaState *env, float64 a, float64 b)
242f8c61370SMax Filippov {
24380de5f24SPeter Maydell xtensa_use_first_nan(env, true);
244f8c61370SMax Filippov return float64_div(b, a, &env->fp_status);
245f8c61370SMax Filippov }
246f8c61370SMax Filippov
HELPER(mkdadj_s)247f8c61370SMax Filippov float32 HELPER(mkdadj_s)(CPUXtensaState *env, float32 a, float32 b)
248f8c61370SMax Filippov {
24980de5f24SPeter Maydell xtensa_use_first_nan(env, env->config->use_first_nan);
250f8c61370SMax Filippov return float32_div(b, a, &env->fp_status);
251f8c61370SMax Filippov }
252f8c61370SMax Filippov
HELPER(mksadj_d)253f8c61370SMax Filippov float64 HELPER(mksadj_d)(CPUXtensaState *env, float64 v)
254f8c61370SMax Filippov {
25580de5f24SPeter Maydell xtensa_use_first_nan(env, true);
256f8c61370SMax Filippov return float64_sqrt(v, &env->fp_status);
257f8c61370SMax Filippov }
258f8c61370SMax Filippov
HELPER(mksadj_s)259f8c61370SMax Filippov float32 HELPER(mksadj_s)(CPUXtensaState *env, float32 v)
260f8c61370SMax Filippov {
26180de5f24SPeter Maydell xtensa_use_first_nan(env, env->config->use_first_nan);
262f8c61370SMax Filippov return float32_sqrt(v, &env->fp_status);
263f8c61370SMax Filippov }
264f8c61370SMax Filippov
HELPER(ftoi_d)265cfa9f051SMax Filippov uint32_t HELPER(ftoi_d)(CPUXtensaState *env, float64 v,
266cfa9f051SMax Filippov uint32_t rounding_mode, uint32_t scale)
267cfa9f051SMax Filippov {
268cfa9f051SMax Filippov float_status fp_status = env->fp_status;
269cfa9f051SMax Filippov uint32_t res;
270cfa9f051SMax Filippov
271cfa9f051SMax Filippov set_float_rounding_mode(rounding_mode, &fp_status);
272cfa9f051SMax Filippov res = float64_to_int32(float64_scalbn(v, scale, &fp_status), &fp_status);
273cfa9f051SMax Filippov set_float_exception_flags(get_float_exception_flags(&fp_status),
274cfa9f051SMax Filippov &env->fp_status);
275cfa9f051SMax Filippov return res;
276cfa9f051SMax Filippov }
277cfa9f051SMax Filippov
HELPER(ftoi_s)278cfa9f051SMax Filippov uint32_t HELPER(ftoi_s)(CPUXtensaState *env, float32 v,
279cfa9f051SMax Filippov uint32_t rounding_mode, uint32_t scale)
280cfa9f051SMax Filippov {
281cfa9f051SMax Filippov float_status fp_status = env->fp_status;
282cfa9f051SMax Filippov uint32_t res;
283cfa9f051SMax Filippov
284cfa9f051SMax Filippov set_float_rounding_mode(rounding_mode, &fp_status);
285cfa9f051SMax Filippov res = float32_to_int32(float32_scalbn(v, scale, &fp_status), &fp_status);
286cfa9f051SMax Filippov set_float_exception_flags(get_float_exception_flags(&fp_status),
287cfa9f051SMax Filippov &env->fp_status);
288cfa9f051SMax Filippov return res;
289cfa9f051SMax Filippov }
290cfa9f051SMax Filippov
HELPER(ftoui_d)291cfa9f051SMax Filippov uint32_t HELPER(ftoui_d)(CPUXtensaState *env, float64 v,
292cfa9f051SMax Filippov uint32_t rounding_mode, uint32_t scale)
293cfa9f051SMax Filippov {
294cfa9f051SMax Filippov float_status fp_status = env->fp_status;
295cfa9f051SMax Filippov float64 res;
296cfa9f051SMax Filippov uint32_t rv;
297cfa9f051SMax Filippov
298cfa9f051SMax Filippov set_float_rounding_mode(rounding_mode, &fp_status);
299cfa9f051SMax Filippov
300cfa9f051SMax Filippov res = float64_scalbn(v, scale, &fp_status);
301cfa9f051SMax Filippov
302cfa9f051SMax Filippov if (float64_is_neg(v) && !float64_is_any_nan(v)) {
303cfa9f051SMax Filippov set_float_exception_flags(float_flag_invalid, &fp_status);
304cfa9f051SMax Filippov rv = float64_to_int32(res, &fp_status);
305cfa9f051SMax Filippov } else {
306cfa9f051SMax Filippov rv = float64_to_uint32(res, &fp_status);
307cfa9f051SMax Filippov }
308cfa9f051SMax Filippov set_float_exception_flags(get_float_exception_flags(&fp_status),
309cfa9f051SMax Filippov &env->fp_status);
310cfa9f051SMax Filippov return rv;
311cfa9f051SMax Filippov }
312cfa9f051SMax Filippov
HELPER(ftoui_s)313cfa9f051SMax Filippov uint32_t HELPER(ftoui_s)(CPUXtensaState *env, float32 v,
314cfa9f051SMax Filippov uint32_t rounding_mode, uint32_t scale)
315cfa9f051SMax Filippov {
316cfa9f051SMax Filippov float_status fp_status = env->fp_status;
3179483bf27SMax Filippov float32 res;
318cfa9f051SMax Filippov uint32_t rv;
3199483bf27SMax Filippov
3209483bf27SMax Filippov set_float_rounding_mode(rounding_mode, &fp_status);
3219483bf27SMax Filippov
3229483bf27SMax Filippov res = float32_scalbn(v, scale, &fp_status);
3239483bf27SMax Filippov
3249483bf27SMax Filippov if (float32_is_neg(v) && !float32_is_any_nan(v)) {
325cfa9f051SMax Filippov rv = float32_to_int32(res, &fp_status);
326cfa9f051SMax Filippov if (rv) {
327cfa9f051SMax Filippov set_float_exception_flags(float_flag_invalid, &fp_status);
3289483bf27SMax Filippov }
329cfa9f051SMax Filippov } else {
330cfa9f051SMax Filippov rv = float32_to_uint32(res, &fp_status);
331cfa9f051SMax Filippov }
332cfa9f051SMax Filippov set_float_exception_flags(get_float_exception_flags(&fp_status),
333cfa9f051SMax Filippov &env->fp_status);
334cfa9f051SMax Filippov return rv;
335cfa9f051SMax Filippov }
336cfa9f051SMax Filippov
HELPER(itof_d)337cfa9f051SMax Filippov float64 HELPER(itof_d)(CPUXtensaState *env, uint32_t v, uint32_t scale)
338cfa9f051SMax Filippov {
339cfa9f051SMax Filippov return float64_scalbn(int32_to_float64(v, &env->fp_status),
340cfa9f051SMax Filippov (int32_t)scale, &env->fp_status);
3419483bf27SMax Filippov }
3429483bf27SMax Filippov
HELPER(itof_s)3435680f207SMax Filippov float32 HELPER(itof_s)(CPUXtensaState *env, uint32_t v, uint32_t scale)
3449483bf27SMax Filippov {
3459483bf27SMax Filippov return float32_scalbn(int32_to_float32(v, &env->fp_status),
3469483bf27SMax Filippov (int32_t)scale, &env->fp_status);
3479483bf27SMax Filippov }
3489483bf27SMax Filippov
HELPER(uitof_d)349cfa9f051SMax Filippov float64 HELPER(uitof_d)(CPUXtensaState *env, uint32_t v, uint32_t scale)
350cfa9f051SMax Filippov {
351cfa9f051SMax Filippov return float64_scalbn(uint32_to_float64(v, &env->fp_status),
352cfa9f051SMax Filippov (int32_t)scale, &env->fp_status);
353cfa9f051SMax Filippov }
354cfa9f051SMax Filippov
HELPER(uitof_s)3555680f207SMax Filippov float32 HELPER(uitof_s)(CPUXtensaState *env, uint32_t v, uint32_t scale)
3569483bf27SMax Filippov {
3579483bf27SMax Filippov return float32_scalbn(uint32_to_float32(v, &env->fp_status),
3589483bf27SMax Filippov (int32_t)scale, &env->fp_status);
3599483bf27SMax Filippov }
3609483bf27SMax Filippov
HELPER(cvtd_s)361cfa9f051SMax Filippov float64 HELPER(cvtd_s)(CPUXtensaState *env, float32 v)
362cfa9f051SMax Filippov {
363cfa9f051SMax Filippov return float32_to_float64(v, &env->fp_status);
364cfa9f051SMax Filippov }
365cfa9f051SMax Filippov
HELPER(cvts_d)366cfa9f051SMax Filippov float32 HELPER(cvts_d)(CPUXtensaState *env, float64 v)
367cfa9f051SMax Filippov {
368cfa9f051SMax Filippov return float64_to_float32(v, &env->fp_status);
369cfa9f051SMax Filippov }
370cfa9f051SMax Filippov
HELPER(un_d)371cfa9f051SMax Filippov uint32_t HELPER(un_d)(CPUXtensaState *env, float64 a, float64 b)
372cfa9f051SMax Filippov {
373cfa9f051SMax Filippov return float64_unordered_quiet(a, b, &env->fp_status);
374cfa9f051SMax Filippov }
375cfa9f051SMax Filippov
HELPER(un_s)3765dbb4c96SMax Filippov uint32_t HELPER(un_s)(CPUXtensaState *env, float32 a, float32 b)
3779483bf27SMax Filippov {
3785dbb4c96SMax Filippov return float32_unordered_quiet(a, b, &env->fp_status);
3799483bf27SMax Filippov }
3809483bf27SMax Filippov
HELPER(oeq_d)381cfa9f051SMax Filippov uint32_t HELPER(oeq_d)(CPUXtensaState *env, float64 a, float64 b)
382cfa9f051SMax Filippov {
383cfa9f051SMax Filippov return float64_eq_quiet(a, b, &env->fp_status);
384cfa9f051SMax Filippov }
385cfa9f051SMax Filippov
HELPER(oeq_s)3865dbb4c96SMax Filippov uint32_t HELPER(oeq_s)(CPUXtensaState *env, float32 a, float32 b)
3879483bf27SMax Filippov {
3885dbb4c96SMax Filippov return float32_eq_quiet(a, b, &env->fp_status);
3899483bf27SMax Filippov }
3909483bf27SMax Filippov
HELPER(ueq_d)391cfa9f051SMax Filippov uint32_t HELPER(ueq_d)(CPUXtensaState *env, float64 a, float64 b)
392cfa9f051SMax Filippov {
393cfa9f051SMax Filippov FloatRelation v = float64_compare_quiet(a, b, &env->fp_status);
394cfa9f051SMax Filippov
395cfa9f051SMax Filippov return v == float_relation_equal ||
396cfa9f051SMax Filippov v == float_relation_unordered;
397cfa9f051SMax Filippov }
398cfa9f051SMax Filippov
HELPER(ueq_s)3995dbb4c96SMax Filippov uint32_t HELPER(ueq_s)(CPUXtensaState *env, float32 a, float32 b)
4009483bf27SMax Filippov {
40171bfd65cSRichard Henderson FloatRelation v = float32_compare_quiet(a, b, &env->fp_status);
4025dbb4c96SMax Filippov
4035dbb4c96SMax Filippov return v == float_relation_equal ||
4045dbb4c96SMax Filippov v == float_relation_unordered;
4059483bf27SMax Filippov }
4069483bf27SMax Filippov
HELPER(olt_d)407cfa9f051SMax Filippov uint32_t HELPER(olt_d)(CPUXtensaState *env, float64 a, float64 b)
408cfa9f051SMax Filippov {
409cfa9f051SMax Filippov return float64_lt(a, b, &env->fp_status);
410cfa9f051SMax Filippov }
411cfa9f051SMax Filippov
HELPER(olt_s)4125dbb4c96SMax Filippov uint32_t HELPER(olt_s)(CPUXtensaState *env, float32 a, float32 b)
4139483bf27SMax Filippov {
414cfa9f051SMax Filippov return float32_lt(a, b, &env->fp_status);
415cfa9f051SMax Filippov }
416cfa9f051SMax Filippov
HELPER(ult_d)417cfa9f051SMax Filippov uint32_t HELPER(ult_d)(CPUXtensaState *env, float64 a, float64 b)
418cfa9f051SMax Filippov {
419cfa9f051SMax Filippov FloatRelation v = float64_compare_quiet(a, b, &env->fp_status);
420cfa9f051SMax Filippov
421cfa9f051SMax Filippov return v == float_relation_less ||
422cfa9f051SMax Filippov v == float_relation_unordered;
4239483bf27SMax Filippov }
4249483bf27SMax Filippov
HELPER(ult_s)4255dbb4c96SMax Filippov uint32_t HELPER(ult_s)(CPUXtensaState *env, float32 a, float32 b)
4269483bf27SMax Filippov {
42771bfd65cSRichard Henderson FloatRelation v = float32_compare_quiet(a, b, &env->fp_status);
4285dbb4c96SMax Filippov
4295dbb4c96SMax Filippov return v == float_relation_less ||
4305dbb4c96SMax Filippov v == float_relation_unordered;
4319483bf27SMax Filippov }
4329483bf27SMax Filippov
HELPER(ole_d)433cfa9f051SMax Filippov uint32_t HELPER(ole_d)(CPUXtensaState *env, float64 a, float64 b)
434cfa9f051SMax Filippov {
435cfa9f051SMax Filippov return float64_le(a, b, &env->fp_status);
436cfa9f051SMax Filippov }
437cfa9f051SMax Filippov
HELPER(ole_s)4385dbb4c96SMax Filippov uint32_t HELPER(ole_s)(CPUXtensaState *env, float32 a, float32 b)
4399483bf27SMax Filippov {
440cfa9f051SMax Filippov return float32_le(a, b, &env->fp_status);
441cfa9f051SMax Filippov }
442cfa9f051SMax Filippov
HELPER(ule_d)443cfa9f051SMax Filippov uint32_t HELPER(ule_d)(CPUXtensaState *env, float64 a, float64 b)
444cfa9f051SMax Filippov {
445cfa9f051SMax Filippov FloatRelation v = float64_compare_quiet(a, b, &env->fp_status);
446cfa9f051SMax Filippov
447cfa9f051SMax Filippov return v != float_relation_greater;
4489483bf27SMax Filippov }
4499483bf27SMax Filippov
HELPER(ule_s)4505dbb4c96SMax Filippov uint32_t HELPER(ule_s)(CPUXtensaState *env, float32 a, float32 b)
4519483bf27SMax Filippov {
45271bfd65cSRichard Henderson FloatRelation v = float32_compare_quiet(a, b, &env->fp_status);
4535dbb4c96SMax Filippov
4545dbb4c96SMax Filippov return v != float_relation_greater;
4559483bf27SMax Filippov }
456