/openbmc/qemu/target/arm/tcg/ |
H A D | pauth_helper.c | 35 o |= extract64(i, 52, 4); in pac_cell_shuffle() 36 o |= extract64(i, 24, 4) << 4; in pac_cell_shuffle() 37 o |= extract64(i, 44, 4) << 8; in pac_cell_shuffle() 38 o |= extract64(i, 0, 4) << 12; in pac_cell_shuffle() 40 o |= extract64(i, 28, 4) << 16; in pac_cell_shuffle() 41 o |= extract64(i, 48, 4) << 20; in pac_cell_shuffle() 42 o |= extract64(i, 4, 4) << 24; in pac_cell_shuffle() 43 o |= extract64(i, 40, 4) << 28; in pac_cell_shuffle() 45 o |= extract64(i, 32, 4) << 32; in pac_cell_shuffle() 46 o |= extract64(i, 12, 4) << 36; in pac_cell_shuffle() [all …]
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H A D | mte_helper.c | 475 shift = extract64(ptr, LOG2_TAG_GRANULE, 4) * 4; in HELPER() 503 shift = extract64(ptr, LOG2_TAG_GRANULE, 4) * 4; in HELPER() 575 select = extract64(dirty_ptr, 55, 1); in mte_async_check_fail() 608 tcf = extract64(sctlr, 38, 2); in mte_check_fail() 612 tcf = extract64(sctlr, 40, 2); in mte_check_fail() 781 bit55 = extract64(ptr, 55, 1); in mte_probe_int() 923 bit55 = extract64(ptr, 55, 1); in HELPER()
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/openbmc/qemu/target/hppa/ |
H A D | machine.c | 59 ent->t = extract64(val, 61, 1); in get_tlb() 60 ent->d = extract64(val, 60, 1); in get_tlb() 61 ent->b = extract64(val, 59, 1); in get_tlb() 62 ent->ar_type = extract64(val, 56, 3); in get_tlb() 63 ent->ar_pl1 = extract64(val, 54, 2); in get_tlb() 64 ent->ar_pl2 = extract64(val, 52, 2); in get_tlb() 65 ent->u = extract64(val, 51, 1); in get_tlb() 68 ent->access_id = extract64(val, 1, 31); in get_tlb()
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H A D | mem_helper.c | 560 ent->t = extract64(r2, 61, 1); in itlbt_pa20() 561 ent->d = extract64(r2, 60, 1); in itlbt_pa20() 562 ent->b = extract64(r2, 59, 1); in itlbt_pa20() 563 ent->ar_type = extract64(r2, 56, 3); in itlbt_pa20() 564 ent->ar_pl1 = extract64(r2, 54, 2); in itlbt_pa20() 565 ent->ar_pl2 = extract64(r2, 52, 2); in itlbt_pa20() 566 ent->u = extract64(r2, 51, 1); in itlbt_pa20() 569 ent->access_id = extract64(r2, 1, 31); in itlbt_pa20()
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H A D | op_helper.c | 385 int f1 = extract64(r1, i, 16); in HELPER() 401 int f1 = extract64(r1, i, 16); in HELPER() 402 int f2 = extract64(r2, i, 16); in HELPER() 431 int f1 = extract64(r1, i, 16); in HELPER()
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/openbmc/qemu/hw/i386/ |
H A D | amd_iommu.c | 387 hwaddr addr = cpu_to_le64(extract64(cmd[0], 3, 49)) << 3; in amdvi_completion_wait() 390 if (extract64(cmd[0], 52, 8)) { in amdvi_completion_wait() 391 amdvi_log_illegalcom_error(s, extract64(cmd[0], 60, 4), in amdvi_completion_wait() 394 if (extract64(cmd[0], 0, 1)) { in amdvi_completion_wait() 402 if (extract64(cmd[0], 1, 1)) { in amdvi_completion_wait() 413 uint16_t devid = cpu_to_le16((uint16_t)extract64(cmd[0], 0, 16)); in amdvi_inval_devtab_entry() 416 if (extract64(cmd[0], 16, 44) || cmd[1]) { in amdvi_inval_devtab_entry() 417 amdvi_log_illegalcom_error(s, extract64(cmd[0], 60, 4), in amdvi_inval_devtab_entry() 426 if (extract64(cmd[0], 16, 16) || extract64(cmd[0], 52, 8) || in amdvi_complete_ppr() 427 extract64(cmd[1], 0, 2) || extract64(cmd[1], 3, 29) in amdvi_complete_ppr() [all …]
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/openbmc/qemu/hw/dma/ |
H A D | sifive_pdma.c | 227 val = extract64(s->chan[ch].next_bytes, 0, 32); in sifive_pdma_readl() 230 val = extract64(s->chan[ch].next_bytes, 32, 32); in sifive_pdma_readl() 233 val = extract64(s->chan[ch].next_dst, 0, 32); in sifive_pdma_readl() 236 val = extract64(s->chan[ch].next_dst, 32, 32); in sifive_pdma_readl() 239 val = extract64(s->chan[ch].next_src, 0, 32); in sifive_pdma_readl() 242 val = extract64(s->chan[ch].next_src, 32, 32); in sifive_pdma_readl() 248 val = extract64(s->chan[ch].exec_bytes, 0, 32); in sifive_pdma_readl() 251 val = extract64(s->chan[ch].exec_bytes, 32, 32); in sifive_pdma_readl() 254 val = extract64(s->chan[ch].exec_dst, 0, 32); in sifive_pdma_readl() 257 val = extract64(s->chan[ch].exec_dst, 32, 32); in sifive_pdma_readl() [all …]
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/openbmc/qemu/hw/arm/ |
H A D | smmu-internal.h | 41 (extract64(pte, shift, 47 - shift + 1) << shift) 64 (extract64(pte, 6, 2)) 67 (extract64(pte, 61, 2)) 70 (extract64(pte, 10, 1))
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/openbmc/qemu/hw/sd/ |
H A D | aspeed_sdhci.c | 45 val = extract64(sdhci->slots[0].capareg, 0, 32); in aspeed_sdhci_read() 48 val = extract64(sdhci->slots[0].capareg, 32, 32); in aspeed_sdhci_read() 51 val = extract64(sdhci->slots[0].maxcurr, 0, 32); in aspeed_sdhci_read() 54 val = extract64(sdhci->slots[1].capareg, 0, 32); in aspeed_sdhci_read() 57 val = extract64(sdhci->slots[1].capareg, 32, 32); in aspeed_sdhci_read() 60 val = extract64(sdhci->slots[1].maxcurr, 0, 32); in aspeed_sdhci_read()
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/openbmc/qemu/target/arm/ |
H A D | vfp_helper.c | 425 bfloat16 lo = float32_to_bfloat16(extract64(pair, 0, 32), status); in HELPER() 426 bfloat16 hi = float32_to_bfloat16(extract64(pair, 32, 32), status); in HELPER() 621 if (extract64(frac, 51, 1) == 0) { in call_recip_estimate() 630 scaled = deposit32(1 << 8, 0, 8, extract64(frac, 44, 8)); in call_recip_estimate() 709 f16_val = deposit32(f16_val, 0, 10, extract64(f64_frac, 52 - 10, 10)); in HELPER() 759 f32_val = deposit32(f32_val, 0, 23, extract64(f64_frac, 52 - 23, 23)); in HELPER() 769 int f64_exp = extract64(f64_val, 52, 11); in HELPER() 770 uint64_t f64_frac = extract64(f64_val, 0, 52); in HELPER() 844 while (extract64(frac, 51, 1) == 0) { in recip_sqrt_estimate() 848 frac = extract64(frac, 0, 51) << 1; in recip_sqrt_estimate() [all …]
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H A D | ptw.c | 404 index = extract64(paddress, l0gptsz, pps - l0gptsz); in granule_protection_check() 432 index = extract64(paddress, pgs + 4, l0gptsz - pgs - 4); in granule_protection_check() 456 index = extract64(paddress, pgs, 4); in granule_protection_check() 457 gpi = extract64(entry, index * 4, 4); in granule_protection_check() 1500 hpd = extract64(tcr, 24, 1); in aa32_va_parameters() 1515 hpd = extract64(tcr, 41, 1); in aa32_va_parameters() 1519 hpd = extract64(tcr, 42, 1); in aa32_va_parameters() 1560 sl2 = extract64(tcr, 33, 1); in check_s2_mmu_setup() 1829 descaddr = extract64(ttbr, 0, 48); in get_phys_addr_lpae() 1839 descaddr |= extract64(ttbr, 2, 4) << 48; in get_phys_addr_lpae() [all …]
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H A D | debug_helper.c | 196 if (extract64(bcr, 0, 1) == 0) { in linked_bp_matches() 201 bt = extract64(bcr, 20, 4); in linked_bp_matches() 608 if (extract64(wvr, 2, 1)) { in hw_watchpoint_update() 667 if (!extract64(bcr, 0, 1)) { in hw_breakpoint_update() 672 bt = extract64(bcr, 20, 4); in hw_breakpoint_update() 707 int bas = extract64(bcr, 5, 4); in hw_breakpoint_update() 1149 value = deposit64(value, 6, 1, extract64(value, 5, 1)); in dbgbcr_write() 1150 value = deposit64(value, 8, 1, extract64(value, 7, 1)); in dbgbcr_write()
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/openbmc/qemu/hw/timer/ |
H A D | sse-timer.c | 223 r = extract64(sse_cntpct(s), 0, 32); in sse_timer_read() 226 r = extract64(sse_cntpct(s), 32, 32); in sse_timer_read() 232 r = extract64(s->cntp_cval, 0, 32); in sse_timer_read() 235 r = extract64(s->cntp_cval, 32, 32); in sse_timer_read() 238 r = extract64(s->cntp_cval - sse_cntpct(s), 0, 32); in sse_timer_read() 247 r = extract64(s->cntp_aival, 0, 32); in sse_timer_read() 250 r = extract64(s->cntp_aival, 32, 32); in sse_timer_read()
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H A D | sse-counter.c | 208 r = extract64(sse_cntcv(s), 0, 32); in sse_counter_control_read() 211 r = extract64(sse_cntcv(s), 32, 32); in sse_counter_control_read() 319 r = extract64(sse_cntcv(s), 0, 32); in sse_counter_status_read() 322 r = extract64(sse_cntcv(s), 32, 32); in sse_counter_status_read()
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/openbmc/qemu/hw/gpio/ |
H A D | imx_gpio.c | 93 } else if (extract64(s->icr, 2*line + 1, 1)) { in imx_gpio_set_int_line() 97 if (extract64(s->icr, 2*line, 1) != level) { in imx_gpio_set_int_line() 103 if (extract64(s->icr, 2*line, 1) == level) { in imx_gpio_set_int_line() 172 reg_value = extract64(s->icr, 0, 32); in imx_gpio_read() 176 reg_value = extract64(s->icr, 32, 32); in imx_gpio_read()
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/openbmc/qemu/target/ppc/ |
H A D | power8-pmu.c | 52 sel = extract64(mmcr1, MMCR1_PMC1EVT_EXTR, MMCR1_EVT_SIZE); in pmu_update_summaries() 64 sel = extract64(mmcr1, MMCR1_PMC2EVT_EXTR, MMCR1_EVT_SIZE); in pmu_update_summaries() 68 sel = extract64(mmcr1, MMCR1_PMC3EVT_EXTR, MMCR1_EVT_SIZE); in pmu_update_summaries() 72 sel = extract64(mmcr1, MMCR1_PMC4EVT_EXTR, MMCR1_EVT_SIZE); in pmu_update_summaries() 176 int sel = extract64(mmcr1, MMCR1_PMC4EVT_EXTR, MMCR1_EVT_SIZE); in pmu_increment_insns()
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/openbmc/qemu/target/i386/tcg/ |
H A D | mpx_helper.c | 46 bde = (extract64(base, 20, 28) << 3) + (extract64(bndcsr, 20, 44) << 12); in lookup_bte64() 53 return (extract64(base, 3, 17) << 5) + (bt & ~7); in lookup_bte64()
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/openbmc/qemu/hw/intc/ |
H A D | arm_gicv3_redist.c | 358 *data = extract64(cs->gicr_typer, 0, 32); in gicr_readl() 361 *data = extract64(cs->gicr_typer, 32, 32); in gicr_readl() 373 *data = extract64(cs->gicr_propbaser, 0, 32); in gicr_readl() 376 *data = extract64(cs->gicr_propbaser, 32, 32); in gicr_readl() 379 *data = extract64(cs->gicr_pendbaser, 0, 32); in gicr_readl() 382 *data = extract64(cs->gicr_pendbaser, 32, 32); in gicr_readl() 468 *data = extract64(cs->gicr_vpropbaser, 0, 32); in gicr_readl() 471 *data = extract64(cs->gicr_vpropbaser, 32, 32); in gicr_readl() 474 *data = extract64(cs->gicr_vpendbaser, 0, 32); in gicr_readl() 477 *data = extract64(cs->gicr_vpendbaser, 32, 32); in gicr_readl()
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H A D | arm_gicv3_cpuif.c | 66 return extract64(lr, ICH_LR_EL2_VINTID_SHIFT, ICH_LR_EL2_VINTID_LENGTH); in ich_lr_vintid() 71 return extract64(lr, ICH_LR_EL2_PINTID_SHIFT, ICH_LR_EL2_PINTID_LENGTH); in ich_lr_pintid() 76 return extract64(lr, ICH_LR_EL2_PRIORITY_SHIFT, ICH_LR_EL2_PRIORITY_LENGTH); in ich_lr_prio() 81 return extract64(lr, ICH_LR_EL2_STATE_SHIFT, ICH_LR_EL2_STATE_LENGTH); in ich_lr_state() 113 return extract64(cs->ich_vmcr_el2, ICH_VMCR_EL2_VBPR0_SHIFT, in read_vbpr() 116 return extract64(cs->ich_vmcr_el2, ICH_VMCR_EL2_VBPR1_SHIFT, in read_vbpr() 315 vpmr = extract64(cs->ich_vmcr_el2, ICH_VMCR_EL2_VPMR_SHIFT, in icv_hppi_can_preempt() 362 vpmr = extract64(cs->ich_vmcr_el2, ICH_VMCR_EL2_VPMR_SHIFT, in icv_hppvlpi_can_preempt() 638 value = extract64(cs->ich_vmcr_el2, ICH_VMCR_EL2_VPMR_SHIFT, in icv_pmr_read() 667 value = extract64(cs->ich_vmcr_el2, enbit, 1); in icv_igrpen_read() [all …]
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/openbmc/qemu/target/tricore/ |
H A D | op_helper.c | 404 int64_t t1 = extract64(r1, 0, 32); in helper_add_suov() 405 int64_t t2 = extract64(r2, 0, 32); in helper_add_suov() 559 int64_t t1 = extract64(r1, 0, 32); in helper_sub_suov() 560 int64_t t2 = extract64(r2, 0, 32); in helper_sub_suov() 587 int64_t t1 = extract64(r1, 0, 32); in helper_mul_suov() 588 int64_t t2 = extract64(r2, 0, 32); in helper_mul_suov() 685 uint64_t t1 = extract64(r1, 0, 32); in helper_madd32_suov() 686 uint64_t t2 = extract64(r2, 0, 32); in helper_madd32_suov() 687 uint64_t t3 = extract64(r3, 0, 32); in helper_madd32_suov() 856 uint64_t t1 = extract64(r1, 0, 32); in helper_madd64_suov() [all …]
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/openbmc/qemu/hw/display/ |
H A D | dm163.c | 165 return extract64(s->bank0_shift_register[low_word], low_shift, 6); in dm163_bank0() 172 extract64(s->bank0_shift_register[low_word], low_shift, in dm163_bank0() 175 extract64(s->bank0_shift_register[high_word], 0, in dm163_bank0() 189 return extract64(entry, 8 * (led % RGB_MATRIX_NUM_COLS), 8); in dm163_bank1()
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/openbmc/qemu/hw/misc/ |
H A D | imx7_snvs.c | 54 ret = extract64(imx7_snvs_get_count(s), 32, 15); in imx7_snvs_read() 57 ret = extract64(imx7_snvs_get_count(s), 0, 32); in imx7_snvs_read()
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/openbmc/qemu/hw/mips/ |
H A D | bootloader.c | 229 bl_gen_li(p, rt, extract64(imm, 32, 32)); in bl_gen_dli() 231 bl_gen_ori(p, rt, rt, extract64(imm, 16, 16)); in bl_gen_dli() 233 bl_gen_ori(p, rt, rt, extract64(imm, 0, 16)); in bl_gen_dli()
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/openbmc/qemu/hw/core/ |
H A D | ptimer.c | 366 s->period = extract64(raw_period, 32, 32); in ptimer_set_period_from_clock() 367 period_frac = extract64(raw_period, 0, 32); in ptimer_set_period_from_clock() 376 s->period += extract64(period_frac, 32, 32); in ptimer_set_period_from_clock()
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/openbmc/qemu/target/mips/tcg/sysemu/ |
H A D | tlb_helper.c | 42 return extract64(entrylo, 6, 54); in get_tlb_pfn_from_entrylo() 44 return extract64(entrylo, 6, 24) | /* PFN */ in get_tlb_pfn_from_entrylo() 45 (extract64(entrylo, 32, 32) << 24); /* PFNX */ in get_tlb_pfn_from_entrylo() 227 return (extract64(tlb_pfn, 0, 24) << 6) | /* PFN */ in get_entrylo_pfn_from_tlb() 228 (extract64(tlb_pfn, 24, 32) << 32); /* PFNX */ in get_entrylo_pfn_from_tlb() 324 (extract64(env->CP0_EntryHi, 62, 2) == invMsgR) in global_invalidate_tlb() 350 invMsgR = extract64(arg, 62, 2); in helper_ginvt() 569 (extract64(address, 62, 2) << (env->SEGBITS - 9)) | /* R */ in raise_mmu_exception() 570 (extract64(address, 13, env->SEGBITS - 13) << 4); /* BadVPN2 */ in raise_mmu_exception()
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