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Searched refs:dte (Results 1 – 25 of 44) sorted by relevance

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/openbmc/qemu/hw/intc/
H A Darm_gicv3_its.c213 static bool update_ite(GICv3ITSState *s, uint32_t eventid, const DTEntry *dte, in update_ite() argument
218 hwaddr iteaddr = dte->ittaddr + eventid * ITS_ITT_ENTRY_SIZE; in update_ite()
222 trace_gicv3_its_ite_write(dte->ittaddr, eventid, ite->valid, in update_ite()
250 const DTEntry *dte, ITEntry *ite) in get_ite() argument
256 hwaddr iteaddr = dte->ittaddr + eventid * ITS_ITT_ENTRY_SIZE; in get_ite()
260 trace_gicv3_its_ite_read_fault(dte->ittaddr, eventid); in get_ite()
266 trace_gicv3_its_ite_read_fault(dte->ittaddr, eventid); in get_ite()
276 trace_gicv3_its_ite_read(dte->ittaddr, eventid, ite->valid, in get_ite()
288 static MemTxResult get_dte(GICv3ITSState *s, uint32_t devid, DTEntry *dte) in get_dte() argument
297 dte->valid = false; in get_dte()
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/openbmc/linux/Documentation/devicetree/bindings/ptp/
H A Dbrcm,ptp-dte.txt9 "brcm,ptp-dte"
11 "brcm,iproc-ptp-dte" - for iproc based SoC's
16 ptp: ptp-dte@180af650 {
17 compatible = "brcm,iproc-ptp-dte", "brcm,ptp-dte";
/openbmc/linux/drivers/iommu/
H A Drockchip-iommu.c98 phys_addr_t (*pt_address)(u32 dte);
185 static inline phys_addr_t rk_dte_pt_address(u32 dte) in rk_dte_pt_address() argument
187 return (phys_addr_t)dte & RK_DTE_PT_ADDRESS_MASK; in rk_dte_pt_address()
206 static inline phys_addr_t rk_dte_pt_address_v2(u32 dte) in rk_dte_pt_address_v2() argument
208 u64 dte_v2 = dte; in rk_dte_pt_address_v2()
217 static inline bool rk_dte_is_pt_valid(u32 dte) in rk_dte_is_pt_valid() argument
219 return dte & RK_DTE_PT_VALID; in rk_dte_is_pt_valid()
540 u32 dte; in log_iova() local
556 dte = *dte_addr; in log_iova()
558 if (!rk_dte_is_pt_valid(dte)) in log_iova()
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H A Dsun50i-iommu.c196 static phys_addr_t sun50i_dte_get_pt_address(u32 dte) in sun50i_dte_get_pt_address() argument
198 return (phys_addr_t)dte & SUN50I_DTE_PT_ADDRESS_MASK; in sun50i_dte_get_pt_address()
201 static bool sun50i_dte_is_pt_valid(u32 dte) in sun50i_dte_is_pt_valid() argument
203 return (dte & SUN50I_DTE_PT_ATTRS) == SUN50I_DTE_PT_VALID; in sun50i_dte_is_pt_valid()
560 u32 dte; in sun50i_dte_get_page_table() local
563 dte = *dte_addr; in sun50i_dte_get_page_table()
564 if (sun50i_dte_is_pt_valid(dte)) { in sun50i_dte_get_page_table()
565 phys_addr_t pt_phys = sun50i_dte_get_pt_address(dte); in sun50i_dte_get_page_table()
573 dte = sun50i_mk_dte(virt_to_phys(page_table)); in sun50i_dte_get_page_table()
574 old_dte = cmpxchg(dte_addr, 0, dte); in sun50i_dte_get_page_table()
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/openbmc/qemu/hw/i386/
H A Damd_iommu.c849 uint64_t *dte) in amdvi_validate_dte() argument
851 if ((dte[0] & AMDVI_DTE_LOWER_QUAD_RESERVED) in amdvi_validate_dte()
852 || (dte[1] & AMDVI_DTE_MIDDLE_QUAD_RESERVED) in amdvi_validate_dte()
853 || (dte[2] & AMDVI_DTE_UPPER_QUAD_RESERVED) || dte[3]) { in amdvi_validate_dte()
926 static void amdvi_page_walk(AMDVIAddressSpace *as, uint64_t *dte, in amdvi_page_walk() argument
931 uint64_t pte = dte[0], pte_addr, page_mask; in amdvi_page_walk()
1068 static int amdvi_get_irte(AMDVIState *s, MSIMessage *origin, uint64_t *dte, in amdvi_get_irte() argument
1073 irte_root = dte[2] & AMDVI_IR_PHYS_ADDR_MASK; in amdvi_get_irte()
1092 uint64_t *dte, in amdvi_int_remap_legacy() argument
1100 ret = amdvi_get_irte(iommu, origin, dte, &irte, sid); in amdvi_int_remap_legacy()
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/openbmc/linux/net/x25/
H A Dx25_facilities.c266 struct x25_facilities *new, struct x25_dte_facilities *dte) in x25_negotiate_facilities() argument
275 memset(dte, 0, sizeof(*dte)); in x25_negotiate_facilities()
277 len = x25_parse_facilities(skb, &theirs, dte, &x25->vc_facil_mask); in x25_negotiate_facilities()
/openbmc/u-boot/doc/device-tree-bindings/serial/
H A Dmxc-serial.txt8 - fsl,dte-mode: use DTE mode
/openbmc/u-boot/arch/arm/dts/
H A Dimx6ull-colibri.dts165 fsl,dte-mode;
173 fsl,dte-mode;
179 fsl,dte-mode;
H A Dimx7-colibri.dtsi37 fsl,dte-mode;
H A Dtegra20-tamonten.dtsi81 nvidia,pins = "dtb", "dtc", "dte";
194 "dtc", "dte", "dtf", "gpu", "sdio1",
H A Dimx53-cx9020.dts187 fsl,dte-mode;
H A Dtegra20-paz00.dts117 nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte";
233 "dtc", "dte", "slxa", "slxc", "slxd",
H A Dtegra20-ventana.dts123 nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte";
260 nvidia,pins = "dte", "spif";
/openbmc/u-boot/arch/arm/mach-at91/include/mach/
H A Dat91_emac.h33 u32 dte; member
/openbmc/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx6dl-eckelmann-ci4x10.dts332 fsl,dte-mode;
343 fsl,dte-mode;
H A Dimx6ull-colibri.dtsi274 fsl,dte-mode;
282 fsl,dte-mode;
289 fsl,dte-mode;
H A Dimx6qdl-apalis.dtsi796 fsl,dte-mode;
804 fsl,dte-mode;
812 fsl,dte-mode;
819 fsl,dte-mode;
H A Dimx6q-arm2.dts209 fsl,dte-mode;
H A Dimx53-cx9020.dts170 fsl,dte-mode;
H A Dimx7-colibri.dtsi583 fsl,dte-mode;
593 fsl,dte-mode;
603 fsl,dte-mode;
H A Dimx6qdl-colibri.dtsi655 fsl,dte-mode;
664 fsl,dte-mode;
673 fsl,dte-mode;
/openbmc/linux/drivers/net/wan/
H A Dwanxl.c112 const char *cable, *pm, *dte = "", *dsr = "", *dcd = ""; in wanxl_cable_intr() local
163 dte = (value & STATUS_CABLE_DCE) ? " DCE" : " DTE"; in wanxl_cable_intr()
166 pm, dte, cable, dsr, dcd); in wanxl_cable_intr()
/openbmc/linux/arch/arm/boot/dts/nvidia/
H A Dtegra20-trimslice.dts97 nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte";
204 "dtb", "dtc", "dtd", "dte", "gmb",
H A Dtegra20-tamonten.dtsi92 nvidia,pins = "dtb", "dtc", "dte";
206 "dtc", "dte", "gpu", "sdio1",
/openbmc/linux/drivers/iommu/amd/
H A Diommu.c2873 u64 dte; in set_dte_irq_entry() local
2876 dte = dev_table[devid].data[2]; in set_dte_irq_entry()
2877 dte &= ~DTE_IRQ_PHYS_ADDR_MASK; in set_dte_irq_entry()
2878 dte |= iommu_virt_to_phys(table->table); in set_dte_irq_entry()
2879 dte |= DTE_IRQ_REMAP_INTCTL; in set_dte_irq_entry()
2880 dte |= DTE_INTTABLEN; in set_dte_irq_entry()
2881 dte |= DTE_IRQ_REMAP_ENABLE; in set_dte_irq_entry()
2883 dev_table[devid].data[2] = dte; in set_dte_irq_entry()

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