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Searched refs:dram (Results 1 – 25 of 191) sorted by relevance

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/openbmc/u-boot/arch/arm/mach-sunxi/
H A Ddram_sun4i.c60 struct sunxi_dram_reg *dram = in mctl_ddr3_reset() local
73 setbits_le32(&dram->mcr, DRAM_MCR_RESET); in mctl_ddr3_reset()
75 clrbits_le32(&dram->mcr, DRAM_MCR_RESET); in mctl_ddr3_reset()
79 clrbits_le32(&dram->mcr, DRAM_MCR_RESET); in mctl_ddr3_reset()
81 setbits_le32(&dram->mcr, DRAM_MCR_RESET); in mctl_ddr3_reset()
100 struct sunxi_dram_reg *dram = (struct sunxi_dram_reg *)SUNXI_DRAMC_BASE; in mctl_set_drive() local
103 clrsetbits_le32(&dram->mcr, DRAM_MCR_MODE_NORM(0x3) | (0x3 << 28), in mctl_set_drive()
105 clrsetbits_le32(&dram->mcr, DRAM_MCR_MODE_NORM(0x3), in mctl_set_drive()
113 struct sunxi_dram_reg *dram = (struct sunxi_dram_reg *)SUNXI_DRAMC_BASE; in mctl_itm_disable() local
115 clrsetbits_le32(&dram->ccr, DRAM_CCR_INIT, DRAM_CCR_ITM_OFF); in mctl_itm_disable()
[all …]
/openbmc/linux/drivers/net/wireless/intel/iwlwifi/pcie/
H A Dctxt-info.c50 struct iwl_dram_data *dram) in iwl_pcie_ctxt_info_alloc_dma() argument
52 dram->block = iwl_pcie_ctxt_info_dma_alloc_coherent(trans, len, in iwl_pcie_ctxt_info_alloc_dma()
53 &dram->physical); in iwl_pcie_ctxt_info_alloc_dma()
54 if (!dram->block) in iwl_pcie_ctxt_info_alloc_dma()
57 dram->size = len; in iwl_pcie_ctxt_info_alloc_dma()
58 memcpy(dram->block, data, len); in iwl_pcie_ctxt_info_alloc_dma()
65 struct iwl_self_init_dram *dram = &trans->init_dram; in iwl_pcie_ctxt_info_free_paging() local
68 if (!dram->paging) { in iwl_pcie_ctxt_info_free_paging()
69 WARN_ON(dram->paging_cnt); in iwl_pcie_ctxt_info_free_paging()
74 for (i = 0; i < dram->paging_cnt; i++) in iwl_pcie_ctxt_info_free_paging()
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/openbmc/u-boot/arch/arm/cpu/arm926ejs/lpc32xx/
H A Ddram.c24 void ddr_init(struct emc_dram_settings *dram) in ddr_init() argument
36 writel(dram->cmddelay, &clk->sdramclk_ctrl); in ddr_init()
37 writel(dram->config0, &emc->config0); in ddr_init()
38 writel(dram->rascas0, &emc->rascas0); in ddr_init()
39 writel(dram->rdconfig, &emc->read_config); in ddr_init()
41 writel((ck / dram->trp) & 0x0000000F, &emc->t_rp); in ddr_init()
42 writel((ck / dram->tras) & 0x0000000F, &emc->t_ras); in ddr_init()
43 writel((ck / dram->tsrex) & 0x0000007F, &emc->t_srex); in ddr_init()
44 writel((ck / dram->twr) & 0x0000000F, &emc->t_wr); in ddr_init()
45 writel((ck / dram->trc) & 0x0000001F, &emc->t_rc); in ddr_init()
[all …]
/openbmc/u-boot/drivers/ram/rockchip/
H A Dsdram_rk322x.c363 static void phy_softreset(struct dram_info *dram) in phy_softreset() argument
365 struct rk322x_ddr_phy *ddr_phy = dram->chan[0].phy; in phy_softreset()
366 struct rk322x_grf *grf = dram->grf; in phy_softreset()
378 static void set_bw(struct dram_info *dram, u32 bw) in set_bw() argument
380 struct rk322x_ddr_pctl *pctl = dram->chan[0].pctl; in set_bw()
381 struct rk322x_ddr_phy *ddr_phy = dram->chan[0].phy; in set_bw()
382 struct rk322x_grf *grf = dram->grf; in set_bw()
577 static void dram_all_config(const struct dram_info *dram, in dram_all_config() argument
595 writel(sys_reg, &dram->grf->os_reg[2]); in dram_all_config()
600 static int dram_cap_detect(struct dram_info *dram, in dram_cap_detect() argument
[all …]
H A Dsdram_rk3188.c532 static void dram_all_config(const struct dram_info *dram, in dram_all_config() argument
554 dram_cfg_rbc(&dram->chan[chan], chan, sdram_params); in dram_all_config()
557 ddr_rank_2_row15en(dram->grf, 0); in dram_all_config()
559 ddr_rank_2_row15en(dram->grf, 1); in dram_all_config()
561 writel(sys_reg, &dram->pmu->sys_reg[2]); in dram_all_config()
564 static int sdram_rank_bw_detect(struct dram_info *dram, int channel, in sdram_rank_bw_detect() argument
569 const struct chan_info *chan = &dram->chan[channel]; in sdram_rank_bw_detect()
572 ddr_rank_2_row15en(dram->grf, 0); in sdram_rank_bw_detect()
595 dram->grf); in sdram_rank_bw_detect()
605 ddr_phy_ctl_reset(dram->cru, channel, 1); in sdram_rank_bw_detect()
[all …]
H A Dsdram_rk3288.c589 static void dram_all_config(const struct dram_info *dram, in dram_all_config() argument
611 dram_cfg_rbc(&dram->chan[chan], chan, sdram_params); in dram_all_config()
613 writel(sys_reg, &dram->pmu->sys_reg[2]); in dram_all_config()
614 rk_clrsetreg(&dram->sgrf->soc_con2, 0x1f, sdram_params->base.stride); in dram_all_config()
617 static int sdram_rank_bw_detect(struct dram_info *dram, int channel, in sdram_rank_bw_detect() argument
622 const struct chan_info *chan = &dram->chan[channel]; in sdram_rank_bw_detect()
648 dram->grf); in sdram_rank_bw_detect()
658 ddr_phy_ctl_reset(dram->cru, channel, 1); in sdram_rank_bw_detect()
660 ddr_phy_ctl_reset(dram->cru, channel, 0); in sdram_rank_bw_detect()
670 static int sdram_col_row_detect(struct dram_info *dram, int channel, in sdram_col_row_detect() argument
[all …]
H A Dsdram_rk3399.c931 static void dram_all_config(struct dram_info *dram, in dram_all_config() argument
961 ddr_msch_regs = dram->chan[channel].msch; in dram_all_config()
976 setbits_le32(&dram->chan[channel].pctl->denali_ctl[276], in dram_all_config()
980 writel(sys_reg, &dram->pmugrf->os_reg2); in dram_all_config()
981 rk_clrsetreg(&dram->pmusgrf->soc_con4, 0x1f << 10, in dram_all_config()
987 &dram->pmucru->pmucru_rstnhold_con[1]); in dram_all_config()
988 clrsetbits_le32(&dram->cru->glb_rst_con, 0x3, 0x3); in dram_all_config()
991 static int switch_to_phy_index1(struct dram_info *dram, in switch_to_phy_index1() argument
1002 &dram->cic->cic_ctrl0); in switch_to_phy_index1()
1003 while (!(readl(&dram->cic->cic_status0) & (1 << 2))) { in switch_to_phy_index1()
[all …]
/openbmc/linux/drivers/usb/host/
H A Dxhci-mvebu.c23 const struct mbus_dram_target_info *dram) in xhci_mvebu_mbus_config() argument
34 for (win = 0; win < dram->num_cs; win++) { in xhci_mvebu_mbus_config()
35 const struct mbus_dram_window *cs = &dram->cs[win]; in xhci_mvebu_mbus_config()
38 (dram->mbus_dram_target_id << 4) | 1, in xhci_mvebu_mbus_config()
51 const struct mbus_dram_target_info *dram; in xhci_mvebu_mbus_init_quirk() local
65 dram = mv_mbus_dram_info(); in xhci_mvebu_mbus_init_quirk()
66 xhci_mvebu_mbus_config(base, dram); in xhci_mvebu_mbus_init_quirk()
H A Dehci-orion.c140 const struct mbus_dram_target_info *dram) in ehci_orion_conf_mbus_windows() argument
149 for (i = 0; i < dram->num_cs; i++) { in ehci_orion_conf_mbus_windows()
150 const struct mbus_dram_window *cs = dram->cs + i; in ehci_orion_conf_mbus_windows()
154 (dram->mbus_dram_target_id << 4) | 1); in ehci_orion_conf_mbus_windows()
206 const struct mbus_dram_target_info *dram; in ehci_orion_drv_probe() local
278 dram = mv_mbus_dram_info(); in ehci_orion_drv_probe()
279 if (dram) in ehci_orion_drv_probe()
280 ehci_orion_conf_mbus_windows(hcd, dram); in ehci_orion_drv_probe()
/openbmc/linux/drivers/tty/serial/
H A Dicom.c260 struct func_dram __iomem *dram; member
605 void __iomem *dram_ptr = icom_port->dram; in load_code()
636 iram_ptr = (char __iomem *)icom_port->dram + ICOM_IRAM_OFFSET; in load_code()
656 iram_ptr = (char __iomem *) icom_port->dram + ICOM_IRAM_OFFSET; in load_code()
664 writeb(V2_HARDWARE, &(icom_port->dram->misc_flags)); in load_code()
670 &(icom_port->dram->HDLCConfigReg)); in load_code()
671 writeb(0x04, &(icom_port->dram->FlagFillIdleTimer)); /* 0.5 seconds */ in load_code()
672 writeb(0x00, &(icom_port->dram->CmdReg)); in load_code()
673 writeb(0x10, &(icom_port->dram->async_config3)); in load_code()
675 ICOM_ACFG_1STOP_BIT), &(icom_port->dram->async_config2)); in load_code()
[all …]
/openbmc/u-boot/arch/arm/mach-mvebu/
H A Dcpu.c514 const struct mbus_dram_target_info *dram; in ahci_mvebu_mbus_config() local
517 dram = mvebu_mbus_dram_info(); in ahci_mvebu_mbus_config()
525 for (i = 0; i < dram->num_cs; i++) { in ahci_mvebu_mbus_config()
526 const struct mbus_dram_window *cs = dram->cs + i; in ahci_mvebu_mbus_config()
529 (dram->mbus_dram_target_id << 4) | 1, in ahci_mvebu_mbus_config()
563 const struct mbus_dram_target_info *dram) in xhci_mvebu_mbus_config() argument
572 for (i = 0; i < dram->num_cs; i++) { in xhci_mvebu_mbus_config()
573 const struct mbus_dram_window *cs = dram->cs + i; in xhci_mvebu_mbus_config()
577 (dram->mbus_dram_target_id << 4) | 1, in xhci_mvebu_mbus_config()
587 const struct mbus_dram_target_info *dram; in board_xhci_enable() local
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/openbmc/u-boot/arch/x86/dts/
H A Dgalileo.dts51 dram-width = <DRAM_WIDTH_X8>;
52 dram-speed = <DRAM_FREQ_800>;
53 dram-type = <DRAM_TYPE_DDR3>;
63 dram-density = <DRAM_DENSITY_1G>;
64 dram-cl = <6>;
65 dram-ras = <0x0000927c>;
66 dram-wtr = <0x00002710>;
67 dram-rrd = <0x00002710>;
68 dram-faw = <0x00009c40>;
/openbmc/linux/drivers/ata/
H A Dahci_mvebu.c37 const struct mbus_dram_target_info *dram) in ahci_mvebu_mbus_config() argument
47 for (i = 0; i < dram->num_cs; i++) { in ahci_mvebu_mbus_config()
48 const struct mbus_dram_window *cs = dram->cs + i; in ahci_mvebu_mbus_config()
51 (dram->mbus_dram_target_id << 4) | 1, in ahci_mvebu_mbus_config()
72 const struct mbus_dram_target_info *dram; in ahci_mvebu_armada_380_config() local
75 dram = mv_mbus_dram_info(); in ahci_mvebu_armada_380_config()
76 if (dram) in ahci_mvebu_armada_380_config()
77 ahci_mvebu_mbus_config(hpriv, dram); in ahci_mvebu_armada_380_config()
/openbmc/u-boot/arch/arm/mach-uniphier/clk/
H A DMakefile5 obj-$(CONFIG_ARCH_UNIPHIER_LD4) += clk-early-ld4.o clk-dram-ld4.o dpll-ld4.o
6 obj-$(CONFIG_ARCH_UNIPHIER_PRO4) += clk-early-ld4.o clk-dram-ld4.o dpll-pro4.o
7 obj-$(CONFIG_ARCH_UNIPHIER_SLD8) += clk-early-ld4.o clk-dram-ld4.o dpll-sld8.o
8 obj-$(CONFIG_ARCH_UNIPHIER_PRO5) += clk-early-ld4.o clk-dram-pro5.o dpll-pro5.o
9 obj-$(CONFIG_ARCH_UNIPHIER_PXS2) += clk-early-ld4.o clk-dram-pxs2.o dpll-pxs2.o
10 obj-$(CONFIG_ARCH_UNIPHIER_LD6B) += clk-early-ld4.o clk-dram-pxs2.o dpll-pxs2.o
/openbmc/u-boot/drivers/mmc/
H A Dmv_sdhci.c16 const struct mbus_dram_target_info *dram; in sdhci_mvebu_mbus_config() local
19 dram = mvebu_mbus_dram_info(); in sdhci_mvebu_mbus_config()
26 for (i = 0; i < dram->num_cs; i++) { in sdhci_mvebu_mbus_config()
27 const struct mbus_dram_window *cs = dram->cs + i; in sdhci_mvebu_mbus_config()
31 (dram->mbus_dram_target_id << 4) | 1, in sdhci_mvebu_mbus_config()
/openbmc/linux/sound/soc/kirkwood/
H A Dkirkwood-dma.c79 const struct mbus_dram_target_info *dram) in kirkwood_dma_conf_mbus_windows() argument
88 for (i = 0; i < dram->num_cs; i++) { in kirkwood_dma_conf_mbus_windows()
89 const struct mbus_dram_window *cs = &dram->cs[i]; in kirkwood_dma_conf_mbus_windows()
95 (dram->mbus_dram_target_id << 4) | 1, in kirkwood_dma_conf_mbus_windows()
182 const struct mbus_dram_target_info *dram = mv_mbus_dram_info(); in kirkwood_dma_hw_params() local
185 if (!dram) in kirkwood_dma_hw_params()
190 KIRKWOOD_PLAYBACK_WIN, addr, dram); in kirkwood_dma_hw_params()
193 KIRKWOOD_RECORD_WIN, addr, dram); in kirkwood_dma_hw_params()
/openbmc/u-boot/drivers/ata/
H A Dmvsata_ide.c107 const struct mbus_dram_target_info *dram; in mvsata_ide_conf_mbus_windows() local
110 dram = mvebu_mbus_dram_info(); in mvsata_ide_conf_mbus_windows()
118 for (i = 0; i < dram->num_cs; i++) { in mvsata_ide_conf_mbus_windows()
119 const struct mbus_dram_window *cs = dram->cs + i; in mvsata_ide_conf_mbus_windows()
121 (dram->mbus_dram_target_id << 4) | 1, in mvsata_ide_conf_mbus_windows()
/openbmc/linux/sound/soc/intel/catpt/
H A Dloader.c159 if (off < cdev->dram.start || off > cdev->dram.end) in catpt_store_memdumps()
219 if (off < cdev->dram.start || off > cdev->dram.end) in catpt_restore_memdumps()
248 r1.start = cdev->dram.start + blk->ram_offset; in catpt_restore_fwimage()
264 if (off < cdev->dram.start || off > cdev->dram.end) in catpt_restore_fwimage()
305 sram = &cdev->dram; in catpt_load_block()
632 catpt_dsp_update_srampge(cdev, &cdev->dram, cdev->spec->dram_mask); in catpt_boot_firmware()
650 __request_region(&cdev->dram, 0, 0x200, NULL, 0); in catpt_first_boot_firmware()
652 for (res = cdev->dram.child; res->sibling; res = res->sibling) in catpt_first_boot_firmware()
654 __request_region(&cdev->dram, res->end + 1, in catpt_first_boot_firmware()
655 cdev->dram.end - res->end, NULL, 0); in catpt_first_boot_firmware()
[all …]
/openbmc/u-boot/drivers/usb/host/
H A Dehci-marvell.c55 const struct mbus_dram_target_info *dram; in usb_brg_adrdec_setup() local
58 dram = mvebu_mbus_dram_info(); in usb_brg_adrdec_setup()
65 for (i = 0; i < dram->num_cs; i++) { in usb_brg_adrdec_setup()
66 const struct mbus_dram_window *cs = dram->cs + i; in usb_brg_adrdec_setup()
70 (dram->mbus_dram_target_id << 4) | 1, in usb_brg_adrdec_setup()
/openbmc/linux/drivers/firmware/tegra/
H A Dbpmp-tegra186.c25 void *dram; member
130 iosys_map_set_vaddr(&rx, priv->rx.dram + offset); in tegra186_bpmp_channel_init()
131 iosys_map_set_vaddr(&tx, priv->tx.dram + offset); in tegra186_bpmp_channel_init()
220 priv->tx.dram = devm_memremap(bpmp->dev, priv->tx.phys, size, in tegra186_bpmp_dram_init()
222 if (IS_ERR(priv->tx.dram)) { in tegra186_bpmp_dram_init()
223 err = PTR_ERR(priv->tx.dram); in tegra186_bpmp_dram_init()
228 priv->rx.dram = priv->tx.dram + SZ_4K; in tegra186_bpmp_dram_init()
/openbmc/linux/Documentation/devicetree/bindings/pinctrl/
H A Dmarvell,armada-39x-pinctrl.txt32 mpp14 14 gpio, dram(vttctrl), dev(we1), ua1(txd)
34 mpp16 16 gpio, dram(deccerr), spi0(miso), pcie0(clkreq), i2c1(sda)
52 mpp33 33 gpio, dram(deccerr), dev(ad3)
62 mpp43 43 gpio, pcie0(clkreq), dram(vttctrl), dram(deccerr), spi1(cs2), dev(clkout), nand(rb1)
69 mpp48 48 gpio, sata0(prsnt) [1], dram(vttctrl), tdm(pclk) [2], audio(mclk) [2], sd0(d4), pcie0(clkr…
73 mpp51 51 gpio, tdm(dtx) [2], audio(sdo) [2], dram(deccerr), ua2(txd)
78 mpp56 56 gpio, ua1(rts), dram(deccerr), spi1(mosi), ua1(txd)
H A Dmarvell,armada-38x-pinctrl.txt32 mpp14 14 gpio, ge0(rxd2), ptp(clk), dram(vttctrl), spi0(cs3), dev(we1), pcie3(clkreq)
34 mpp16 16 gpio, ge0(rxctl), ge(mdio slave), dram(deccerr), spi0(miso), pcie0(clkreq), …
51 mpp33 33 gpio, dram(deccerr), dev(ad3)
61 mpp43 43 gpio, pcie0(clkreq), dram(vttctrl), dram(deccerr), spi1(cs2), dev(clkout), n…
66 mpp48 48 gpio, sata0(prsnt), dram(vttctrl), tdm(pclk), audio(mclk), sd0(d4), pcie0(cl…
69 mpp51 51 gpio, tdm(dtx), audio(sdo), dram(deccerr), ptp(trig)
74 mpp56 56 gpio, ua1(rts), ge(mdc), dram(deccerr), spi1(mosi), ua1(txd)
/openbmc/u-boot/drivers/ddr/imx/imx8m/
H A DKconfig2 bool "imx8m dram"
17 hex "Define the base address for saved dram timing"
19 after DRAM is trained, need to save the dram related timming
/openbmc/linux/drivers/net/ethernet/ti/icssg/
H A Dicssg_config.c229 p = emac->dram.va + MGR_R30_CMD_OFFSET; in emac_r30_cmd_init()
241 p = emac->dram.va + MGR_R30_CMD_OFFSET; in emac_r30_is_done()
274 bpool_cfg = emac->dram.va + BUFFER_POOL_0_ADDR_OFFSET; in prueth_emac_buffer_setup()
293 rxq_ctx = emac->dram.va + HOST_RX_Q_PRE_CONTEXT_OFFSET; in prueth_emac_buffer_setup()
301 rxq_ctx = emac->dram.va + HOST_RX_Q_EXP_CONTEXT_OFFSET; in prueth_emac_buffer_setup()
330 void __iomem *config = emac->dram.va + ICSSG_CONFIG_OFFSET; in icssg_config()
411 p = emac->dram.va + MGR_R30_CMD_OFFSET; in emac_set_port_state()
456 writeb(fw_speed, emac->dram.va + PORT_LINK_SPEED_OFFSET); in icssg_config_set_speed()
/openbmc/linux/arch/arm/plat-orion/
H A Dpcie.c125 const struct mbus_dram_target_info *dram; in orion_pcie_setup_wins() local
129 dram = mv_mbus_dram_info(); in orion_pcie_setup_wins()
154 for (i = 0; i < dram->num_cs; i++) { in orion_pcie_setup_wins()
155 const struct mbus_dram_window *cs = dram->cs + i; in orion_pcie_setup_wins()
161 (dram->mbus_dram_target_id << 4) | 1, in orion_pcie_setup_wins()
176 writel(dram->cs[0].base, base + PCIE_BAR_LO_OFF(1)); in orion_pcie_setup_wins()

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