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Searched refs:devcfg_base (Results 1 – 4 of 4) sorted by relevance

/openbmc/u-boot/drivers/fpga/
H A Dzynqpl.c159 writel((u32)srcbuf, &devcfg_base->dma_src_addr); in zynq_dma_transfer()
160 writel(dstbuf, &devcfg_base->dma_dst_addr); in zynq_dma_transfer()
161 writel(srclen, &devcfg_base->dma_src_len); in zynq_dma_transfer()
162 writel(dstlen, &devcfg_base->dma_dst_len); in zynq_dma_transfer()
164 isr_status = readl(&devcfg_base->int_sts); in zynq_dma_transfer()
173 readl(&devcfg_base->write_count)); in zynq_dma_transfer()
175 readl(&devcfg_base->read_count)); in zynq_dma_transfer()
184 isr_status = readl(&devcfg_base->int_sts); in zynq_dma_transfer()
190 writel(DEVCFG_ISR_DMA_DONE, &devcfg_base->int_sts); in zynq_dma_transfer()
201 clrbits_le32(&devcfg_base->mctrl, DEVCFG_MCTRL_PCAP_LPBK); in zynq_dma_xfer_init()
[all …]
/openbmc/u-boot/arch/arm/mach-zynq/
H A Dcpu.c51 writel(0x757BDF0D, &devcfg_base->unlock); in arch_cpu_init()
52 writel(0xFFFFFFFF, &devcfg_base->rom_shadow); in arch_cpu_init()
75 return (readl(&devcfg_base->mctrl) & ZYNQ_SILICON_VER_MASK) in zynq_get_silicon_version()
/openbmc/linux/arch/mips/pci/
H A Dpci-ar724x.c40 void __iomem *devcfg_base; member
127 base = apc->devcfg_base; in ar724x_pci_read()
196 base = apc->devcfg_base; in ar724x_pci_write()
379 apc->devcfg_base = devm_platform_ioremap_resource_byname(pdev, "cfg_base"); in ar724x_pci_probe()
380 if (IS_ERR(apc->devcfg_base)) in ar724x_pci_probe()
381 return PTR_ERR(apc->devcfg_base); in ar724x_pci_probe()
/openbmc/u-boot/arch/arm/mach-zynq/include/mach/
H A Dhardware.h113 #define devcfg_base ((struct devcfg_regs *)ZYNQ_DEV_CFG_APB_BASEADDR) macro