Home
last modified time | relevance | path

Searched refs:deposit64 (Results 1 – 25 of 71) sorted by relevance

123

/openbmc/qemu/target/hppa/
H A Dmachine.c82 val = deposit64(val, 61, 1, ent->t); in put_tlb()
83 val = deposit64(val, 60, 1, ent->d); in put_tlb()
84 val = deposit64(val, 59, 1, ent->b); in put_tlb()
85 val = deposit64(val, 56, 3, ent->ar_type); in put_tlb()
86 val = deposit64(val, 54, 2, ent->ar_pl1); in put_tlb()
87 val = deposit64(val, 52, 2, ent->ar_pl2); in put_tlb()
88 val = deposit64(val, 51, 1, ent->u); in put_tlb()
91 val = deposit64(val, 1, 31, ent->access_id); in put_tlb()
H A Dop_helper.c375 ret = deposit64(ret, i, 16, fr); in HELPER()
391 ret = deposit64(ret, i, 16, fr); in HELPER()
405 ret = deposit64(ret, i, 16, (fr >> 1) | (fr & 1)); in HELPER()
421 ret = deposit64(ret, i, 16, fr); in HELPER()
437 ret = deposit64(ret, i, 16, fr); in HELPER()
453 ret = deposit64(ret, i, 16, fr); in HELPER()
469 ret = deposit64(ret, i, 16, fr); in HELPER()
H A Dgdbstub.c266 env->fr[0] = deposit64(env->fr[0], 32, 32, val); in hppa_cpu_gdb_write_register()
272 *fr = deposit64(*fr, (n & 1 ? 0 : 32), 32, val); in hppa_cpu_gdb_write_register()
/openbmc/qemu/tests/qtest/
H A Driscv-iommu-test.c144 deposit64(reg64, RISCV_IOMMU_CQB_PPN_START, in test_iommu_init_queues()
146 deposit64(reg64, RISCV_IOMMU_CQB_LOG2SZ_START, in test_iommu_init_queues()
165 deposit64(reg64, RISCV_IOMMU_FQB_PPN_START, in test_iommu_init_queues()
167 deposit64(reg64, RISCV_IOMMU_FQB_LOG2SZ_START, in test_iommu_init_queues()
186 deposit64(reg64, RISCV_IOMMU_PQB_PPN_START, in test_iommu_init_queues()
188 deposit64(reg64, RISCV_IOMMU_PQB_LOG2SZ_START, in test_iommu_init_queues()
/openbmc/qemu/hw/sd/
H A Daspeed_sdhci.c90 sdhci->slots[0].capareg = deposit64(sdhci->slots[0].capareg, in aspeed_sdhci_write()
94 sdhci->slots[0].capareg = deposit64(sdhci->slots[0].capareg, in aspeed_sdhci_write()
98 sdhci->slots[0].maxcurr = deposit64(sdhci->slots[0].maxcurr, in aspeed_sdhci_write()
102 sdhci->slots[1].capareg = deposit64(sdhci->slots[1].capareg, in aspeed_sdhci_write()
106 sdhci->slots[1].capareg = deposit64(sdhci->slots[1].capareg, in aspeed_sdhci_write()
110 sdhci->slots[1].maxcurr = deposit64(sdhci->slots[0].maxcurr, in aspeed_sdhci_write()
/openbmc/qemu/hw/rtc/
H A Dgoldfish_rtc.c146 new_tick = deposit64(current_tick, 0, 32, value); in goldfish_rtc_write()
151 new_tick = deposit64(current_tick, 32, 32, value); in goldfish_rtc_write()
155 s->alarm_next = deposit64(s->alarm_next, 0, 32, value); in goldfish_rtc_write()
159 s->alarm_next = deposit64(s->alarm_next, 32, 32, value); in goldfish_rtc_write()
/openbmc/qemu/hw/dma/
H A Dsifive_pdma.c378 deposit64(s->chan[ch].next_bytes, 0, 32, value); in sifive_pdma_writel()
382 deposit64(s->chan[ch].next_bytes, 32, 32, value); in sifive_pdma_writel()
385 s->chan[ch].next_dst = deposit64(s->chan[ch].next_dst, 0, 32, value); in sifive_pdma_writel()
388 s->chan[ch].next_dst = deposit64(s->chan[ch].next_dst, 32, 32, value); in sifive_pdma_writel()
391 s->chan[ch].next_src = deposit64(s->chan[ch].next_src, 0, 32, value); in sifive_pdma_writel()
394 s->chan[ch].next_src = deposit64(s->chan[ch].next_src, 32, 32, value); in sifive_pdma_writel()
/openbmc/qemu/target/loongarch/tcg/
H A Dcsr_helper.c59 env->CSR_ESTAT = deposit64(env->CSR_ESTAT, 0, 2, val); in helper_csrwr_estat()
69 env->CSR_ASID = deposit64(env->CSR_ASID, 0, 10, val); in helper_csrwr_asid()
/openbmc/qemu/hw/timer/
H A Dhpet.c169 uint64_t result = deposit64(cur_tick, 0, 32, target); in hpet_calculate_cmp64()
516 new_val = deposit64(old_val, shift, len, value); in hpet_ram_write()
551 timer->cmp = deposit64(timer->cmp, shift, len, value); in hpet_ram_write()
554 timer->period = deposit64(timer->period, shift, len, value); in hpet_ram_write()
562 timer->fsb = deposit64(timer->fsb, shift, len, value); in hpet_ram_write()
575 new_val = deposit64(old_val, shift, len, value); in hpet_ram_write()
620 s->hpet_counter = deposit64(s->hpet_counter, shift, len, value); in hpet_ram_write()
H A Da9gtimer.c204 s->counter = deposit64(s->counter, shift, 32, value); in a9_gtimer_write()
220 gtb->compare = deposit64(gtb->compare, shift, 32, value); in a9_gtimer_write()
/openbmc/qemu/hw/intc/
H A Daspeed_vic.c83 s->raw = deposit64(s->raw, irq, 1, raise); in aspeed_vic_set_irq()
100 s->raw = deposit64(s->raw, irq, 1, raise); in aspeed_vic_set_irq()
103 s->level = deposit64(s->level, irq, 1, level); in aspeed_vic_set_irq()
H A Darm_gicv3_redist.c528 cs->gicr_propbaser = deposit64(cs->gicr_propbaser, 0, 32, value); in gicr_writel()
531 cs->gicr_propbaser = deposit64(cs->gicr_propbaser, 32, 32, value); in gicr_writel()
534 cs->gicr_pendbaser = deposit64(cs->gicr_pendbaser, 0, 32, value); in gicr_writel()
537 cs->gicr_pendbaser = deposit64(cs->gicr_pendbaser, 32, 32, value); in gicr_writel()
634 cs->gicr_vpropbaser = deposit64(cs->gicr_vpropbaser, 0, 32, value); in gicr_writel()
637 cs->gicr_vpropbaser = deposit64(cs->gicr_vpropbaser, 32, 32, value); in gicr_writel()
640 gicr_write_vpendbaser(cs, deposit64(cs->gicr_vpendbaser, 0, 32, value)); in gicr_writel()
643 gicr_write_vpendbaser(cs, deposit64(cs->gicr_vpendbaser, 32, 32, value)); in gicr_writel()
/openbmc/qemu/hw/misc/
H A Dimx7_snvs.c91 new_value = deposit64(snvs_count, 32, 32, v); in imx7_snvs_write()
94 new_value = deposit64(snvs_count, 0, 32, v); in imx7_snvs_write()
/openbmc/qemu/hw/net/
H A Dftgmac100.c578 buf_addr = deposit64(buf_addr, 32, 32, in ftgmac100_do_tx()
821 s->rx_ring = deposit64(s->rx_ring, 0, 32, value); in ftgmac100_write()
822 s->rx_descriptor = deposit64(s->rx_descriptor, 0, 32, value); in ftgmac100_write()
835 s->tx_ring = deposit64(s->tx_ring, 0, 32, value); in ftgmac100_write()
836 s->tx_descriptor = deposit64(s->tx_descriptor, 0, 32, value); in ftgmac100_write()
968 s->tx_ring = deposit64(s->tx_ring, 32, 32, value); in ftgmac100_high_write()
969 s->tx_descriptor = deposit64(s->tx_descriptor, 32, 32, value); in ftgmac100_high_write()
977 s->rx_ring = deposit64(s->rx_ring, 32, 32, value); in ftgmac100_high_write()
978 s->rx_descriptor = deposit64(s->rx_descriptor, 32, 32, value); in ftgmac100_high_write()
1102 buf_addr = deposit64(buf_addr, 32, 32, in ftgmac100_receive()
/openbmc/qemu/target/arm/
H A Dvfp_helper.c351 env->vfp.fpsr = deposit64(env->vfp.fpsr, 28, 4, flags); /* NZCV */ in softfloat_to_vfp_compare()
634 result_frac = deposit64(0, 44, 8, estimate); in call_recip_estimate()
636 result_frac = deposit64(result_frac >> 1, 51, 1, 1); in call_recip_estimate()
638 result_frac = deposit64(result_frac >> 2, 50, 2, 1); in call_recip_estimate()
806 f64_val = deposit64(0, 63, 1, f64_sign); in HELPER()
807 f64_val = deposit64(f64_val, 52, 11, f64_exp); in HELPER()
808 f64_val = deposit64(f64_val, 0, 52, f64_frac); in HELPER()
990 val = deposit64(0, 61, 1, f64_sign); in HELPER()
991 val = deposit64(val, 52, 11, f64_exp); in HELPER()
992 val = deposit64(val, 44, 8, extract64(f64_frac, 52 - 8, 8)); in HELPER()
[all …]
/openbmc/qemu/linux-user/aarch64/
H A Dmte_user_helper.c34 env->cp15.sctlr_el[1] = deposit64(env->cp15.sctlr_el[1], 38, 2, tcf); in arm_set_mte_tcf0()
H A Dtarget_prctl.h185 deposit64(env->cp15.gcr_el1, 0, 16, ~arg2 >> PR_MTE_TAG_SHIFT); in do_prctl_set_tagged_addr_ctrl()
203 ret = deposit64(ret, PR_MTE_TAG_SHIFT, 16, ~env->cp15.gcr_el1); in do_prctl_get_tagged_addr_ctrl()
/openbmc/qemu/target/sparc/
H A Dwin_helper.c83 env->cc_N = deposit64(env->cc_N, 0, 32, -(val & PSR_NEG)); in cpu_put_psr_icc()
84 env->cc_V = deposit64(env->cc_V, 0, 32, -(val & PSR_OVF)); in cpu_put_psr_icc()
287 env->cc_N = deposit64(-(val & 0x08), 32, 32, -(val & 0x80)); in cpu_put_ccr()
288 env->cc_V = deposit64(-(val & 0x02), 32, 32, -(val & 0x20)); in cpu_put_ccr()
H A Dmachine.c121 env->cc_N = deposit64(env->cc_N, 32, 32, -(val & PSR_NEG)); in get_xcc()
122 env->cc_V = deposit64(env->cc_V, 32, 32, -(val & PSR_OVF)); in get_xcc()
/openbmc/qemu/target/s390x/tcg/
H A Dint_helper.c55 return deposit64(q, 32, 32, r); in HELPER()
76 return deposit64(q, 32, 32, r); in HELPER()
/openbmc/qemu/hw/arm/
H A Dsmmuv3.c300 s->cmdq.base = deposit64(s->cmdq.base, 0, 5, SMMU_CMDQS); in smmuv3_init_regs()
304 s->eventq.base = deposit64(s->eventq.base, 0, 5, SMMU_EVENTQS); in smmuv3_init_regs()
1588 s->gerror_irq_cfg0 = deposit64(s->gerror_irq_cfg0, 0, 32, data); in smmu_writel()
1591 s->gerror_irq_cfg0 = deposit64(s->gerror_irq_cfg0, 32, 32, data); in smmu_writel()
1610 s->strtab_base = deposit64(s->strtab_base, 0, 32, data); in smmu_writel()
1613 s->strtab_base = deposit64(s->strtab_base, 32, 32, data); in smmu_writel()
1623 s->cmdq.base = deposit64(s->cmdq.base, 0, 32, data); in smmu_writel()
1630 s->cmdq.base = deposit64(s->cmdq.base, 32, 32, data); in smmu_writel()
1640 s->eventq.base = deposit64(s->eventq.base, 0, 32, data); in smmu_writel()
1647 s->eventq.base = deposit64(s->eventq.base, 32, 32, data); in smmu_writel()
[all …]
/openbmc/qemu/include/hw/
H A Dregisterfields.h114 _d = deposit64((storage), R_ ## reg ## _ ## field ## _SHIFT, \
147 _d = deposit64((storage), R_ ## reg ## _ ## field ## _SHIFT, \
218 _d = deposit64((storage), field ## _SHIFT, field ## _LENGTH, _v.v); \
/openbmc/qemu/target/m68k/
H A Dop_helper.c681 uint64_t num = deposit64(env->dregs[numr], 32, 32, env->dregs[regr]); in HELPER()
718 int64_t num = deposit64(env->dregs[numr], 32, 32, env->dregs[regr]); in HELPER()
808 c = deposit64(c2, 32, 32, c1); in do_cas2l()
809 u = deposit64(u2, 32, 32, u1); in do_cas2l()
814 c = deposit64(c1, 32, 32, c2); in do_cas2l()
815 u = deposit64(u1, 32, 32, u2); in do_cas2l()
/openbmc/qemu/target/openrisc/
H A Dsys_helper.c147 env->mac = deposit64(env->mac, 0, 32, rb); in HELPER()
150 env->mac = deposit64(env->mac, 32, 32, rb); in HELPER()
/openbmc/qemu/hw/gpio/
H A Dimx_gpio.c229 s->icr = deposit64(s->icr, 0, 32, value); in imx_gpio_write()
234 s->icr = deposit64(s->icr, 32, 32, value); in imx_gpio_write()

123