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Searched refs:ddr_type (Results 1 – 25 of 39) sorted by relevance

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/openbmc/u-boot/drivers/ddr/marvell/a38x/
H A Dddr3_init.c9 static char *ddr_type = "DDR3"; variable
37 mv_ddr_pre_training_soc_config(ddr_type); in ddr3_init()
76 printf("%s Training Sequence - FAILED\n", ddr_type); in ddr3_init()
85 mv_ddr_post_training_soc_config(ddr_type); in ddr3_init()
136 printf("%s Training Sequence - FAILED\n", ddr_type); in mv_ddr_training_params_set()
H A Dmv_ddr_plat.h225 int mv_ddr_pre_training_soc_config(const char *ddr_type);
226 int mv_ddr_post_training_soc_config(const char *ddr_type);
H A Dmv_ddr_plat.c1104 static int ddr3_restore_and_set_final_windows(u32 *win, const char *ddr_type) in ddr3_restore_and_set_final_windows() argument
1118 ddr_type); in ddr3_restore_and_set_final_windows()
1212 int mv_ddr_pre_training_soc_config(const char *ddr_type) in mv_ddr_pre_training_soc_config() argument
1249 printf("%s Training Sequence - 2nd boot - Skip\n", ddr_type); in mv_ddr_pre_training_soc_config()
1322 int mv_ddr_post_training_soc_config(const char *ddr_type) in mv_ddr_post_training_soc_config() argument
1327 ddr3_restore_and_set_final_windows(win, ddr_type); in mv_ddr_post_training_soc_config()
/openbmc/linux/drivers/power/reset/
H A Dat91-poweroff.c155 u32 ddr_type; in at91_poweroff_probe() local
187 ddr_type = readl(at91_shdwc.mpddrc_base + AT91_DDRSDRC_MDR) & in at91_poweroff_probe()
189 if (ddr_type != AT91_DDRSDRC_MD_LPDDR2 && in at91_poweroff_probe()
190 ddr_type != AT91_DDRSDRC_MD_LPDDR3) { in at91_poweroff_probe()
H A Dat91-sama5d2_shdwc.c336 u32 ddr_type; in at91_shdwc_probe() local
402 ddr_type = readl(at91_shdwc->mpddrc_base + in at91_shdwc_probe()
405 if (ddr_type != AT91_DDRSDRC_MD_LPDDR2 && in at91_shdwc_probe()
406 ddr_type != AT91_DDRSDRC_MD_LPDDR3) { in at91_shdwc_probe()
/openbmc/linux/drivers/devfreq/event/
H A Drockchip-dfi.c65 u32 ddr_type; in rockchip_dfi_start_hardware_counter() local
69 ddr_type = (val >> RK3399_PMUGRF_DDRTYPE_SHIFT) & in rockchip_dfi_start_hardware_counter()
76 if (ddr_type == RK3399_PMUGRF_DDRTYPE_LPDDR3) in rockchip_dfi_start_hardware_counter()
78 else if (ddr_type == RK3399_PMUGRF_DDRTYPE_LPDDR4) in rockchip_dfi_start_hardware_counter()
/openbmc/u-boot/board/rockchip/evb_rk3036/
H A Devb_rk3036.c15 config->ddr_type = 3; in get_ddr_config()
/openbmc/u-boot/board/rockchip/kylin_rk3036/
H A Dkylin_rk3036.c16 config->ddr_type = 3; in get_ddr_config()
/openbmc/linux/drivers/devfreq/
H A Drk3399_dmc.c341 u32 ddr_type; in rk3399_dmcfreq_probe() local
384 ddr_type = (val >> RK3399_PMUGRF_DDRTYPE_SHIFT) & in rk3399_dmcfreq_probe()
387 switch (ddr_type) { in rk3399_dmcfreq_probe()
/openbmc/u-boot/drivers/ram/
H A Dmpc83xx_sdram.c317 u32 dso, pz_override, nz_override, odt_term, ddr_type, mvref_sel, m_odr; in mpc83xx_sdram_probe() local
409 ddr_type = dev_read_u32_default(dev, "ddr_type", 0); in mpc83xx_sdram_probe()
410 if (ddr_type > 1) { in mpc83xx_sdram_probe()
412 dev->name, ddr_type); in mpc83xx_sdram_probe()
434 ddr_type << (31 - 13) | in mpc83xx_sdram_probe()
/openbmc/linux/arch/arm/mach-imx/
H A Dpm-imx6.c88 u32 ddr_type; member
222 u32 ddr_type; member
559 pm_info->ddr_type = imx_mmdc_get_ddr_type(); in imx6q_suspend_init()
H A Dmmdc.c61 static int ddr_type; variable
569 ddr_type = (val & BM_MMDC_MDMISC_DDR_TYPE) >> in imx_mmdc_probe()
590 return ddr_type; in imx_mmdc_get_ddr_type()
/openbmc/u-boot/board/ccv/xpress/
H A Dspl.c61 .ddr_type = DDR_TYPE_DDR3,
/openbmc/u-boot/board/barco/platinum/
H A Dspl_picon.c137 .ddr_type = DDR_TYPE_DDR3, in spl_dram_init()
H A Dspl_titanium.c140 .ddr_type = DDR_TYPE_DDR3, in spl_dram_init()
/openbmc/u-boot/board/engicam/common/
H A Dspl.c233 .ddr_type = DDR_TYPE_DDR3,
345 .ddr_type = DDR_TYPE_DDR3,
/openbmc/u-boot/arch/x86/include/asm/
H A Dglobal_data.h23 uint16_t ddr_type; member
/openbmc/u-boot/arch/x86/include/asm/arch-quark/
H A Dmrc.h114 uint8_t ddr_type; /* DDR3, DDR3L */ member
/openbmc/u-boot/board/phytec/pcl063/
H A Dspl.c66 .ddr_type = DDR_TYPE_DDR3,
/openbmc/u-boot/board/freescale/mx6memcal/
H A Dspl.c232 .ddr_type = DDR_TYPE_DDR3,
237 .ddr_type = DDR_TYPE_LPDDR2,
/openbmc/u-boot/arch/arm/mach-imx/mx6/
H A Dlitesom.c129 .ddr_type = DDR_TYPE_DDR3,
H A Dopos6ul.c194 .ddr_type = DDR_TYPE_DDR3,
/openbmc/u-boot/Documentation/devicetree/bindings/ram/
H A Dfsl,mpc83xx-mem-controller.txt36 - ddr_type: Selects voltage level for DDR pads; possible
258 ddr_type = <DDR_TYPE_DDR2_1_8_VOLT>;
/openbmc/u-boot/board/freescale/mx6ul_14x14_evk/
H A Dmx6ul_14x14_evk.c638 .ddr_type = DDR_TYPE_LPDDR2,
678 .ddr_type = DDR_TYPE_DDR3,
/openbmc/u-boot/arch/x86/cpu/quark/
H A Ddram.c81 mrc_params->ddr_type = fdtdec_get_int(blob, node, "dram-type", 0); in mrc_configure_params()

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