Searched refs:ddr_sdram_interval (Results 1 – 17 of 17) sorted by relevance
| /openbmc/u-boot/board/freescale/corenet_ds/ |
| H A D | p4080ds_ddr.c | 96 .ddr_sdram_interval = CONFIG_SYS_DDR_INTERVAL_800,
128 .ddr_sdram_interval = CONFIG_SYS_DDR_INTERVAL_800,
160 .ddr_sdram_interval = CONFIG_SYS_DDR_INTERVAL_900,
192 .ddr_sdram_interval = CONFIG_SYS_DDR_INTERVAL_900,
224 .ddr_sdram_interval = CONFIG_SYS_DDR_INTERVAL_1000,
256 .ddr_sdram_interval = CONFIG_SYS_DDR_INTERVAL_1000,
288 .ddr_sdram_interval = CONFIG_SYS_DDR_INTERVAL_1200,
320 .ddr_sdram_interval = CONFIG_SYS_DDR_INTERVAL_1200,
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| /openbmc/u-boot/board/freescale/bsc9132qds/ |
| H A D | ddr.c | 30 .ddr_sdram_interval = CONFIG_SYS_DDR_INTERVAL_800,
57 .ddr_sdram_interval = CONFIG_SYS_DDR_INTERVAL_1333,
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| /openbmc/u-boot/board/freescale/p1010rdb/ |
| H A D | ddr.c | 33 .ddr_sdram_interval = CONFIG_SYS_DDR_INTERVAL_800,
60 .ddr_sdram_interval = CONFIG_SYS_DDR_INTERVAL_667,
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| /openbmc/u-boot/board/freescale/p1_twr/ |
| H A D | ddr.c | 39 .ddr_sdram_interval = CONFIG_SYS_DDR_INTERVAL, in fixed_sdram()
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| /openbmc/u-boot/board/freescale/ls1043ardb/ |
| H A D | ddr.h | 82 .ddr_sdram_interval = 0x18600618,
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| /openbmc/u-boot/drivers/ddr/fsl/ |
| H A D | mpc85xx_ddr_gen1.c | 48 out_be32(&ddr->sdram_interval, regs->ddr_sdram_interval); in fsl_ddr_set_memctl_regs()
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| H A D | mpc85xx_ddr_gen3.c | 127 out_be32(&ddr->sdram_interval, regs->ddr_sdram_interval); in fsl_ddr_set_memctl_regs()
213 out_be32(&ddr->sdram_interval, regs->ddr_sdram_interval & 0xffff); in fsl_ddr_set_memctl_regs()
335 out_be32(&ddr->sdram_interval, regs->ddr_sdram_interval); in fsl_ddr_set_memctl_regs()
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| H A D | mpc86xx_ddr.c | 59 out_be32(&ddr->sdram_interval, regs->ddr_sdram_interval); in fsl_ddr_set_memctl_regs()
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| H A D | mpc85xx_ddr_gen2.c | 74 out_be32(&ddr->sdram_interval, regs->ddr_sdram_interval); in fsl_ddr_set_memctl_regs()
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| H A D | fsl_ddr_gen4.c | 190 regs->ddr_sdram_interval & ~SDRAM_INTERVAL_BSTOPRE); in fsl_ddr_set_memctl_regs()
192 ddr_out32(&ddr->sdram_interval, regs->ddr_sdram_interval); in fsl_ddr_set_memctl_regs()
491 ddr_out32(&ddr->sdram_interval, regs->ddr_sdram_interval); in fsl_ddr_set_memctl_regs()
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| H A D | arm_ddr_gen3.c | 104 ddr_out32(&ddr->sdram_interval, regs->ddr_sdram_interval); in fsl_ddr_set_memctl_regs()
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| H A D | ctrl_regs.c | 1338 ddr->ddr_sdram_interval = (0 in set_ddr_sdram_interval()
1342 debug("FSLDDR: ddr_sdram_interval = 0x%08x\n", ddr->ddr_sdram_interval); in set_ddr_sdram_interval()
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| H A D | interactive.c | 653 CFG_REGS(ddr_sdram_interval), in print_fsl_memctl_config_regs()
744 CFG_REGS(ddr_sdram_interval), in fsl_ddr_regs_edit()
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| /openbmc/u-boot/board/Arcturus/ucp1020/ |
| H A D | ddr.c | 99 .ddr_sdram_interval = CONFIG_SYS_DDR_INTERVAL, in fixed_sdram()
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| /openbmc/u-boot/board/freescale/bsc9131rdb/ |
| H A D | ddr.c | 31 .ddr_sdram_interval = CONFIG_SYS_DDR_INTERVAL_800,
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| /openbmc/u-boot/board/freescale/p1_p2_rdb_pc/ |
| H A D | ddr.c | 231 .ddr_sdram_interval = CONFIG_SYS_DDR_INTERVAL, in fixed_sdram()
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| /openbmc/u-boot/include/ |
| H A D | fsl_ddr_sdram.h | 272 unsigned int ddr_sdram_interval; member
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