| /openbmc/u-boot/board/atmel/sama5d3_xplained/ |
| H A D | sama5d3_xplained.c | 133 static void ddr2_conf(struct atmel_mpddrc_config *ddr2) in ddr2_conf() argument
135 ddr2->md = (ATMEL_MPDDRC_MD_DBW_32_BITS | ATMEL_MPDDRC_MD_DDR2_SDRAM); in ddr2_conf()
137 ddr2->cr = (ATMEL_MPDDRC_CR_NC_COL_10 | in ddr2_conf()
149 ddr2->rtr = 0x411; in ddr2_conf()
151 ddr2->tpr0 = (6 << ATMEL_MPDDRC_TPR0_TRAS_OFFSET | in ddr2_conf()
160 ddr2->tpr1 = (2 << ATMEL_MPDDRC_TPR1_TXP_OFFSET | in ddr2_conf()
165 ddr2->tpr2 = (7 << ATMEL_MPDDRC_TPR2_TFAW_OFFSET | in ddr2_conf()
174 struct atmel_mpddrc_config ddr2; in mem_init() local
176 ddr2_conf(&ddr2); in mem_init()
183 ddr2_init(ATMEL_BASE_MPDDRC, ATMEL_BASE_DDRCS, &ddr2); in mem_init()
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| /openbmc/u-boot/board/laird/wb45n/ |
| H A D | wb45n.c | 146 static void ddr2_conf(struct atmel_mpddrc_config *ddr2) in ddr2_conf() argument
148 ddr2->md = (ATMEL_MPDDRC_MD_DBW_16_BITS | ATMEL_MPDDRC_MD_LPDDR_SDRAM); in ddr2_conf()
150 ddr2->cr = (ATMEL_MPDDRC_CR_NC_COL_10 | in ddr2_conf()
156 ddr2->rtr = 0x411; in ddr2_conf()
158 ddr2->tpr0 = (6 << ATMEL_MPDDRC_TPR0_TRAS_OFFSET | in ddr2_conf()
167 ddr2->tpr1 = (2 << ATMEL_MPDDRC_TPR1_TXP_OFFSET | in ddr2_conf()
172 ddr2->tpr2 = (7 << ATMEL_MPDDRC_TPR2_TFAW_OFFSET | in ddr2_conf()
182 struct atmel_mpddrc_config ddr2; in mem_init() local
185 ddr2_conf(&ddr2); in mem_init()
196 ddr2_init(ATMEL_BASE_DDRSDRC, ATMEL_BASE_CS1, &ddr2); in mem_init()
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| /openbmc/u-boot/board/atmel/at91sam9x5ek/ |
| H A D | at91sam9x5ek.c | 152 static void ddr2_conf(struct atmel_mpddrc_config *ddr2) in ddr2_conf() argument
154 ddr2->md = (ATMEL_MPDDRC_MD_DBW_16_BITS | ATMEL_MPDDRC_MD_DDR2_SDRAM); in ddr2_conf()
156 ddr2->cr = (ATMEL_MPDDRC_CR_NC_COL_10 | in ddr2_conf()
162 ddr2->rtr = 0x411; in ddr2_conf()
164 ddr2->tpr0 = (6 << ATMEL_MPDDRC_TPR0_TRAS_OFFSET | in ddr2_conf()
173 ddr2->tpr1 = (2 << ATMEL_MPDDRC_TPR1_TXP_OFFSET | in ddr2_conf()
178 ddr2->tpr2 = (7 << ATMEL_MPDDRC_TPR2_TFAW_OFFSET | in ddr2_conf()
189 struct atmel_mpddrc_config ddr2; in mem_init() local
192 ddr2_conf(&ddr2); in mem_init()
206 ddr2_init(ATMEL_BASE_DDRSDRC, ATMEL_BASE_CS1, &ddr2); in mem_init()
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| /openbmc/u-boot/board/laird/wb50n/ |
| H A D | wb50n.c | 139 static void ddr2_conf(struct atmel_mpddrc_config *ddr2) in ddr2_conf() argument
141 ddr2->md = (ATMEL_MPDDRC_MD_DBW_32_BITS | ATMEL_MPDDRC_MD_LPDDR_SDRAM); in ddr2_conf()
143 ddr2->cr = (ATMEL_MPDDRC_CR_NC_COL_9 | in ddr2_conf()
150 ddr2->rtr = 0x411; in ddr2_conf()
152 ddr2->tpr0 = (6 << ATMEL_MPDDRC_TPR0_TRAS_OFFSET | in ddr2_conf()
161 ddr2->tpr1 = (2 << ATMEL_MPDDRC_TPR1_TXP_OFFSET | in ddr2_conf()
166 ddr2->tpr2 = (7 << ATMEL_MPDDRC_TPR2_TFAW_OFFSET | in ddr2_conf()
176 struct atmel_mpddrc_config ddr2; in mem_init() local
178 ddr2_conf(&ddr2); in mem_init()
188 ddr2_init(ATMEL_BASE_MPDDRC, ATMEL_BASE_DDRCS, &ddr2); in mem_init()
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| /openbmc/u-boot/board/atmel/sama5d4_xplained/ |
| H A D | sama5d4_xplained.c | 153 static void ddr2_conf(struct atmel_mpddrc_config *ddr2) in ddr2_conf() argument
155 ddr2->md = (ATMEL_MPDDRC_MD_DBW_32_BITS | ATMEL_MPDDRC_MD_DDR2_SDRAM); in ddr2_conf()
157 ddr2->cr = (ATMEL_MPDDRC_CR_NC_COL_10 | in ddr2_conf()
165 ddr2->rtr = 0x2b0; in ddr2_conf()
167 ddr2->tpr0 = (8 << ATMEL_MPDDRC_TPR0_TRAS_OFFSET | in ddr2_conf()
176 ddr2->tpr1 = (2 << ATMEL_MPDDRC_TPR1_TXP_OFFSET | in ddr2_conf()
181 ddr2->tpr2 = (7 << ATMEL_MPDDRC_TPR2_TFAW_OFFSET | in ddr2_conf()
190 struct atmel_mpddrc_config ddr2; in mem_init() local
192 ddr2_conf(&ddr2); in mem_init()
199 ddr2_init(ATMEL_BASE_MPDDRC, ATMEL_BASE_DDRCS, &ddr2); in mem_init()
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| /openbmc/u-boot/board/atmel/sama5d4ek/ |
| H A D | sama5d4ek.c | 139 static void ddr2_conf(struct atmel_mpddrc_config *ddr2) in ddr2_conf() argument
141 ddr2->md = (ATMEL_MPDDRC_MD_DBW_32_BITS | ATMEL_MPDDRC_MD_DDR2_SDRAM); in ddr2_conf()
143 ddr2->cr = (ATMEL_MPDDRC_CR_NC_COL_10 | in ddr2_conf()
150 ddr2->rtr = 0x2b0; in ddr2_conf()
152 ddr2->tpr0 = (8 << ATMEL_MPDDRC_TPR0_TRAS_OFFSET | in ddr2_conf()
161 ddr2->tpr1 = (2 << ATMEL_MPDDRC_TPR1_TXP_OFFSET | in ddr2_conf()
166 ddr2->tpr2 = (7 << ATMEL_MPDDRC_TPR2_TFAW_OFFSET | in ddr2_conf()
175 struct atmel_mpddrc_config ddr2; in mem_init() local
179 ddr2_conf(&ddr2); in mem_init()
199 ddr2_init(ATMEL_BASE_MPDDRC, ATMEL_BASE_DDRCS, &ddr2); in mem_init()
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| /openbmc/u-boot/board/mini-box/picosam9g45/ |
| H A D | picosam9g45.c | 49 static void ddr2_conf(struct atmel_mpddrc_config *ddr2) in ddr2_conf() argument
51 ddr2->md = (ATMEL_MPDDRC_MD_DBW_16_BITS | ATMEL_MPDDRC_MD_DDR2_SDRAM); in ddr2_conf()
53 ddr2->cr = (ATMEL_MPDDRC_CR_NC_COL_10 | in ddr2_conf()
58 ddr2->rtr = 0x24b; in ddr2_conf()
60 ddr2->tpr0 = (6 << ATMEL_MPDDRC_TPR0_TRAS_OFFSET |/* 6*7.5 = 45 ns */ in ddr2_conf()
69 ddr2->tpr1 = (2 << ATMEL_MPDDRC_TPR1_TXP_OFFSET | /* 2*7.5 = 15 ns */ in ddr2_conf()
74 ddr2->tpr2 = (1 << ATMEL_MPDDRC_TPR2_TRTP_OFFSET | in ddr2_conf()
83 struct atmel_mpddrc_config ddr2; in mem_init() local
86 ddr2_conf(&ddr2); in mem_init()
97 ddr2_init(ATMEL_BASE_DDRSDRC0, ATMEL_BASE_CS6, &ddr2); in mem_init()
[all …]
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| /openbmc/u-boot/board/siemens/corvus/ |
| H A D | board.c | 136 static void ddr2_conf(struct atmel_mpddrc_config *ddr2) in ddr2_conf() argument
138 ddr2->md = (ATMEL_MPDDRC_MD_DBW_16_BITS | ATMEL_MPDDRC_MD_DDR2_SDRAM); in ddr2_conf()
140 ddr2->cr = (ATMEL_MPDDRC_CR_NC_COL_10 | in ddr2_conf()
145 ddr2->rtr = 0x24b; in ddr2_conf()
147 ddr2->tpr0 = (6 << ATMEL_MPDDRC_TPR0_TRAS_OFFSET |/* 6*7.5 = 45 ns */ in ddr2_conf()
156 ddr2->tpr1 = (2 << ATMEL_MPDDRC_TPR1_TXP_OFFSET | /* 2*7.5 = 15 ns */ in ddr2_conf()
161 ddr2->tpr2 = (1 << ATMEL_MPDDRC_TPR2_TRTP_OFFSET | in ddr2_conf()
169 struct atmel_mpddrc_config ddr2; in mem_init() local
171 ddr2_conf(&ddr2); in mem_init()
176 ddr2_init(ATMEL_BASE_DDRSDRC0, ATMEL_BASE_CS6, &ddr2); in mem_init()
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| /openbmc/u-boot/board/atmel/at91sam9n12ek/ |
| H A D | at91sam9n12ek.c | 236 static void ddr2_conf(struct atmel_mpddrc_config *ddr2) in ddr2_conf() argument
238 ddr2->md = (ATMEL_MPDDRC_MD_DBW_16_BITS | ATMEL_MPDDRC_MD_DDR2_SDRAM); in ddr2_conf()
240 ddr2->cr = (ATMEL_MPDDRC_CR_NC_COL_10 | in ddr2_conf()
246 ddr2->rtr = 0x411; in ddr2_conf()
248 ddr2->tpr0 = (6 << ATMEL_MPDDRC_TPR0_TRAS_OFFSET | in ddr2_conf()
257 ddr2->tpr1 = (2 << ATMEL_MPDDRC_TPR1_TXP_OFFSET | in ddr2_conf()
262 ddr2->tpr2 = (2 << ATMEL_MPDDRC_TPR2_TRTP_OFFSET | in ddr2_conf()
272 struct atmel_mpddrc_config ddr2; in mem_init() local
275 ddr2_conf(&ddr2); in mem_init()
289 ddr2_init(ATMEL_BASE_DDRSDRC, ATMEL_BASE_CS1, &ddr2); in mem_init()
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| /openbmc/u-boot/board/atmel/at91sam9m10g45ek/ |
| H A D | at91sam9m10g45ek.c | 94 static void ddr2_conf(struct atmel_mpddrc_config *ddr2) in ddr2_conf() argument
96 ddr2->md = (ATMEL_MPDDRC_MD_DBW_16_BITS | ATMEL_MPDDRC_MD_DDR2_SDRAM); in ddr2_conf()
98 ddr2->cr = (ATMEL_MPDDRC_CR_NC_COL_10 | in ddr2_conf()
103 ddr2->rtr = 0x24b; in ddr2_conf()
105 ddr2->tpr0 = (6 << ATMEL_MPDDRC_TPR0_TRAS_OFFSET |/* 6*7.5 = 45 ns */ in ddr2_conf()
114 ddr2->tpr1 = (2 << ATMEL_MPDDRC_TPR1_TXP_OFFSET | /* 2*7.5 = 15 ns */ in ddr2_conf()
119 ddr2->tpr2 = (1 << ATMEL_MPDDRC_TPR2_TRTP_OFFSET | in ddr2_conf()
127 struct atmel_mpddrc_config ddr2; in mem_init() local
129 ddr2_conf(&ddr2); in mem_init()
134 ddr2_init(ATMEL_BASE_DDRSDRC0, ATMEL_BASE_CS6, &ddr2); in mem_init()
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| /openbmc/u-boot/board/atmel/sama5d3xek/ |
| H A D | sama5d3xek.c | 207 static void ddr2_conf(struct atmel_mpddrc_config *ddr2) in ddr2_conf() argument
209 ddr2->md = (ATMEL_MPDDRC_MD_DBW_32_BITS | ATMEL_MPDDRC_MD_DDR2_SDRAM); in ddr2_conf()
211 ddr2->cr = (ATMEL_MPDDRC_CR_NC_COL_10 | in ddr2_conf()
223 ddr2->rtr = 0x411; in ddr2_conf()
225 ddr2->tpr0 = (6 << ATMEL_MPDDRC_TPR0_TRAS_OFFSET | in ddr2_conf()
234 ddr2->tpr1 = (2 << ATMEL_MPDDRC_TPR1_TXP_OFFSET | in ddr2_conf()
239 ddr2->tpr2 = (7 << ATMEL_MPDDRC_TPR2_TFAW_OFFSET | in ddr2_conf()
248 struct atmel_mpddrc_config ddr2; in mem_init() local
250 ddr2_conf(&ddr2); in mem_init()
257 ddr2_init(ATMEL_BASE_MPDDRC, ATMEL_BASE_DDRCS, &ddr2); in mem_init()
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| /openbmc/u-boot/drivers/ddr/microchip/ |
| H A D | Makefile | 4 obj-$(CONFIG_MACH_PIC32) += ddr2.o
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| /openbmc/linux/drivers/clk/ralink/ |
| H A D | clk-mtmips.c | 489 u32 ddr2; in rt3883_bus_recalc_rate() local
493 ddr2 = t & RT3883_SYSCFG0_DRAM_TYPE_DDR2; in rt3883_bus_recalc_rate()
497 return (ddr2) ? 125000000 : 83000000; in rt3883_bus_recalc_rate()
499 return (ddr2) ? 128000000 : 96000000; in rt3883_bus_recalc_rate()
501 return (ddr2) ? 160000000 : 120000000; in rt3883_bus_recalc_rate()
503 return (ddr2) ? 166000000 : 125000000; in rt3883_bus_recalc_rate()
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| /openbmc/linux/arch/powerpc/boot/dts/fsl/ |
| H A D | b4860si-post.dtsi | 78 dev-handle = <&ddr2>;
238 ddr2: memory-controller@9000 { label
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| H A D | p5040si-post.dtsi | 180 dev-handle = <&ddr2>;
240 ddr2: memory-controller@9000 { label
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| H A D | p5020si-post.dtsi | 235 dev-handle = <&ddr2>;
285 ddr2: memory-controller@9000 { label
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| H A D | p4080si-post.dtsi | 207 dev-handle = <&ddr2>;
288 ddr2: memory-controller@9000 { label
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| H A D | t4240si-post.dtsi | 222 dev-handle = <&ddr2>;
900 ddr2: memory-controller@9000 { label
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| /openbmc/linux/arch/powerpc/boot/dts/ |
| H A D | haleakala.dts | 92 compatible = "ibm,sdram-405exr", "ibm,sdram-4xx-ddr2";
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| H A D | obs600.dts | 106 compatible = "ibm,sdram-405ex", "ibm,sdram-4xx-ddr2";
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| H A D | makalu.dts | 93 compatible = "ibm,sdram-405ex", "ibm,sdram-4xx-ddr2";
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| H A D | kilauea.dts | 102 compatible = "ibm,sdram-405ex", "ibm,sdram-4xx-ddr2";
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| /openbmc/linux/arch/mips/include/asm/octeon/ |
| H A D | cvmx-lmcx-defs.h | 1300 uint64_t ddr2:1; member
1302 uint64_t ddr2:1;
1341 uint64_t ddr2:1; member
1343 uint64_t ddr2:1;
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| /openbmc/linux/arch/arm64/boot/dts/freescale/ |
| H A D | fsl-ls208xa.dtsi | 1247 ddr2: memory-controller@1090000 { label
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| H A D | fsl-lx2160a.dtsi | 436 ddr2: memory-controller@1090000 { label
|