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Searched refs:ctrl_base (Results 1 – 25 of 49) sorted by relevance

12

/openbmc/linux/arch/arm/mach-hisi/
H A Dhotplug.c72 static void __iomem *ctrl_base; variable
83 ctrl_base + SCPERPWREN); in set_cpu_hi3620()
87 writel_relaxed(0x01 << cpu, ctrl_base + SCCPUCOREEN); in set_cpu_hi3620()
92 writel_relaxed(val << cpu, ctrl_base + SCCPURSTDIS); in set_cpu_hi3620()
95 writel_relaxed(val << cpu, ctrl_base + SCCPURSTEN); in set_cpu_hi3620()
100 ctrl_base + SCISODIS); in set_cpu_hi3620()
104 val = readl_relaxed(ctrl_base + SCPERCTRL0); in set_cpu_hi3620()
106 writel_relaxed(val, ctrl_base + SCPERCTRL0); in set_cpu_hi3620()
111 writel_relaxed(val << cpu, ctrl_base + SCCPURSTDIS); in set_cpu_hi3620()
114 val = readl_relaxed(ctrl_base + SCPERCTRL0); in set_cpu_hi3620()
[all …]
H A Dplatsmp.c21 static void __iomem *ctrl_base; variable
26 if (!cpu || !ctrl_base) in hi3xxx_set_cpu_jump()
28 writel_relaxed(__pa_symbol(jump_addr), ctrl_base + ((cpu - 1) << 2)); in hi3xxx_set_cpu_jump()
34 if (!cpu || !ctrl_base) in hi3xxx_get_cpu_jump()
36 return readl_relaxed(ctrl_base + ((cpu - 1) << 2)); in hi3xxx_get_cpu_jump()
62 if (!ctrl_base) { in hi3xxx_smp_prepare_cpus()
68 ctrl_base = of_iomap(np, 0); in hi3xxx_smp_prepare_cpus()
69 if (!ctrl_base) { in hi3xxx_smp_prepare_cpus()
79 ctrl_base += offset; in hi3xxx_smp_prepare_cpus()
165 ctrl_base = of_iomap(node, 0); in hip01_boot_secondary()
[all …]
/openbmc/linux/drivers/phy/broadcom/
H A Dphy-brcm-usb-init.c467 static u32 brcmusb_usb_mdio_read(void __iomem *ctrl_base, u32 reg, int mode) in brcmusb_usb_mdio_read() argument
472 brcm_usb_writel(data, USB_CTRL_REG(ctrl_base, MDIO)); in brcmusb_usb_mdio_read()
474 brcm_usb_writel(data, USB_CTRL_REG(ctrl_base, MDIO)); in brcmusb_usb_mdio_read()
478 brcm_usb_writel(data, USB_CTRL_REG(ctrl_base, MDIO)); in brcmusb_usb_mdio_read()
482 return brcm_usb_readl(USB_CTRL_REG(ctrl_base, MDIO2)) & 0xffff; in brcmusb_usb_mdio_read()
485 static void brcmusb_usb_mdio_write(void __iomem *ctrl_base, u32 reg, in brcmusb_usb_mdio_write() argument
491 brcm_usb_writel(data, USB_CTRL_REG(ctrl_base, MDIO)); in brcmusb_usb_mdio_write()
493 brcm_usb_writel(data, USB_CTRL_REG(ctrl_base, MDIO)); in brcmusb_usb_mdio_write()
498 brcm_usb_writel(data, USB_CTRL_REG(ctrl_base, MDIO)); in brcmusb_usb_mdio_write()
503 static void brcmusb_usb_phy_ldo_fix(void __iomem *ctrl_base) in brcmusb_usb_phy_ldo_fix() argument
[all …]
/openbmc/u-boot/drivers/misc/
H A Daspeed-fsi.c88 static const u32 ctrl_base = 0x80000000; variable
258 opb_read(aspeed, ctrl_base + FSI_MRESP0, 4, &mresp0); in check_errors()
259 opb_read(aspeed, ctrl_base + FSI_MSTAP0, 4, &mstap0); in check_errors()
260 opb_read(aspeed, ctrl_base + FSI_MESRB0, 4, &mesrb0); in check_errors()
272 ret = opb_write(aspeed, ctrl_base + 0xd0, in check_errors()
328 result = opb_write(aspeed, ctrl_base + FSI_MSENP0 + (4 * idx), in aspeed_fsi_link_enable()
333 ret = opb_read(aspeed, ctrl_base + FSI_MENP0 + (4 * idx), in aspeed_fsi_link_enable()
370 opb_read(aspeed, ctrl_base + FSI_MMODE, 4, &mmode); in aspeed_fsi_status()
371 opb_read(aspeed, ctrl_base + FSI_MRESP0, 4, &mresp0); in aspeed_fsi_status()
372 opb_read(aspeed, ctrl_base + FSI_MSTAP0, 4, &mstap0); in aspeed_fsi_status()
[all …]
H A Daspeed_dp.c38 void *ctrl_base; member
88 dp->ctrl_base = (void *)devfdt_get_addr_index(dev, 0); in aspeed_dp_probe()
114 writel(readl(dp->ctrl_base + 0xB8) & ~(BIT(24) | BIT(28)), dp->ctrl_base + 0xB8); in aspeed_dp_probe()
160 dp->ctrl_base = (void *)devfdt_get_addr_index(dev, 0); in dp_aspeed_ofdata_to_platdata()
/openbmc/u-boot/board/compulab/common/
H A Domap3_smc911x.c32 struct ctrl *ctrl_base = (struct ctrl *)OMAP34XX_CTRL_BASE; in cl_omap3_smc911x_setup_net_chip_gmpc() local
38 writew(readw(&ctrl_base->gpmc_nwe) | 0x0E00, &ctrl_base->gpmc_nwe); in cl_omap3_smc911x_setup_net_chip_gmpc()
41 writew(readw(&ctrl_base->gpmc_noe) | 0x0E00, &ctrl_base->gpmc_noe); in cl_omap3_smc911x_setup_net_chip_gmpc()
44 writew(readw(&ctrl_base->gpmc_nadv_ale) | 0x0E00, in cl_omap3_smc911x_setup_net_chip_gmpc()
45 &ctrl_base->gpmc_nadv_ale); in cl_omap3_smc911x_setup_net_chip_gmpc()
/openbmc/u-boot/drivers/pci/
H A Dpcie_dw_mvebu.c109 void *ctrl_base; member
146 pcie->ctrl_base + PCIE_ATU_VIEWPORT); in pcie_dw_prog_outbound_atu()
147 writel(lower_32_bits(cpu_addr), pcie->ctrl_base + PCIE_ATU_LOWER_BASE); in pcie_dw_prog_outbound_atu()
148 writel(upper_32_bits(cpu_addr), pcie->ctrl_base + PCIE_ATU_UPPER_BASE); in pcie_dw_prog_outbound_atu()
150 pcie->ctrl_base + PCIE_ATU_LIMIT); in pcie_dw_prog_outbound_atu()
152 pcie->ctrl_base + PCIE_ATU_LOWER_TARGET); in pcie_dw_prog_outbound_atu()
154 pcie->ctrl_base + PCIE_ATU_UPPER_TARGET); in pcie_dw_prog_outbound_atu()
155 writel(type, pcie->ctrl_base + PCIE_ATU_CR1); in pcie_dw_prog_outbound_atu()
156 writel(PCIE_ATU_ENABLE, pcie->ctrl_base + PCIE_ATU_CR2); in pcie_dw_prog_outbound_atu()
194 va_address = (uintptr_t)pcie->ctrl_base; in set_cfg_address()
[all …]
/openbmc/linux/arch/arm/mach-omap2/
H A Domap_phy_internal.c35 void __iomem *ctrl_base; in omap4430_phy_power_down() local
40 ctrl_base = ioremap(OMAP443X_SCM_BASE, SZ_1K); in omap4430_phy_power_down()
41 if (!ctrl_base) { in omap4430_phy_power_down()
47 writel_relaxed(PHY_PD, ctrl_base + CONTROL_DEV_CONF); in omap4430_phy_power_down()
49 iounmap(ctrl_base); in omap4430_phy_power_down()
/openbmc/linux/drivers/fsi/
H A Dfsi-master-aspeed.c34 static const u32 ctrl_base = 0x80000000; variable
228 opb_readl(aspeed, ctrl_base + FSI_MRESP0, &mresp0); in check_errors()
229 opb_readl(aspeed, ctrl_base + FSI_MSTAP0, &mstap0); in check_errors()
230 opb_readl(aspeed, ctrl_base + FSI_MESRB0, &mesrb0); in check_errors()
242 ret = opb_writel(aspeed, ctrl_base + FSI_MRESP0, in check_errors()
340 ret = opb_writel(aspeed, ctrl_base + FSI_MCENP0 + (4 * idx), reg); in aspeed_master_link_enable()
344 ret = opb_writel(aspeed, ctrl_base + FSI_MSENP0 + (4 * idx), reg); in aspeed_master_link_enable()
401 opb_writel(aspeed, ctrl_base + FSI_MRESP0, reg); in aspeed_master_init()
406 opb_writel(aspeed, ctrl_base + FSI_MRESP0, reg); in aspeed_master_init()
409 opb_writel(aspeed, ctrl_base + FSI_MECTRL, reg); in aspeed_master_init()
[all …]
/openbmc/linux/drivers/video/fbdev/riva/
H A Dnv_driver.c319 (volatile U032 __iomem *)(par->ctrl_base + 0x00680000); in riva_common_setup()
321 (volatile U032 __iomem *)(par->ctrl_base + 0x00100000); in riva_common_setup()
323 (volatile U032 __iomem *)(par->ctrl_base + 0x00002000); in riva_common_setup()
325 (volatile U032 __iomem *)(par->ctrl_base + 0x00400000); in riva_common_setup()
327 (volatile U032 __iomem *)(par->ctrl_base + 0x00101000); in riva_common_setup()
329 (volatile U032 __iomem *)(par->ctrl_base + 0x00009000); in riva_common_setup()
331 (volatile U032 __iomem *)(par->ctrl_base + 0x00000000); in riva_common_setup()
333 (volatile U032 __iomem *)(par->ctrl_base + 0x00800000); in riva_common_setup()
334 par->riva.PCIO0 = par->ctrl_base + 0x00601000; in riva_common_setup()
335 par->riva.PDIO0 = par->ctrl_base + 0x00681000; in riva_common_setup()
[all …]
/openbmc/u-boot/board/isee/igep00x0/
H A Digep00x0.c106 struct ctrl *ctrl_base = (struct ctrl *)OMAP34XX_CTRL_BASE; in setup_net_chip() local
120 writew(readw(&ctrl_base->gpmc_nwe) | 0x0E00, &ctrl_base->gpmc_nwe); in setup_net_chip()
122 writew(readw(&ctrl_base->gpmc_noe) | 0x0E00, &ctrl_base->gpmc_noe); in setup_net_chip()
124 writew(readw(&ctrl_base->gpmc_nadv_ale) | 0x0E00, in setup_net_chip()
125 &ctrl_base->gpmc_nadv_ale); in setup_net_chip()
/openbmc/u-boot/board/ti/evm/
H A Devm.c236 struct ctrl *ctrl_base = (struct ctrl *)OMAP34XX_CTRL_BASE; in setup_net_chip() local
248 writew(readw(&ctrl_base ->gpmc_nwe) | 0x0E00, &ctrl_base->gpmc_nwe); in setup_net_chip()
250 writew(readw(&ctrl_base->gpmc_noe) | 0x0E00, &ctrl_base->gpmc_noe); in setup_net_chip()
252 writew(readw(&ctrl_base->gpmc_nadv_ale) | 0x0E00, in setup_net_chip()
253 &ctrl_base->gpmc_nadv_ale); in setup_net_chip()
/openbmc/linux/arch/mips/pci/
H A Dpci-ar724x.c41 void __iomem *ctrl_base; member
60 reset = __raw_readl(apc->ctrl_base + AR724X_PCI_REG_RESET); in ar724x_pci_check_link()
236 base = apc->ctrl_base; in ar724x_pci_irq_handler()
256 base = apc->ctrl_base; in ar724x_pci_irq_unmask()
277 base = apc->ctrl_base; in ar724x_pci_irq_mask()
311 base = apc->ctrl_base; in ar724x_pci_irq_init()
349 app = __raw_readl(apc->ctrl_base + AR724X_PCI_REG_APP); in ar724x_pci_hw_init()
351 __raw_writel(app, apc->ctrl_base + AR724X_PCI_REG_APP); in ar724x_pci_hw_init()
375 apc->ctrl_base = devm_platform_ioremap_resource_byname(pdev, "ctrl_base"); in ar724x_pci_probe()
376 if (IS_ERR(apc->ctrl_base)) in ar724x_pci_probe()
[all …]
/openbmc/linux/drivers/media/platform/verisilicon/
H A Dimx8m_vpu_hw.c33 val = readl(vpu->ctrl_base + CTRL_SOFT_RESET); in imx8m_soft_reset()
35 writel(val, vpu->ctrl_base + CTRL_SOFT_RESET); in imx8m_soft_reset()
40 val = readl(vpu->ctrl_base + CTRL_SOFT_RESET); in imx8m_soft_reset()
42 writel(val, vpu->ctrl_base + CTRL_SOFT_RESET); in imx8m_soft_reset()
49 val = readl(vpu->ctrl_base + CTRL_CLOCK_ENABLE); in imx8m_clk_enable()
51 writel(val, vpu->ctrl_base + CTRL_CLOCK_ENABLE); in imx8m_clk_enable()
68 writel(0xffffffff, vpu->ctrl_base + CTRL_G1_DEC_FUSE); in imx8mq_runtime_resume()
69 writel(0xffffffff, vpu->ctrl_base + CTRL_G1_PP_FUSE); in imx8mq_runtime_resume()
70 writel(0xffffffff, vpu->ctrl_base + CTRL_G2_DEC_FUSE); in imx8mq_runtime_resume()
257 vpu->ctrl_base = vpu->reg_bases[vpu->variant->num_regs - 1]; in imx8mq_vpu_hw_init()
/openbmc/u-boot/board/overo/
H A Dovero.c315 struct ctrl *ctrl_base = (struct ctrl *)OMAP34XX_CTRL_BASE; in setup_net_chip() local
318 writew(readw(&ctrl_base ->gpmc_nwe) | 0x0E00, &ctrl_base->gpmc_nwe); in setup_net_chip()
320 writew(readw(&ctrl_base->gpmc_noe) | 0x0E00, &ctrl_base->gpmc_noe); in setup_net_chip()
322 writew(readw(&ctrl_base->gpmc_nadv_ale) | 0x0E00, in setup_net_chip()
323 &ctrl_base->gpmc_nadv_ale); in setup_net_chip()
/openbmc/linux/drivers/mailbox/
H A Dmailbox-mpfs.c66 void __iomem *ctrl_base; member
78 status = readl_relaxed(mbox->ctrl_base + SERVICES_SR_OFFSET); in mpfs_mbox_busy()
98 val = readl_relaxed(mbox->ctrl_base + SERVICES_SR_OFFSET); in mpfs_mbox_last_tx_done()
146 writel_relaxed(tx_trigger, mbox->ctrl_base + SERVICES_CR_OFFSET); in mpfs_mbox_send_data()
234 mbox->ctrl_base = devm_platform_get_and_ioremap_resource(pdev, 0, &regs); in mpfs_mbox_probe()
235 if (IS_ERR(mbox->ctrl_base)) in mpfs_mbox_probe()
236 return PTR_ERR(mbox->ctrl_base); in mpfs_mbox_probe()
244 mbox->mbox_base = mbox->ctrl_base + MAILBOX_REG_OFFSET; in mpfs_mbox_probe()
/openbmc/linux/arch/arm/mm/
H A Dcache-uniphier.c75 void __iomem *ctrl_base; member
226 writel_relaxed(val, data->ctrl_base + UNIPHIER_SSCC); in __uniphier_cache_enable()
376 data->ctrl_base = of_iomap(np, 0); in __uniphier_cache_init()
377 if (!data->ctrl_base) { in __uniphier_cache_init()
397 data->way_ctrl_base = data->ctrl_base + 0xc00; in __uniphier_cache_init()
414 data->way_ctrl_base = data->ctrl_base + 0x870; in __uniphier_cache_init()
418 data->way_ctrl_base = data->ctrl_base + 0x840; in __uniphier_cache_init()
447 iounmap(data->ctrl_base); in __uniphier_cache_init()
/openbmc/qemu/hw/arm/
H A Dbcm2838.c85 sysbus_mmio_map(SYS_BUS_DEVICE(&s_base->control), 0, bc_base->ctrl_base); in bcm2838_realize()
132 bc_base->ctrl_base + BCM2838_GIC_BASE + GIC_DIST_OFS); in bcm2838_realize()
134 bc_base->ctrl_base + BCM2838_GIC_BASE + GIC_CPU_OFS); in bcm2838_realize()
136 bc_base->ctrl_base + BCM2838_GIC_BASE + GIC_VIFACE_THIS_OFS); in bcm2838_realize()
138 bc_base->ctrl_base + BCM2838_GIC_BASE + GIC_VCPU_OFS); in bcm2838_realize()
142 bc_base->ctrl_base + BCM2838_GIC_BASE in bcm2838_realize()
244 bc_base->ctrl_base = 0xff800000; in bcm2838_class_init()
H A Dbcm2836.c39 if (bc->ctrl_base) { in bcm283x_base_init()
124 sysbus_mmio_map(SYS_BUS_DEVICE(&s_base->control), 0, bc->ctrl_base); in bcm2836_realize()
193 bc->ctrl_base = 0x40000000; in bcm2836_class_init()
207 bc->ctrl_base = 0x40000000; in bcm2837_class_init()
/openbmc/linux/drivers/leds/
H A Dleds-sc27xx-bltc.c90 u32 ctrl_base = leds->priv->base + SC27XX_LEDS_CTRL; in sc27xx_led_enable() local
102 return regmap_update_bits(regmap, ctrl_base, in sc27xx_led_enable()
110 u32 ctrl_base = leds->priv->base + SC27XX_LEDS_CTRL; in sc27xx_led_disable() local
113 return regmap_update_bits(regmap, ctrl_base, in sc27xx_led_disable()
151 u32 ctrl_base = leds->priv->base + SC27XX_LEDS_CTRL; in sc27xx_led_pattern_clear() local
161 err = regmap_update_bits(regmap, ctrl_base, in sc27xx_led_pattern_clear()
177 u32 ctrl_base = leds->priv->base + SC27XX_LEDS_CTRL; in sc27xx_led_pattern_set() local
229 err = regmap_update_bits(regmap, ctrl_base, in sc27xx_led_pattern_set()
/openbmc/linux/drivers/usb/musb/
H A Dmusb_dsps.c172 void __iomem *reg_base = musb->ctrl_base; in dsps_musb_enable()
198 void __iomem *reg_base = musb->ctrl_base; in dsps_musb_disable()
268 musb_writel(musb->ctrl_base, wrp->coreintr_set, in dsps_check_status()
310 musb_writel(musb->ctrl_base, wrp->epintr_status, epintr); in dsps_musb_clear_ep_rxintr()
316 void __iomem *reg_base = musb->ctrl_base; in dsps_interrupt()
418 glue->regset.base = musb->ctrl_base; in dsps_musb_dbg_init()
439 musb->ctrl_base = reg_base; in dsps_musb_init()
476 musb_writel(musb->ctrl_base, wrp->phy_utmi, val); in dsps_musb_init()
514 void __iomem *ctrl_base = musb->ctrl_base; in dsps_musb_set_mode() local
517 reg = musb_readl(ctrl_base, wrp->mode); in dsps_musb_set_mode()
[all …]
H A Dtusb6010.c51 void __iomem *tbase = musb->ctrl_base; in tusb_get_revision()
68 void __iomem *tbase = musb->ctrl_base; in tusb_print_revision()
101 void __iomem *tbase = musb->ctrl_base; in tusb_wbus_quirk()
333 void __iomem *tbase = musb->ctrl_base; in tusb_draw_power()
369 void __iomem *tbase = musb->ctrl_base; in tusb_set_clock_source()
396 void __iomem *tbase = musb->ctrl_base; in tusb_allow_idle()
433 void __iomem *tbase = musb->ctrl_base; in tusb_musb_vbus_status()
558 void __iomem *tbase = musb->ctrl_base; in tusb_musb_set_vbus()
635 void __iomem *tbase = musb->ctrl_base; in tusb_musb_set_mode()
827 void __iomem *tbase = musb->ctrl_base; in tusb_musb_interrupt()
[all …]
/openbmc/linux/sound/pci/
H A Dsis7019.c83 void __iomem *ctrl_base; member
193 void __iomem *base = voice->ctrl_base; in sis_update_sso()
505 void __iomem *ctrl_base = voice->ctrl_base; in sis_pcm_playback_prepare() local
546 writel(format, ctrl_base + SIS_PLAY_DMA_FORMAT_CSO); in sis_pcm_playback_prepare()
547 writel(dma_addr, ctrl_base + SIS_PLAY_DMA_BASE); in sis_pcm_playback_prepare()
548 writel(control, ctrl_base + SIS_PLAY_DMA_CONTROL); in sis_pcm_playback_prepare()
549 writel(sso_eso, ctrl_base + SIS_PLAY_DMA_SSO_ESO); in sis_pcm_playback_prepare()
562 readl(ctrl_base); in sis_pcm_playback_prepare()
642 cso = readl(voice->ctrl_base + SIS_PLAY_DMA_FORMAT_CSO); in sis_pcm_pointer()
703 void __iomem *play_base = timing->ctrl_base; in sis_prepare_timing_voice()
[all …]
/openbmc/u-boot/arch/arm/mach-omap2/omap3/
H A Dsys_info.c25 static struct ctrl *ctrl_base = (struct ctrl *)OMAP34XX_CTRL_BASE; variable
60 return readl(&ctrl_base->ctrl_omap_stat); in get_cpu_type()
236 return (readl(&ctrl_base->status) & SYSBOOT_MASK); in get_boot_type()
H A Dboot.c47 struct ctrl *ctrl_base = (struct ctrl *)OMAP34XX_CTRL_BASE; in omap_sys_boot_device() local
51 sys_boot = readl(&ctrl_base->status) & ((1 << 5) - 1); in omap_sys_boot_device()

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