Revision tags: v00.04.15, v00.04.14, v00.04.13, v00.04.12, v00.04.11, v00.04.10, v00.04.09, v00.04.08, v00.04.07, v00.04.06, v00.04.05, v00.04.04, v00.04.03, v00.04.02, v00.04.01, v00.04.00, v2021.04, v00.03.03, v2021.01, v2020.10, v2020.07, v00.02.13, v2020.04, v2020.01, v2019.10, v00.02.05, v00.02.04, v00.02.03, v00.02.02, v00.02.01, v2019.07, v00.02.00, v2019.04 |
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f4992977 |
| 11-Feb-2019 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-marvell
- Fix BUILD_TARGET for ARCH_MVEBU from Baruch - Fix MVEBU PCIe reset issues from Baruch - Increase DDR stability on x530 from Chris
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6664a0e5 |
| 03-Feb-2019 |
Baruch Siach <baruch@tkos.co.il> |
pcie: designware: mvebu: fix reset release polarity
The dm_gpio_set_value() routine sets signal logical level, with GPIO_ACTIVE_LOW/HIGH value taken into account. Reset active value is 1 (asserted),
pcie: designware: mvebu: fix reset release polarity
The dm_gpio_set_value() routine sets signal logical level, with GPIO_ACTIVE_LOW/HIGH value taken into account. Reset active value is 1 (asserted), while reset inactive value is 0 (de-asserted). Fix the reset toggle code to set the correct reset logic value.
Reported-by: Sven Auhagen <sven.auhagen@voleatech.de> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
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Revision tags: v2018.07 |
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83d290c5 |
| 06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So
SPDX: Convert all of our single license tags to Linux Kernel style
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us.
In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style.
This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one.
Signed-off-by: Tom Rini <trini@konsulko.com>
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f3b623fa |
| 30-Mar-2018 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-marvell
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Revision tags: v2018.03 |
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b8478fcd |
| 14-Feb-2018 |
Igal Liberman <igall@marvell.com> |
dm: pcie: designware: add correct ATU handling
Currently, ATU (address translation unit) implementation doesn't support translate addresses > 32 bits.
This patch allows to configure ATU correctly f
dm: pcie: designware: add correct ATU handling
Currently, ATU (address translation unit) implementation doesn't support translate addresses > 32 bits.
This patch allows to configure ATU correctly for different memory accesses (memory, configuration and IO). The same approach is used in Linux Kernel.
Signed-off-by: Igal Liberman <igall@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
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Revision tags: v2018.01, v2017.11 |
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3977dcd5 |
| 19-Oct-2017 |
Minghuan Lian <Minghuan.Lian@nxp.com> |
dm: pci: change bus number register setting compliant with Linux
This patch is to change U-Boot PCI bus assignement compliant with Linux. It means each PCIe controller's bus number is 0, not the cur
dm: pci: change bus number register setting compliant with Linux
This patch is to change U-Boot PCI bus assignement compliant with Linux. It means each PCIe controller's bus number is 0, not the current maximum PCI bus number, when start to scan this controller.
Signed-off-by: Minghuan Lian <Minghuan.Lian@nxp.com> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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a821c4af |
| 17-May-2017 |
Simon Glass <sjg@chromium.org> |
dm: Rename dev_addr..() functions
These support the flat device tree. We want to use the dev_read_..() prefix for functions that support both flat tree and live tree. So rename the existing function
dm: Rename dev_addr..() functions
These support the flat device tree. We want to use the dev_read_..() prefix for functions that support both flat tree and live tree. So rename the existing functions to avoid confusion.
In the end we will have:
1. dev_read_addr...() - works on devices, supports flat/live tree 2. devfdt_get_addr...() - current functions, flat tree only 3. of_get_address() etc. - new functions, live tree only
All drivers will be written to use 1. That function will in turn call either 2 or 3 depending on whether the flat or live tree is in use.
Note this involves changing some dead code - the imx_lpi2c.c file.
Signed-off-by: Simon Glass <sjg@chromium.org>
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a2842129 |
| 09-May-2017 |
Tom Rini <trini@konsulko.com> |
Merge git://www.denx.de/git/u-boot-marvell
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3f75e0ce |
| 28-Mar-2017 |
Konstantin Porotchkin <kostap@marvell.com> |
fix: mvebu: pcie_dw: Allow probing empty PCIe slots
This patch allows probing all PCIe nodes defined in DTS even if there no device connected to such node (no link). Without this fix the driver retu
fix: mvebu: pcie_dw: Allow probing empty PCIe slots
This patch allows probing all PCIe nodes defined in DTS even if there no device connected to such node (no link). Without this fix the driver returns -ENODEV when the PCIe link is down. As result the pci_init function stops scanning bus on first empty PCIe slot and all devices located in higher numbered buses are not discovered.
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Cc: Stefan Roese <sr@denx.de> Cc: Igal Liberman <igall@marvell.com> Cc: Nadav Haklai <nadavh@marvell.com> Reviewed-by: Stefan Roese <sr@denx.de>
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6cc102be |
| 08-Feb-2017 |
Konstantin Porotchkin <kostap@marvell.com> |
mvebu: pcie: Add support for GPIO reset for PCIe device
Add support for "marvell,reset-gpio" property to mvebu DW PCIe driver. This option is valid when CONFIG_DM_GPIO=y
Change-Id: Ic17c500449050c2
mvebu: pcie: Add support for GPIO reset for PCIe device
Add support for "marvell,reset-gpio" property to mvebu DW PCIe driver. This option is valid when CONFIG_DM_GPIO=y
Change-Id: Ic17c500449050c2fbb700731f1a9ca8b83298986 Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com> Cc: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Neta Zur Hershkovits <neta@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Haim Boot <hayim@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
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c1daa407 |
| 24-Mar-2017 |
Tom Rini <trini@konsulko.com> |
Merge git://www.denx.de/git/u-boot-marvell
This mainly adds support for some new boards, like the ARMv8 community boards MACCHIATOBin and ESPRESSBin
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130b53ec |
| 08-Feb-2017 |
Konstantin Porotchkin <kostap@marvell.com> |
mvebu: pcie: Add support for GPIO reset for PCIe device
Add support for "marvell,reset-gpio" property to mvebu DW PCIe driver. This option is valid when CONFIG_DM_GPIO=y
Change-Id: Ic17c500449050c2
mvebu: pcie: Add support for GPIO reset for PCIe device
Add support for "marvell,reset-gpio" property to mvebu DW PCIe driver. This option is valid when CONFIG_DM_GPIO=y
Change-Id: Ic17c500449050c2fbb700731f1a9ca8b83298986 Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com> Cc: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Neta Zur Hershkovits <neta@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Haim Boot <hayim@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
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f2465934 |
| 16-Dec-2016 |
Stefano Babic <sbabic@denx.de> |
Merge branch 'master' of git://git.denx.de/u-boot
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182ba1a7 |
| 27-Oct-2016 |
Shadi Ammouri <shadi@marvell.com> |
pci: mvebu: Add PCIe driver for Armada-8K
This patch adds a driver for the PCIe controller integrated in the Marvell Armada-8K SoC. This controller is based on the DesignWare IP core.
The original
pci: mvebu: Add PCIe driver for Armada-8K
This patch adds a driver for the PCIe controller integrated in the Marvell Armada-8K SoC. This controller is based on the DesignWare IP core.
The original version was written by Shadi and Yehuda. I ported this driver to the latest mainline U-Boot version with DM support.
Tested on the Marvell DB-88F8040 Armada-8K eval board.
Signed-off-by: Shadi Ammouri <shadi@marvell.com> Signed-off-by: Yehuda Yitschak <yehuday@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Neta Zur Hershkovits <neta@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Omri Itach <omrii@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Haim Boot <hayim@marvell.com> Cc: Hanna Hawa <hannah@marvell.com>
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