| /openbmc/linux/drivers/gpu/drm/i915/display/ |
| H A D | intel_color.c | 32 int (*color_check)(struct intel_crtc_state *crtc_state);
40 void (*color_commit_noarm)(const struct intel_crtc_state *crtc_state);
48 void (*color_commit_arm)(const struct intel_crtc_state *crtc_state);
53 void (*color_post_update)(const struct intel_crtc_state *crtc_state);
60 void (*load_luts)(const struct intel_crtc_state *crtc_state);
65 void (*read_luts)(struct intel_crtc_state *crtc_state);
69 bool (*lut_equal)(const struct intel_crtc_state *crtc_state,
77 void (*read_csc)(struct intel_crtc_state *crtc_state);
272 static void ilk_read_csc(struct intel_crtc_state *crtc_state) in ilk_read_csc() argument
274 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in ilk_read_csc()
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| H A D | intel_vrr.c | 76 static int intel_vrr_vblank_exit_length(const struct intel_crtc_state *crtc_state) in intel_vrr_vblank_exit_length() argument
78 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in intel_vrr_vblank_exit_length()
82 return crtc_state->vrr.guardband; in intel_vrr_vblank_exit_length()
85 return crtc_state->vrr.pipeline_full + crtc_state->framestart_delay + 1; in intel_vrr_vblank_exit_length()
88 int intel_vrr_vmin_vblank_start(const struct intel_crtc_state *crtc_state) in intel_vrr_vmin_vblank_start() argument
91 return crtc_state->vrr.vmin + 1 - intel_vrr_vblank_exit_length(crtc_state); in intel_vrr_vmin_vblank_start()
94 int intel_vrr_vmax_vblank_start(const struct intel_crtc_state *crtc_state) in intel_vrr_vmax_vblank_start() argument
96 return crtc_state->vrr.vmax - intel_vrr_vblank_exit_length(crtc_state); in intel_vrr_vmax_vblank_start()
100 intel_vrr_compute_config(struct intel_crtc_state *crtc_state, in intel_vrr_compute_config() argument
103 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in intel_vrr_compute_config()
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| H A D | intel_atomic.c | 125 struct drm_crtc_state *crtc_state; in intel_digital_connector_atomic_check() local
132 crtc_state = drm_atomic_get_new_crtc_state(state, new_state->crtc); in intel_digital_connector_atomic_check()
146 crtc_state->mode_changed = true; in intel_digital_connector_atomic_check()
202 struct intel_crtc_state *crtc_state; in intel_any_crtc_needs_modeset() local
205 for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) { in intel_any_crtc_needs_modeset()
206 if (intel_crtc_needs_modeset(crtc_state)) in intel_any_crtc_needs_modeset()
240 struct intel_crtc_state *crtc_state; in intel_crtc_duplicate_state() local
242 crtc_state = kmemdup(old_crtc_state, sizeof(*crtc_state), GFP_KERNEL); in intel_crtc_duplicate_state()
243 if (!crtc_state) in intel_crtc_duplicate_state()
246 __drm_atomic_helper_crtc_duplicate_state(crtc, &crtc_state->uapi); in intel_crtc_duplicate_state()
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| H A D | intel_dpll.c | 408 const struct intel_crtc_state *crtc_state, in i9xx_select_p2_div() argument
411 struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); in i9xx_select_p2_div()
413 if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_LVDS)) { in i9xx_select_p2_div()
442 struct intel_crtc_state *crtc_state, in i9xx_find_best_dpll() argument
447 struct drm_device *dev = crtc_state->uapi.crtc->dev; in i9xx_find_best_dpll()
453 clock.p2 = i9xx_select_p2_div(limit, crtc_state, target); in i9xx_find_best_dpll()
500 struct intel_crtc_state *crtc_state, in pnv_find_best_dpll() argument
505 struct drm_device *dev = crtc_state->uapi.crtc->dev; in pnv_find_best_dpll()
511 clock.p2 = i9xx_select_p2_div(limit, crtc_state, target); in pnv_find_best_dpll()
556 struct intel_crtc_state *crtc_state, in g4x_find_best_dpll() argument
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| H A D | intel_modeset_setup.c | 39 struct intel_crtc_state *crtc_state = in intel_crtc_disable_noatomic_begin() local
46 if (!crtc_state->hw.active) in intel_crtc_disable_noatomic_begin()
71 intel_crtc_bigjoiner_slave_pipes(crtc_state)) { in intel_crtc_disable_noatomic_begin()
92 if (crtc_state->shared_dpll) in intel_crtc_disable_noatomic_begin()
94 crtc_state->shared_dpll, in intel_crtc_disable_noatomic_begin()
95 &crtc_state->shared_dpll->state); in intel_crtc_disable_noatomic_begin()
163 struct intel_crtc_state *crtc_state = in intel_crtc_disable_noatomic_complete() local
167 __drm_atomic_helper_crtc_destroy_state(&crtc_state->uapi); in intel_crtc_disable_noatomic_complete()
168 intel_crtc_free_hw_state(crtc_state); in intel_crtc_disable_noatomic_complete()
169 intel_crtc_state_reset(crtc_state, crtc); in intel_crtc_disable_noatomic_complete()
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| H A D | intel_dp_link_training.c | 308 const struct intel_crtc_state *crtc_state, in intel_dp_phy_voltage_max() argument
319 voltage_max = intel_dp->voltage_max(intel_dp, crtc_state); in intel_dp_phy_voltage_max()
363 const struct intel_crtc_state *crtc_state, in intel_dp_get_lane_adjust_tx_ffe_preset() argument
371 lane = min(lane, crtc_state->lane_count - 1); in intel_dp_get_lane_adjust_tx_ffe_preset()
374 for (lane = 0; lane < crtc_state->lane_count; lane++) in intel_dp_get_lane_adjust_tx_ffe_preset()
383 const struct intel_crtc_state *crtc_state, in intel_dp_get_lane_adjust_vswing_preemph() argument
394 lane = min(lane, crtc_state->lane_count - 1); in intel_dp_get_lane_adjust_vswing_preemph()
399 for (lane = 0; lane < crtc_state->lane_count; lane++) { in intel_dp_get_lane_adjust_vswing_preemph()
411 voltage_max = intel_dp_phy_voltage_max(intel_dp, crtc_state, dp_phy); in intel_dp_get_lane_adjust_vswing_preemph()
419 const struct intel_crtc_state *crtc_state, in intel_dp_get_lane_adjust_train() argument
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| H A D | intel_ddi_buf_trans.c | 1148 const struct intel_crtc_state *crtc_state, in hsw_get_buf_trans() argument
1151 if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_ANALOG)) in hsw_get_buf_trans()
1153 else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI)) in hsw_get_buf_trans()
1161 const struct intel_crtc_state *crtc_state, in bdw_get_buf_trans() argument
1164 if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_ANALOG)) in bdw_get_buf_trans()
1166 else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI)) in bdw_get_buf_trans()
1168 else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP) && in bdw_get_buf_trans()
1196 const struct intel_crtc_state *crtc_state, in skl_y_get_buf_trans() argument
1199 if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI)) in skl_y_get_buf_trans()
1201 else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP) && in skl_y_get_buf_trans()
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| H A D | intel_ddi.c | 119 const struct intel_crtc_state *crtc_state) in hsw_prepare_dp_ddi_buffers() argument
127 trans = encoder->get_buf_trans(encoder, crtc_state, &n_entries); in hsw_prepare_dp_ddi_buffers()
150 const struct intel_crtc_state *crtc_state) in hsw_prepare_hdmi_ddi_buffers() argument
153 int level = intel_ddi_level(encoder, crtc_state, 0); in hsw_prepare_hdmi_ddi_buffers()
159 trans = encoder->get_buf_trans(encoder, crtc_state, &n_entries); in hsw_prepare_hdmi_ddi_buffers()
261 const struct intel_crtc_state *crtc_state) in icl_pll_to_ddi_clk_sel() argument
263 const struct intel_shared_dpll *pll = crtc_state->shared_dpll; in icl_pll_to_ddi_clk_sel()
264 int clock = crtc_state->port_clock; in icl_pll_to_ddi_clk_sel()
325 const struct intel_crtc_state *crtc_state) in intel_ddi_init_dp_buf_reg() argument
334 DDI_PORT_WIDTH(crtc_state->lane_count) | in intel_ddi_init_dp_buf_reg()
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| H A D | intel_pch_display.c | 218 static void ilk_pch_transcoder_set_timings(const struct intel_crtc_state *crtc_state, in ilk_pch_transcoder_set_timings() argument
221 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in ilk_pch_transcoder_set_timings()
223 enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; in ilk_pch_transcoder_set_timings()
242 static void ilk_enable_pch_transcoder(const struct intel_crtc_state *crtc_state) in ilk_enable_pch_transcoder() argument
244 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in ilk_enable_pch_transcoder()
251 assert_shared_dpll_enabled(dev_priv, crtc_state->shared_dpll); in ilk_enable_pch_transcoder()
267 val |= TRANS_CHICKEN2_FRAME_START_DELAY(crtc_state->framestart_delay - 1); in ilk_enable_pch_transcoder()
278 val |= TRANS_FRAME_START_DELAY(crtc_state->framestart_delay - 1); in ilk_enable_pch_transcoder()
286 if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI)) in ilk_enable_pch_transcoder()
295 intel_crtc_has_type(crtc_state, INTEL_OUTPUT_SDVO)) in ilk_enable_pch_transcoder()
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| H A D | intel_crtc.c | 92 u32 intel_crtc_max_vblank_count(const struct intel_crtc_state *crtc_state) in intel_crtc_max_vblank_count() argument
94 struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); in intel_crtc_max_vblank_count()
102 if (crtc_state->mode_flags & (I915_MODE_FLAG_DSI_USE_TE0 | in intel_crtc_max_vblank_count()
111 (crtc_state->output_types & BIT(INTEL_OUTPUT_TVOUT))) in intel_crtc_max_vblank_count()
122 void intel_crtc_vblank_on(const struct intel_crtc_state *crtc_state) in intel_crtc_vblank_on() argument
124 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in intel_crtc_vblank_on()
128 intel_crtc_max_vblank_count(crtc_state)); in intel_crtc_vblank_on()
139 void intel_crtc_vblank_off(const struct intel_crtc_state *crtc_state) in intel_crtc_vblank_off() argument
141 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in intel_crtc_vblank_off()
156 struct intel_crtc_state *crtc_state; in intel_crtc_state_alloc() local
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| H A D | hsw_ips.c | 13 static void hsw_ips_enable(const struct intel_crtc_state *crtc_state) in hsw_ips_enable() argument
15 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in hsw_ips_enable()
19 if (!crtc_state->ips_enabled) in hsw_ips_enable()
28 !(crtc_state->active_planes & ~BIT(PLANE_CURSOR))); in hsw_ips_enable()
60 bool hsw_ips_disable(const struct intel_crtc_state *crtc_state) in hsw_ips_disable() argument
62 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in hsw_ips_disable()
66 if (!crtc_state->ips_enabled) in hsw_ips_disable()
186 bool hsw_crtc_state_ips_capable(const struct intel_crtc_state *crtc_state) in hsw_crtc_state_ips_capable() argument
188 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in hsw_crtc_state_ips_capable()
198 if (crtc_state->pipe_bpp > 24) in hsw_crtc_state_ips_capable()
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| H A D | intel_ddi.h | 27 const struct intel_crtc_state *crtc_state);
29 const struct intel_crtc_state *crtc_state);
35 const struct intel_crtc_state *crtc_state);
38 struct intel_crtc_state *crtc_state,
41 const struct intel_crtc_state *crtc_state);
46 const struct intel_crtc_state *crtc_state);
48 struct intel_crtc_state *crtc_state);
51 const struct intel_crtc_state *crtc_state);
58 const struct intel_crtc_state *crtc_state);
59 void intel_ddi_disable_transcoder_func(const struct intel_crtc_state *crtc_state);
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| H A D | intel_display.c | 122 static void intel_set_transcoder_timings(const struct intel_crtc_state *crtc_state);
123 static void intel_set_pipe_src_size(const struct intel_crtc_state *crtc_state);
124 static void hsw_set_transconf(const struct intel_crtc_state *crtc_state);
125 static void bdw_set_pipe_misc(const struct intel_crtc_state *crtc_state);
184 static bool is_hdr_mode(const struct intel_crtc_state *crtc_state) in is_hdr_mode() argument
186 return (crtc_state->active_planes & in is_hdr_mode()
223 is_trans_port_sync_slave(const struct intel_crtc_state *crtc_state) in is_trans_port_sync_slave() argument
225 return crtc_state->master_transcoder != INVALID_TRANSCODER; in is_trans_port_sync_slave()
229 is_trans_port_sync_master(const struct intel_crtc_state *crtc_state) in is_trans_port_sync_master() argument
231 return crtc_state->sync_mode_slaves_mask != 0; in is_trans_port_sync_master()
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| H A D | intel_vdsc.c | 22 bool intel_dsc_source_support(const struct intel_crtc_state *crtc_state) in intel_dsc_source_support() argument
24 const struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in intel_dsc_source_support()
26 enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; in intel_dsc_source_support()
353 int intel_dsc_get_num_vdsc_instances(const struct intel_crtc_state *crtc_state) in intel_dsc_get_num_vdsc_instances() argument
355 int num_vdsc_instances = (crtc_state->dsc.dsc_split) ? 2 : 1; in intel_dsc_get_num_vdsc_instances()
357 if (crtc_state->bigjoiner_pipes) in intel_dsc_get_num_vdsc_instances()
363 static void intel_dsc_pps_configure(const struct intel_crtc_state *crtc_state) in intel_dsc_pps_configure() argument
365 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in intel_dsc_pps_configure()
367 const struct drm_dsc_config *vdsc_cfg = &crtc_state->dsc.config; in intel_dsc_pps_configure()
368 enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; in intel_dsc_pps_configure()
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| H A D | intel_audio.c | 69 const struct intel_crtc_state *crtc_state,
75 struct intel_crtc_state *crtc_state);
186 static u32 audio_config_hdmi_pixel_clock(const struct intel_crtc_state *crtc_state) in audio_config_hdmi_pixel_clock() argument
188 struct drm_i915_private *i915 = to_i915(crtc_state->uapi.crtc->dev); in audio_config_hdmi_pixel_clock()
190 &crtc_state->hw.adjusted_mode; in audio_config_hdmi_pixel_clock()
216 static int audio_config_hdmi_get_n(const struct intel_crtc_state *crtc_state, in audio_config_hdmi_get_n() argument
222 if (crtc_state->pipe_bpp == 36) { in audio_config_hdmi_get_n()
225 } else if (crtc_state->pipe_bpp == 30) { in audio_config_hdmi_get_n()
235 crtc_state->port_clock == hdmi_ncts_table[i].clock) { in audio_config_hdmi_get_n()
253 struct intel_crtc_state *crtc_state) in g4x_audio_codec_get_config() argument
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| H A D | intel_hdmi.c | 201 const struct intel_crtc_state *crtc_state, in g4x_write_infoframe() argument
237 const struct intel_crtc_state *crtc_state, in g4x_read_infoframe() argument
269 const struct intel_crtc_state *crtc_state, in ibx_write_infoframe() argument
275 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in ibx_write_infoframe()
308 const struct intel_crtc_state *crtc_state, in ibx_read_infoframe() argument
313 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in ibx_read_infoframe()
344 const struct intel_crtc_state *crtc_state, in cpt_write_infoframe() argument
350 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in cpt_write_infoframe()
386 const struct intel_crtc_state *crtc_state, in cpt_read_infoframe() argument
391 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in cpt_read_infoframe()
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| H A D | intel_color.h | 19 int intel_color_check(struct intel_crtc_state *crtc_state);
20 void intel_color_prepare_commit(struct intel_crtc_state *crtc_state);
21 void intel_color_cleanup_commit(struct intel_crtc_state *crtc_state);
22 void intel_color_commit_noarm(const struct intel_crtc_state *crtc_state);
23 void intel_color_commit_arm(const struct intel_crtc_state *crtc_state);
24 void intel_color_post_update(const struct intel_crtc_state *crtc_state);
25 void intel_color_load_luts(const struct intel_crtc_state *crtc_state);
26 void intel_color_get_config(struct intel_crtc_state *crtc_state);
27 bool intel_color_lut_equal(const struct intel_crtc_state *crtc_state,
31 void intel_color_assert_luts(const struct intel_crtc_state *crtc_state);
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| H A D | intel_drrs.c | 119 static unsigned int intel_drrs_frontbuffer_bits(const struct intel_crtc_state *crtc_state) in intel_drrs_frontbuffer_bits() argument
121 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in intel_drrs_frontbuffer_bits()
128 crtc_state->bigjoiner_pipes) in intel_drrs_frontbuffer_bits()
140 void intel_drrs_activate(const struct intel_crtc_state *crtc_state) in intel_drrs_activate() argument
142 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in intel_drrs_activate()
144 if (!crtc_state->has_drrs) in intel_drrs_activate()
147 if (!crtc_state->hw.active) in intel_drrs_activate()
150 if (intel_crtc_is_bigjoiner_slave(crtc_state)) in intel_drrs_activate()
155 crtc->drrs.cpu_transcoder = crtc_state->cpu_transcoder; in intel_drrs_activate()
156 crtc->drrs.m_n = crtc_state->dp_m_n; in intel_drrs_activate()
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| H A D | intel_vrr.h | 18 void intel_vrr_compute_config(struct intel_crtc_state *crtc_state,
20 void intel_vrr_set_transcoder_timings(const struct intel_crtc_state *crtc_state);
21 void intel_vrr_enable(const struct intel_crtc_state *crtc_state);
22 void intel_vrr_send_push(const struct intel_crtc_state *crtc_state);
23 bool intel_vrr_is_push_sent(const struct intel_crtc_state *crtc_state);
25 void intel_vrr_get_config(struct intel_crtc_state *crtc_state);
26 int intel_vrr_vmax_vblank_start(const struct intel_crtc_state *crtc_state);
27 int intel_vrr_vmin_vblank_start(const struct intel_crtc_state *crtc_state);
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| H A D | intel_dp_mst.c | 50 struct intel_crtc_state *crtc_state, in intel_dp_mst_check_constraints() argument
53 if (intel_dp_is_uhbr(crtc_state) && DISPLAY_VER(i915) <= 13 && dsc) { in intel_dp_mst_check_constraints()
56 int symbol_clock = crtc_state->port_clock / 32; in intel_dp_mst_check_constraints()
70 struct intel_crtc_state *crtc_state, in intel_dp_mst_find_vcpi_slots_for_bpp() argument
78 struct drm_atomic_state *state = crtc_state->uapi.state; in intel_dp_mst_find_vcpi_slots_for_bpp()
86 &crtc_state->hw.adjusted_mode; in intel_dp_mst_find_vcpi_slots_for_bpp()
94 crtc_state->lane_count = limits->max_lane_count; in intel_dp_mst_find_vcpi_slots_for_bpp()
95 crtc_state->port_clock = limits->max_rate; in intel_dp_mst_find_vcpi_slots_for_bpp()
100 crtc_state->port_clock, in intel_dp_mst_find_vcpi_slots_for_bpp()
101 crtc_state->lane_count); in intel_dp_mst_find_vcpi_slots_for_bpp()
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| H A D | intel_vdsc.h | 16 bool intel_dsc_source_support(const struct intel_crtc_state *crtc_state);
17 void intel_uncompressed_joiner_enable(const struct intel_crtc_state *crtc_state);
18 void intel_dsc_enable(const struct intel_crtc_state *crtc_state);
19 void intel_dsc_disable(const struct intel_crtc_state *crtc_state);
21 void intel_dsc_get_config(struct intel_crtc_state *crtc_state);
25 int intel_dsc_get_num_vdsc_instances(const struct intel_crtc_state *crtc_state);
27 const struct intel_crtc_state *crtc_state);
29 const struct intel_crtc_state *crtc_state);
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| H A D | skl_scaler.c | 102 skl_update_scaler(struct intel_crtc_state *crtc_state, bool force_detach, in skl_update_scaler() argument
109 &crtc_state->scaler_state; in skl_update_scaler()
110 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in skl_update_scaler()
113 &crtc_state->hw.adjusted_mode; in skl_update_scaler()
114 int pipe_src_w = drm_rect_width(&crtc_state->pipe_src); in skl_update_scaler()
115 int pipe_src_h = drm_rect_height(&crtc_state->pipe_src); in skl_update_scaler()
133 if (DISPLAY_VER(dev_priv) >= 9 && crtc_state->hw.enable && in skl_update_scaler()
237 int skl_update_scaler_crtc(struct intel_crtc_state *crtc_state) in skl_update_scaler_crtc() argument
239 const struct drm_display_mode *pipe_mode = &crtc_state->hw.pipe_mode; in skl_update_scaler_crtc()
242 if (crtc_state->pch_pfit.enabled) { in skl_update_scaler_crtc()
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| H A D | intel_psr.c | 880 struct intel_crtc_state *crtc_state) in dc3co_is_pipe_port_compatible() argument
883 enum pipe pipe = to_intel_crtc(crtc_state->uapi.crtc)->pipe; in dc3co_is_pipe_port_compatible()
895 struct intel_crtc_state *crtc_state) in tgl_dc3co_exitline_compute_config() argument
897 const u32 crtc_vdisplay = crtc_state->uapi.adjusted_mode.crtc_vdisplay; in tgl_dc3co_exitline_compute_config()
913 if (crtc_state->enable_psr2_sel_fetch) in tgl_dc3co_exitline_compute_config()
919 if (!dc3co_is_pipe_port_compatible(intel_dp, crtc_state)) in tgl_dc3co_exitline_compute_config()
931 intel_usecs_to_scanlines(&crtc_state->uapi.adjusted_mode, 200) + 1; in tgl_dc3co_exitline_compute_config()
936 crtc_state->dc3co_exitline = crtc_vdisplay - exit_scanlines; in tgl_dc3co_exitline_compute_config()
940 struct intel_crtc_state *crtc_state) in intel_psr2_sel_fetch_config_valid() argument
951 if (crtc_state->uapi.async_flip) { in intel_psr2_sel_fetch_config_valid()
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| H A D | intel_dp.h | 36 bool intel_dp_limited_color_range(const struct intel_crtc_state *crtc_state,
52 const struct intel_crtc_state *crtc_state);
54 const struct intel_crtc_state *crtc_state,
70 bool intel_dp_is_uhbr(const struct intel_crtc_state *crtc_state);
74 void intel_edp_backlight_on(const struct intel_crtc_state *crtc_state,
93 bool intel_dp_needs_vsc_sdp(const struct intel_crtc_state *crtc_state,
96 const struct intel_crtc_state *crtc_state,
100 const struct intel_crtc_state *crtc_state,
103 const struct intel_crtc_state *crtc_state,
106 struct intel_crtc_state *crtc_state,
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| /openbmc/linux/drivers/gpu/drm/vkms/ |
| H A D | vkms_composer.c | 149 static void apply_lut(const struct vkms_crtc_state *crtc_state, struct line_buffer *output_buffer) in apply_lut() argument
151 if (!crtc_state->gamma_lut.base) in apply_lut()
154 if (!crtc_state->gamma_lut.lut_length) in apply_lut()
160 pixel->r = apply_lut_to_channel_value(&crtc_state->gamma_lut, pixel->r, LUT_RED); in apply_lut()
161 pixel->g = apply_lut_to_channel_value(&crtc_state->gamma_lut, pixel->g, LUT_GREEN); in apply_lut()
162 pixel->b = apply_lut_to_channel_value(&crtc_state->gamma_lut, pixel->b, LUT_BLUE); in apply_lut()
180 struct vkms_crtc_state *crtc_state, in blend() argument
184 struct vkms_plane_state **plane = crtc_state->active_planes; in blend()
185 u32 n_active_planes = crtc_state->num_active_planes; in blend()
190 size_t crtc_y_limit = crtc_state->base.crtc->mode.vdisplay; in blend()
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