Searched refs:controller_state (Results 1 – 16 of 16) sorted by relevance
164 struct omap2_mcspi_cs *cs = spi->controller_state; in mcspi_write_cs_reg()171 struct omap2_mcspi_cs *cs = spi->controller_state; in mcspi_read_cs_reg()178 struct omap2_mcspi_cs *cs = spi->controller_state; in mcspi_cached_chconf0()185 struct omap2_mcspi_cs *cs = spi->controller_state; in mcspi_write_chconf0()224 struct omap2_mcspi_cs *cs = spi->controller_state; in omap2_mcspi_set_enable()250 if (spi->controller_state) { in omap2_mcspi_set_cs()297 struct omap2_mcspi_cs *cs = spi->controller_state; in omap2_mcspi_set_fifo()446 struct omap2_mcspi_cs *cs = spi->controller_state; in omap2_mcspi_rx_dma()583 struct omap2_mcspi_cs *cs = spi->controller_state; in omap2_mcspi_txrx_dma()691 struct omap2_mcspi_cs *cs = spi->controller_state; in omap2_mcspi_txrx_pio()[all …]
50 struct mpc52xx_psc_spi_cs *cs = spi->controller_state; in mpc52xx_psc_spi_transfer_setup()62 struct mpc52xx_psc_spi_cs *cs = spi->controller_state; in mpc52xx_psc_spi_activate_cs()219 struct mpc52xx_psc_spi_cs *cs = spi->controller_state; in mpc52xx_psc_spi_setup()228 spi->controller_state = cs; in mpc52xx_psc_spi_setup()239 kfree(spi->controller_state); in mpc52xx_psc_spi_cleanup()
143 struct spi_bitbang_cs *cs = spi->controller_state; in spi_bitbang_setup_transfer()185 struct spi_bitbang_cs *cs = spi->controller_state; in spi_bitbang_setup()196 spi->controller_state = cs; in spi_bitbang_setup()229 kfree(spi->controller_state); in spi_bitbang_cleanup()235 struct spi_bitbang_cs *cs = spi->controller_state; in spi_bitbang_bufs()
173 struct uwire_state *ust = spi->controller_state; in uwire_chipselect()308 struct uwire_state *ust = spi->controller_state; in uwire_setup_transfer()423 struct uwire_state *ust = spi->controller_state; in uwire_setup()431 spi->controller_state = ust; in uwire_setup()444 kfree(spi->controller_state); in uwire_cleanup()
75 struct mpc512x_psc_spi_cs *cs = spi->controller_state; in mpc512x_psc_spi_transfer_setup()87 struct mpc512x_psc_spi_cs *cs = spi->controller_state; in mpc512x_psc_spi_activate_cs()359 struct mpc512x_psc_spi_cs *cs = spi->controller_state; in mpc512x_psc_spi_setup()369 spi->controller_state = cs; in mpc512x_psc_spi_setup()380 kfree(spi->controller_state); in mpc512x_psc_spi_cleanup()
164 struct spi_ppc4xx_cs *cs = spi->controller_state; in spi_ppc4xx_setupxfer()212 struct spi_ppc4xx_cs *cs = spi->controller_state; in spi_ppc4xx_setup()223 spi->controller_state = cs; in spi_ppc4xx_setup()316 kfree(spi->controller_state); in spi_ppc4xx_cleanup()
362 u32 *ausd = spi->controller_state; in at91_usart_spi_setup()385 spi->controller_state = ausd; in at91_usart_spi_setup()448 u32 *ausd = spi->controller_state; in at91_usart_spi_prepare_message()470 struct at91_usart_spi_device *ausd = spi->controller_state; in at91_usart_spi_cleanup()472 spi->controller_state = NULL; in at91_usart_spi_cleanup()
387 struct atmel_spi_device *asd = spi->controller_state; in cs_activate()1315 asd = spi->controller_state; in atmel_spi_setup()1321 spi->controller_state = asd; in atmel_spi_setup()1368 asd = spi->controller_state; in atmel_spi_one_transfer()1472 struct atmel_spi_device *asd = spi->controller_state; in atmel_spi_cleanup()1477 spi->controller_state = NULL; in atmel_spi_cleanup()
543 if (!spi->controller_state) in meson_spicc_setup()544 spi->controller_state = spi_master_get_devdata(spi->master); in meson_spicc_setup()551 spi->controller_state = NULL; in meson_spicc_cleanup()
92 struct spi_mpc8xxx_cs *cs = spi->controller_state; in fsl_spi_change_mode()184 struct spi_mpc8xxx_cs *cs = spi->controller_state; in fsl_spi_setup_transfer()
251 if (!spi->controller_state && cs) in spi_gpio_setup()
762 proxy->controller_state = NULL; in spi_new_device()
212 void *controller_state; member260 return spi->controller_state; in spi_get_ctldata()265 spi->controller_state = state; in spi_set_ctldata()
3058 struct cmd_uphy_pcie_controller_state_request controller_state; member
1233 req.controller_state.pcie_controller = pcie->cid; in tegra_pcie_bpmp_set_ctrl_state()1234 req.controller_state.enable = enable; in tegra_pcie_bpmp_set_ctrl_state()
542 Your controller driver may use spi_device.controller_state to hold