Home
last modified time | relevance | path

Searched refs:c0 (Results 1 – 25 of 402) sorted by relevance

12345678910>>...17

/openbmc/linux/arch/arm/include/asm/hardware/
H A Dcp14.h45 #define RCP14_DBGDIDR() MRC14(0, c0, c0, 0)
46 #define RCP14_DBGDSCRint() MRC14(0, c0, c1, 0)
47 #define RCP14_DBGDTRRXint() MRC14(0, c0, c5, 0)
48 #define RCP14_DBGWFAR() MRC14(0, c0, c6, 0)
49 #define RCP14_DBGVCR() MRC14(0, c0, c7, 0)
50 #define RCP14_DBGECR() MRC14(0, c0, c9, 0)
51 #define RCP14_DBGDSCCR() MRC14(0, c0, c10, 0)
52 #define RCP14_DBGDSMCR() MRC14(0, c0, c11, 0)
53 #define RCP14_DBGDTRRXext() MRC14(0, c0, c0, 2)
54 #define RCP14_DBGDSCRext() MRC14(0, c0, c2, 2)
[all …]
/openbmc/linux/drivers/gpu/drm/tidss/
H A Dtidss_scale_coefs.c19 .c0 = { 192, 192, 192, 190, 188, 186, 184, 182, 180, },
25 .c0 = { 200, 202, 204, 202, 200, 196, 192, 188, 184, },
31 .c0 = { 216, 216, 216, 214, 212, 208, 204, 198, 192, },
37 .c0 = { 232, 232, 232, 226, 220, 218, 216, 208, 200, },
43 .c0 = { 264, 262, 260, 254, 248, 242, 236, 226, 216, },
49 .c0 = { 288, 286, 284, 280, 276, 266, 256, 244, 232, },
55 .c0 = { 312, 308, 304, 298, 292, 282, 272, 258, 244, },
61 .c0 = { 336, 332, 328, 320, 312, 300, 288, 272, 256, },
67 .c0 = { 368, 364, 360, 350, 340, 326, 312, 292, 272, },
73 .c0 = { 400, 398, 396, 384, 372, 354, 336, 312, 288, },
[all …]
/openbmc/phosphor-webui/app/assets/images/
H A DDMTF_Redfish_logo_2017.svg1 …c0 2.2.3 4.1 1 5.8.7 1.7 1.6 3.2 2.9 4.6 2.4 2.5 5.5 3.7 9.4 3.7 3.5 0 6.4-.7 8.7-2.2 2.3-1.5 4.3-…
/openbmc/u-boot/board/keymile/kmp204x/
H A Dpbi.cfg10 091380c0 000009C4
12 091380c0 000009C4
14 091380c0 000009C4
17 091380c0 000009C4
19 091380c0 000009C4
21 091380c0 000009C4
23 091380c0 000009C4
25 091380c0 000009C4
27 091380c0 000009C4
29 091380c0 000009C4
[all …]
/openbmc/linux/arch/arm/mm/
H A Dproc-v6.S41 mrc p15, 0, r0, c1, c0, 0 @ ctrl register
44 mcr p15, 0, r0, c1, c0, 0 @ disable caches
59 mrc p15, 0, r1, c1, c0, 0 @ ctrl register
61 mcr p15, 0, r1, c1, c0, 0 @ disable MMU
78 mcr p15, 0, r1, c7, c0, 4 @ wait for interrupt
106 mcr p15, 0, r0, c2, c0, 0 @ set TTB 0
108 mrc p15, 0, r2, c13, c0, 1 @ read current context ID
113 mcr p15, 0, r1, c13, c0, 1 @ set context ID
141 mrc p15, 0, r4, c13, c0, 0 @ FCSE/PID
143 mrc p15, 0, r5, c3, c0, 0 @ Domain ID
[all …]
H A Dproc-v7.S34 mrc p15, 0, r0, c1, c0, 0 @ ctrl register
37 mcr p15, 0, r0, c1, c0, 0 @ disable caches
57 mrc p15, 0, r2, c1, c0, 0 @ ctrl register
60 mcr p15, 0, r2, c1, c0, 0 @ disable MMU
136 mrc p15, 0, r4, c13, c0, 0 @ FCSE/PID
137 mrc p15, 0, r5, c13, c0, 3 @ User r/o thread ID
140 mrc p15, 0, r6, c3, c0, 0 @ Domain ID
144 mrc p15, 0, r7, c2, c0, 1 @ TTB 1
146 mrc p15, 0, r11, c2, c0, 2 @ TTB control register
148 mrc p15, 0, r8, c1, c0, 0 @ Control register
[all …]
H A Dproc-sa1100.S42 mcr p15, 0, r0, c9, c0, 5 @ Allow read-buffer operations from userland
54 mrc p15, 0, r0, c1, c0, 0 @ ctrl register
57 mcr p15, 0, r0, c1, c0, 0 @ disable caches
78 mrc p15, 0, ip, c1, c0, 0 @ ctrl register
81 mcr p15, 0, ip, c1, c0, 0 @ ctrl register
147 mcr p15, 0, ip, c9, c0, 0 @ invalidate RB
148 mcr p15, 0, r0, c2, c0, 0 @ load page table pointer
175 mrc p15, 0, r4, c3, c0, 0 @ domain ID
176 mrc p15, 0, r5, c13, c0, 0 @ PID
177 mrc p15, 0, r6, c1, c0, 0 @ control reg
[all …]
H A Dproc-arm740.S37 mrc p15, 0, r0, c1, c0, 0
40 mcr p15, 0, r0, c1, c0, 0 @ disable caches
51 mcr p15, 0, ip, c7, c0, 0 @ invalidate cache
52 mrc p15, 0, ip, c1, c0, 0 @ get ctrl register
54 mcr p15, 0, ip, c1, c0, 0 @ ctrl register
62 mcr p15, 0, r0, c7, c0, 0 @ invalidate caches
71 mcr p15, 0, r0, c6, c0 @ set area 0, default
97 mcr p15, 0, r0, c2, c0 @ Region 1&2 cacheable
103 mcr p15, 0, r0, c3, c0
107 mcr p15, 0, r0, c5, c0 @ all read/write access
[all …]
/openbmc/u-boot/arch/arm/cpu/armv7/
H A Dstart.S84 mrc p15, 0, r0, c0, c1, 1 @ read ID_PFR1
109 mrc p15, 0, r0, c1, c0, 0 @ Read CP15 SCTLR Register
111 mcr p15, 0, r0, c1, c0, 0 @ Write CP15 SCTLR Register
116 mcr p15, 0, r0, c12, c0, 0 @Set VBAR
191 mrc p15, 0, r0, c1, c0, 0
201 mcr p15, 0, r0, c1, c0, 0
204 mrc p15, 0, r0, c1, c0, 0 @ read system control register
206 mcr p15, 0, r0, c1, c0, 0 @ write system control register
210 mrc p15, 0, r0, c15, c0, 1 @ read diagnostic register
212 mcr p15, 0, r0, c15, c0, 1 @ write diagnostic register
[all …]
H A Dcache_v7_asm.S27 mrc p15, 1, r0, c0, c0, 1 @ read clidr
39 mcr p15, 2, r10, c0, c0, 0 @ select current cache level in cssr
41 mrc p15, 1, r1, c0, c0, 0 @ read the new csidr
69 mcr p15, 2, r10, c0, c0, 0 @ select current cache level in cssr
98 mrc p15, 1, r0, c0, c0, 1 @ read clidr
109 mcr p15, 2, r10, c0, c0, 0 @ select current cache level in cssr
111 mrc p15, 1, r1, c0, c0, 0 @ read the new csidr
139 mcr p15, 2, r10, c0, c0, 0 @ select current cache level in cssr
/openbmc/linux/arch/arm/include/debug/
H A Dicedcc.S16 mcr p14, 0, \rd, c0, c5, 0
21 mrc p14, 0, \rx, c0, c1, 0
34 mrc p14, 0, \rx, c0, c1, 0
43 mcr p14, 0, \rd, c8, c0, 0
48 mrc p14, 0, \rx, c14, c0, 0
61 mrc p14, 0, \rx, c14, c0, 0
70 mcr p14, 0, \rd, c1, c0, 0
75 mrc p14, 0, \rx, c0, c0, 0
89 mrc p14, 0, \rx, c0, c0, 0
/openbmc/linux/drivers/gpu/drm/nouveau/nvkm/engine/sec/fuc/
H A Dg98.fuc0s514 cxsin $c0
515 cxsout $c0
525 cxsin $c0
526 cenc $c0 $c0
527 cxsout $c0
533 cxsin $c0
534 cdec $c0 $c0
535 cxsout $c0
540 cxsin $c0
541 cxor $c6 $c0
[all …]
/openbmc/u-boot/arch/arm/mach-rmobile/
H A Dlowlevel_init_ca15.S14 mrc p15, 0, r4, c0, c0, 5 /* mpidr */
47 mrceq p15, 0, r0, c1, c0, 1 /* actlr */
49 mcreq p15, 0, r0, c1, c0, 1
52 mrc p15, 0, r0, c0, c0, 5 /* r0 = MPIDR */
58 mrc p15, 1, r0, c9, c0, 2 /* r0 = L2CTLR */
66 mcrne p15, 1, r0, c9, c0, 2
72 mrc p15, 0, r0, c1, c0, 1
74 mcr p15, 0, r0, c1, c0, 1
/openbmc/webui-vue/src/assets/images/
H A Dbuilt-on-openbmc-logo.svg3 ….529-.561 2.294a27.54 27.54 0 00-.867 6.553c0 15.487 12.556 28.044 28.044 28.044s28.044-12.557 28.…
6 ….179c-15.327-2.225-29.557 8.397-31.781 23.725a28.227 28.227 0 00-.291 4.014c0 15.488 12.557 28.044…
8 …c0-18.814-15.985-34.061-35.693-34.061-19.707 0-35.692 15.297-35.692 34.061 0 18.765 15.985 34.062 …
11 …c0-1.813-.528-3.238-1.585-4.271s-2.722-1.551-4.996-1.551H113.21l-2.272 13.193zm3.786-21.978h6.513c…
H A Dlogo-header.svg1 …c0 .401-.051.77-.154 1.106a2.705 2.705 0 01-.434.868 1.946 1.946 0 01-.693.567 2.083 2.083 0 01-.9…
/openbmc/docs/logo/
H A DBuiltOnOpenBMC.svg3 ….529-.561 2.294a27.54 27.54 0 00-.867 6.553c0 15.487 12.556 28.044 28.044 28.044s28.044-12.557 28.…
6 ….179c-15.327-2.225-29.557 8.397-31.781 23.725a28.227 28.227 0 00-.291 4.014c0 15.488 12.557 28.044…
8 …c0-18.814-15.985-34.061-35.693-34.061-19.707 0-35.692 15.297-35.692 34.061 0 18.765 15.985 34.062 …
11 …c0-1.813-.528-3.238-1.585-4.271s-2.722-1.551-4.996-1.551H113.21l-2.272 13.193zm3.786-21.978h6.513c…
/openbmc/linux/arch/arm/mach-sunxi/
H A Dheadsmp.S25 mrc p15, 0, r1, c0, c0, 0
37 mrc p15, 1, r1, c15, c0, 4
39 mcr p15, 1, r1, c15, c0, 4
42 mrc p15, 1, r1, c15, c0, 0
47 mcr p15, 1, r1, c15, c0, 0
50 mrc p15, 1, r1, c9, c0, 2
53 mcr p15, 1, r1, c9, c0, 2
/openbmc/linux/arch/arm/mach-omap2/
H A Dsleep44xx.S88 mrc p15, 0, r0, c1, c0, 0
90 mcr p15, 0, r0, c1, c0, 0
108 mrc p15, 0, r0, c0, c0, 5 @ Read MPIDR
119 mrc p15, 0, r0, c0, c0, 5 @ Read MPIDR
128 mrcne p15, 0, r0, c1, c0, 1
130 mcrne p15, 0, r0, c1, c0, 1
146 mrc p15, 0, r5, c0, c0, 5 @ Read MPIDR
189 mrc p15, 0, r0, c1, c0, 0
192 mcreq p15, 0, r0, c1, c0, 0
201 mrc p15, 0, r0, c1, c0, 1
[all …]
H A Domap-headsmp.S46 mrc p15, 0, r4, c0, c0, 5
64 mrc p15, 0, r4, c0, c0, 5
86 mrc p15, 0, r4, c0, c0, 5
103 mrc p15, 0, r4, c0, c0, 5
/openbmc/qemu/pc-bios/s390-ccw/
H A Dstart.S69 stctg %c0,%c0,0(%r15)
71 lctlg %c0,%c0,0(%r15)
103 stctg %c0,%c0,0(%r15)
105 lctlg %c0,%c0,0(%r15)
/openbmc/qemu/tests/tcg/multiarch/
H A Dcatch-syscalls.c19 char c0 = 'A', c1; in main() local
28 if (write(fd[1], &c0, sizeof(c0)) != sizeof(c0)) { in main()
38 if (c0 == c1) { in main()
/openbmc/linux/tools/testing/selftests/proc/
H A Dproc-uptime-001.c30 uint64_t start, u0, u1, c0, c1; in main() local
38 c0 = clock_boottime(); in main()
48 assert(c1 >= c0); in main()
51 assert(c0 >= u0); in main()
54 c0 = c1; in main()
/openbmc/linux/arch/arm/mach-tegra/
H A Dsleep.h70 mrc p15, 0, \rd, c0, c0, 5
82 mrc p15, 0, \tmp1, c0, c0, 0
90 mrc p15, 0, \tmp1, c1, c0, 1 @ ACTLR
92 mcr p15, 0, \tmp1, c1, c0, 1 @ ACTLR
96 mrceq p15, 0, \tmp1, c0, c0, 5
/openbmc/u-boot/arch/arm/mach-uniphier/arm32/
H A Dlowlevel_init.S23 mrc p15, 0, r0, c1, c0, 0 @ SCTLR (System Control Register)
25 mcr p15, 0, r0, c1, c0, 0
42 mrc p15, 0, r0, c1, c0, 0 @ SCTLR (System Control Register)
44 mcr p15, 0, r0, c1, c0, 0
53 mrc p15, 0, r0, c2, c0, 2 @ TTBCR (Translation Table Base Control Register)
56 mcr p15, 0, r0, c2, c0, 2
59 mcr p15, 0, r0, c2, c0, 0 @ TTBR0
65 mcr p15, 0, r0, c3, c0, 0 @ DACR (Domain Access Control Register)
74 mrc p15, 0, r0, c1, c0, 0 @ SCTLR (System Control Register)
76 mcr p15, 0, r0, c1, c0, 0
/openbmc/u-boot/arch/arm/cpu/armv7/sunxi/
H A Dfel_utils.S19 mrc p15, 0, lr, c1, c0, 0 @ Read CP15 SCTLR Register
21 mrc p15, 0, lr, c12, c0, 0 @ Read VBAR
23 mrc p15, 0, lr, c1, c0, 0 @ Read CP15 Control Register
33 mcr p15, 0, r1, c1, c0, 0 @ Write CP15 Control Register
35 mcr p15, 0, r1, c12, c0, 0 @ Write VBAR
37 mcr p15, 0, r1, c1, c0, 0 @ Write CP15 SCTLR Register

12345678910>>...17