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Searched refs:bank_bits (Results 1 – 9 of 9) sorted by relevance

/openbmc/qemu/hw/misc/
H A Dallwinner-r40-dramc.c74 uint8_t bank_bits; member
86 .bank_bits = 3,
91 .bank_bits = 3,
96 .bank_bits = 3,
135 for (int i = 0; i < ddr->bank_bits; i++) { in address_to_autodetect_cells()
153 uint8_t bank_bits, uint8_t col_bits) in allwinner_r40_dramc_map_rows() argument
158 trace_allwinner_r40_dramc_map_rows(row_bits, bank_bits, col_bits); in allwinner_r40_dramc_map_rows()
165 s->set_bank_bits = bank_bits; in allwinner_r40_dramc_map_rows()
168 enable_detect_cells = ddr->bank_bits != bank_bits in allwinner_r40_dramc_map_rows()
H A Dallwinner-h3-dramc.c57 uint8_t bank_bits, uint16_t page_size) in allwinner_h3_dramc_map_rows() argument
89 bank_bits)) * page_size); in allwinner_h3_dramc_map_rows()
H A Dtrace-events21 …40_dramc_map_rows(uint8_t row_bits, uint8_t bank_bits, uint8_t col_bits) "DRAM layout: row_bits %d…
/openbmc/u-boot/arch/arm/mach-sunxi/
H A Ddram_sunxi_dw.c349 (para->bank_bits == 3 ? MCTL_CR_EIGHT_BANKS : MCTL_CR_FOUR_BANKS) | in mctl_set_cr()
589 para->bank_bits = 2; in mctl_auto_detect_dram_size()
593 if (mctl_mem_matches((1 << (para->row_bits + para->bank_bits)) * para->page_size)) in mctl_auto_detect_dram_size()
597 para->bank_bits = 3; in mctl_auto_detect_dram_size()
600 for (para->bank_bits = 2; para->bank_bits < 3; para->bank_bits++) in mctl_auto_detect_dram_size()
601 if (mctl_mem_matches((1 << para->bank_bits) * para->page_size)) in mctl_auto_detect_dram_size()
695 .bank_bits = 3, in sunxi_dram_init()
765 return (1UL << (para.row_bits + para.bank_bits)) * para.page_size * in sunxi_dram_init()
/openbmc/linux/drivers/gpio/
H A Dgpio-uniphier.c149 unsigned long i, bank, bank_mask, bank_bits; in uniphier_gpio_set_multiple() local
153 bank_bits = bitmap_get_value8(bits, i); in uniphier_gpio_set_multiple()
156 bank_mask, bank_bits); in uniphier_gpio_set_multiple()
/openbmc/u-boot/drivers/ram/
H A Dmpc83xx_sdram.c148 u32 auto_precharge, odt_rd_cfg, odt_wr_cfg, bank_bits, row_bits, in mpc83xx_sdram_static_init() local
231 bank_bits = ofnode_read_u32_default(node, "bank_bits", 0); in mpc83xx_sdram_static_init()
232 switch (bank_bits) { in mpc83xx_sdram_static_init()
241 ofnode_get_name(node), bank_bits); in mpc83xx_sdram_static_init()
/openbmc/linux/drivers/edac/
H A Ddmc520_edac.c352 u32 reg_val, col_bits, row_bits, bank_bits; in dmc520_get_rank_size() local
360 bank_bits = FIELD_GET(REG_FIELD_ADDRESS_CONTROL_BANK, reg_val); in dmc520_get_rank_size()
362 return (u64)pvt->mem_width_in_bytes << (col_bits + row_bits + bank_bits); in dmc520_get_rank_size()
/openbmc/u-boot/Documentation/devicetree/bindings/ram/
H A Dfsl,mpc83xx-mem-controller.txt235 - bank_bits: Number of bank bits for SDRAM on chip select; possible
310 bank_bits = <3>;
/openbmc/u-boot/arch/arm/include/asm/arch-sunxi/
H A Ddram_sunxi_dw.h223 u8 bank_bits; member