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Searched refs:b11 (Results 1 – 25 of 48) sorted by relevance

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/openbmc/qemu/linux-user/include/host/loongarch64/
H A Dhost-signal.h40 switch ((insn >> 24) & 0b11) { in host_signal_write()
42 case 0b11: /* sc.d */ in host_signal_write()
47 switch ((insn >> 24) & 0b11) { in host_signal_write()
49 case 0b11: /* stox4.d (stptr.d) */ in host_signal_write()
/openbmc/qemu/disas/
H A Driscv-xthead.c254 switch (((inst >> 0) & 0b11)) { in decode_xtheadba()
283 switch (((inst >> 0) & 0b11)) { in decode_xtheadbb()
339 switch (((inst >> 0) & 0b11)) { in decode_xtheadbs()
365 switch (((inst >> 0) & 0b11)) { in decode_xtheadcmo()
443 switch (((inst >> 0) & 0b11)) { in decode_xtheadcondmov()
470 switch (((inst >> 0) & 0b11)) { in decode_xtheadfmemidx()
507 switch (((inst >> 0) & 0b11)) { in decode_xtheadfmv()
542 switch (((inst >> 0) & 0b11)) { in decode_xtheadmac()
573 switch (((inst >> 0) & 0b11)) { in decode_xtheadmemidx()
647 switch (((inst >> 0) & 0b11)) { in decode_xtheadmempair()
[all …]
H A Driscv-xventana.c28 switch (((inst >> 0) & 0b11)) { in decode_xventanacondops()
H A Driscv.c2543 switch ((inst >> 0) & 0b11) { in decode_inst_opcode()
2616 (((inst >> 11) & 0b11) == 0b0)) { in decode_inst_opcode()
2633 switch ((inst >> 10) & 0b11) { in decode_inst_opcode()
3238 switch ((inst >> 25) & 0b11) { in decode_inst_opcode()
3245 switch ((inst >> 25) & 0b11) { in decode_inst_opcode()
3252 switch ((inst >> 25) & 0b11) { in decode_inst_opcode()
3259 switch ((inst >> 25) & 0b11) { in decode_inst_opcode()
5072 return (inst & 0b11) != 0b11 ? 2 in inst_length()
5270 const int lmul = dec->vzimm & 0b11; in format_inst()
/openbmc/linux/drivers/iio/adc/
H A Dad7606_spi.c32 #define AD7616_RANGE_CH_MSK(ch) (0b11 << (((ch) & 0b11) * 2))
33 #define AD7616_RANGE_CH_MODE(ch, mode) ((mode) << ((((ch) & 0b11)) * 2))
199 mode = AD7616_RANGE_CH_MODE(ch_index, ((val + 1) & 0b11)); in ad7616_write_scale_sw()
/openbmc/qemu/tests/qtest/
H A Dstm32l4x5_rcc-test.c92 (0b11 << R_CFGR_SW_SHIFT)); in test_init_pll()
96 (0b11 << R_CFGR_SWS_SHIFT)); in test_init_pll()
H A Dpnv-xive2-common.h80 #define XIVE_ESB_QUEUED 0b11
H A Dstm32l4x5_usart-test.c150 (0b11 << R_CFGR_SW_SHIFT)); in init_clocks()
/openbmc/qemu/target/arm/tcg/
H A Dneon-dp.decode389 # decode: 0b11 for VEXT, two-reg-misc, VTBL, and duplicate-scalar;
391 # two-reg-and-scalar insn groups (where size cannot be 0b11). This
394 # one for the size=0b11 patterns, and one for the size-not-0b11
397 # trans functions for the size-not-0b11 patterns must check and
403 # Miscellaneous size=0b11 insns
526 # Subgroup for size != 0b11
/openbmc/qemu/target/ppc/
H A Dpower8-pmu-regs.c.inc36 * Write access is granted for PMCC values 0b10 and 0b11. Userspace
148 * When MMCR0[PMCC] is set to 0b10 or 0b11, providing
203 * If PMCC = 0b11, PMC5 and PMC6 aren't included in the Performance
236 * If PMCC = 0b11, PMC5 and PMC6 aren't included in the Performance
/openbmc/linux/arch/loongarch/include/asm/
H A Dhw_breakpoint.h32 #define LOONGARCH_BREAKPOINT_LEN_1 0b11
/openbmc/linux/drivers/net/wireless/ath/wil6210/
H A Dtxrx.h285 u8 b11; /* 0..6: mac_length; 7:ip_version */ member
461 u8 b11; member
H A Dtxrx_edma.h134 u8 b11; /* 0..6: mac_length; 7:ip_version */ member
H A Dtxrx.c1102 d->dma.b11 = 0/*14 | BIT(7)*/; in wil_tx_desc_map()
1638 d->dma.b11 = ETH_HLEN; /* MAC header length */ in wil_tx_desc_offload_setup_tso()
1639 d->dma.b11 |= is_ipv4 << DMA_CFG_DESC_TX_OFFLOAD_CFG_L3T_IPV4_POS; in wil_tx_desc_offload_setup_tso()
1673 d->dma.b11 = ETH_HLEN; /* MAC header length */ in wil_tx_desc_offload_setup()
1678 d->dma.b11 |= BIT(DMA_CFG_DESC_TX_OFFLOAD_CFG_L3T_IPV4_POS); in wil_tx_desc_offload_setup()
/openbmc/linux/Documentation/admin-guide/perf/
H A Dhisi-pcie-pmu.rst122 - 2'b11: Bandwidth of both TLP payloads and headers
126 headers and payloads. Default value if not specified is 2'b11.
H A Dhisi-pmu.rst107 - 2'b11: count the events which sent to the uring_ext (MATA) channel;
108 - 2'b01: is the same as 2'b11;
/openbmc/linux/tools/edid/
H A Dedid.S34 #define XY_RATIO_16_9 0b11
/openbmc/linux/arch/arm64/include/uapi/asm/
H A Dptrace.h74 #define PSR_BTYPE_J (0b11 << PSR_BTYPE_SHIFT)
/openbmc/linux/arch/arm64/tools/
H A Dsysreg1695 0b11 ASYMM
1701 0b11 ASYMM
2005 0b11 PIPT
2374 0b11 GUEST
2563 0b11 IGNR
2568 0b11 CBUF
2604 0b11 REALM
2609 0b11 INNER_SHAREABLE
/openbmc/linux/drivers/net/mdio/
H A Dmdio-aspeed.c28 #define MDIO_C45_OP_READ 0b11
/openbmc/qemu/target/riscv/
H A Dcpu_bits.h903 #define SEED_OPST (0b11 << 30)
907 #define SEED_OPST_DEAD (0b11 << 30)
/openbmc/qemu/tests/tcg/xtensa/
H A Dtest_fp1.S53 test_ord \op b11, f6, f7, 0x7f800001, 0x3f800000, \Na, FSR_V /* +SNaN ord */
/openbmc/qemu/hw/tpm/
H A Dtpm_crb.c58 #define CRB_INTF_CAP_XFER_SIZE_64 0b11
/openbmc/qemu/hw/misc/
H A Dstm32l4x5_rcc.c447 if (FIELD_EX32(s->cfgr, CFGR, SWS) != 0b11) { in rcc_update_cr_register()
583 1, 1 << (val - 0b11)); in rcc_update_cfgr_register()
593 1, 1 << (val - 0b11)); in rcc_update_cfgr_register()
/openbmc/linux/drivers/hid/
H A Dhid-steam.c1606 u8 b8, b9, b10, b11, b13, b14; in steam_do_deck_input_event() local
1612 b11 = data[11]; in steam_do_deck_input_event()
1668 input_event(input, EV_KEY, BTN_THUMBR, !!(b11 & BIT(2))); in steam_do_deck_input_event()

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