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Searched refs:arm_el_is_aa64 (Results 1 – 11 of 11) sorted by relevance

/openbmc/qemu/target/arm/tcg/
H A Dhflags.c167 if (arm_el_is_aa64(env, 1)) { in rebuild_hflags_a32()
195 || (arm_el_is_aa64(env, 2) && !(env->cp15.hcr_el2 & HCR_TGE))) in rebuild_hflags_a32()
196 && arm_el_is_aa64(env, 1) in rebuild_hflags_a32()
H A Dpsci.c146 bool target_aarch64 = arm_el_is_aa64(env, target_el); in arm_handle_psci_call()
H A Dop_helper.c40 if (arm_is_secure(env) && !arm_el_is_aa64(env, 3) && target_el == 1) { in exception_target_el()
337 if (arm_is_secure_below_el3(env) && !arm_el_is_aa64(env, 3)) { in check_wfx_trap()
934 && arm_el_is_aa64(env, target_el)) { in HELPER()
1229 if (arm_el_is_aa64(env, 1)) { in HELPER()
H A Dtlb_helper.c96 (target_el == 2 || arm_el_is_aa64(env, target_el) || in compute_fsr_fsc()
H A Dhelper-a64.c815 if (new_el != 0 && arm_el_is_aa64(env, new_el) != return_to_aa64) { in HELPER()
/openbmc/qemu/target/arm/
H A Ddebug_helper.c37 !arm_el_is_aa64(env, 3) && secure) { in arm_debug_target_el()
99 if (el == 0 && arm_el_is_aa64(env, 1)) { in aa32_generate_debug_exceptions()
168 && arm_el_is_aa64(env, arm_debug_target_el(env)) in arm_singlestep_active()
446 } else if (target_el == 2 || arm_el_is_aa64(env, target_el)) { in arm_debug_exception_fsr()
H A Dinternals.h469 return arm_el_is_aa64(env, 1) || in extended_addresses_enabled()
1014 if (el == 2 || arm_el_is_aa64(env, el)) { in regime_using_lpae_format()
1756 arm_el_is_aa64(env, 1) && in arm_fgt_active()
H A Dcpu.h2597 static inline bool arm_el_is_aa64(CPUARMState *env, int el) in arm_el_is_aa64() function
2639 !arm_el_is_aa64(env, 3) && in access_secure_reg()
2665 (arm_is_secure(_env) && !arm_el_is_aa64((_env), 3)))
2669 (arm_is_secure(_env) && !arm_el_is_aa64((_env), 3)), \
2715 if (arm_is_secure(env) && !arm_el_is_aa64(env, 3)) { in arm_current_el()
H A Dptw.c186 if (!arm_el_is_aa64(env, 3)) { in ptw_idx_for_stage_2()
1340 if (arm_el_is_aa64(env, 2) || prot & PAGE_READ) { in get_S2prot()
1703 bool aarch64 = arm_el_is_aa64(env, el); in get_phys_addr_lpae()
1714 !arm_el_is_aa64(env, 1)); in get_phys_addr_lpae()
3248 if (arm_el_is_aa64(env, r_el)) { in get_phys_addr_disabled()
H A Dhelper.c797 if (arm_feature(env, ARM_FEATURE_EL3) && !arm_el_is_aa64(env, 3) && in cpacr_write()
814 if (arm_feature(env, ARM_FEATURE_EL3) && !arm_el_is_aa64(env, 3) && in cpacr_read()
1252 m = arm_el_is_aa64(env, 1) && in pmu_counter_enabled()
1885 if (arm_el_is_aa64(env, 3)) { in scr_write()
3668 if (target_el == 2 || arm_el_is_aa64(env, target_el) || in do_ats_write()
6146 if (!arm_el_is_aa64(env, 2)) { in arm_hcr_el2_eff_secstate()
6214 return arm_is_el2_enabled(env) && arm_el_is_aa64(env, 2); in el_is_in_host()
6314 if (arm_feature(env, ARM_FEATURE_EL3) && !arm_el_is_aa64(env, 3) && in cptr_el2_write()
6330 if (arm_feature(env, ARM_FEATURE_EL3) && !arm_el_is_aa64(env, 3) && in cptr_el2_read()
11866 if (arm_el_is_aa64(env, new_el)) { in arm_cpu_do_interrupt()
[all …]
/openbmc/qemu/hw/intc/
H A Darm_gicv3_cpuif.c1079 (arm_current_el(env) == 3 && arm_el_is_aa64(env, 3))); in gicv3_cpuif_update()
2303 if (r == CP_ACCESS_TRAP_EL3 && !arm_el_is_aa64(env, 3)) { in gicv3_irqfiq_access()
2368 if (r == CP_ACCESS_TRAP_EL3 && !arm_el_is_aa64(env, 3)) { in gicv3_fiq_access()
2407 if (r == CP_ACCESS_TRAP_EL3 && !arm_el_is_aa64(env, 3)) { in gicv3_irq_access()