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Searched refs:XCHAL_TIMER0_INTERRUPT (Results 1 – 24 of 24) sorted by relevance

/openbmc/qemu/tests/tcg/xtensa/
H A Dtest_timer.S41 #if INTERRUPT_LEVEL(XCHAL_TIMER0_INTERRUPT) == 1
44 #define TIMER0_VECTOR glue(level, INTERRUPT_LEVEL(XCHAL_TIMER0_INTERRUPT))
84 movi a3, 1 << XCHAL_TIMER0_INTERRUPT
136 movi a2, 1 << XCHAL_TIMER0_INTERRUPT
144 #if INTERRUPT_LEVEL(XCHAL_TIMER0_INTERRUPT) == 1
241 movi a2, 1 << XCHAL_TIMER0_INTERRUPT
250 #if INTERRUPT_LEVEL(XCHAL_TIMER0_INTERRUPT) == 1
277 movi a2, 1 << XCHAL_TIMER0_INTERRUPT
282 #if INTERRUPT_LEVEL(XCHAL_TIMER0_INTERRUPT) == 1
/openbmc/linux/arch/xtensa/include/asm/
H A Dtimex.h15 XTENSA_INT_LEVEL(XCHAL_TIMER0_INTERRUPT) <= XCHAL_EXCM_LEVEL
17 # define LINUX_TIMER_INT XCHAL_TIMER0_INTERRUPT
/openbmc/linux/arch/xtensa/variants/fsf/include/variant/
H A Dcore.h257 #define XCHAL_TIMER0_INTERRUPT 10 /* CCOMPARE0 */ macro
/openbmc/qemu/target/xtensa/core-fsf/
H A Dcore-isa.h259 #define XCHAL_TIMER0_INTERRUPT 10 /* CCOMPARE0 */ macro
/openbmc/linux/arch/xtensa/variants/test_mmuhifi_c3/include/variant/
H A Dcore.h267 #define XCHAL_TIMER0_INTERRUPT 6 /* CCOMPARE0 */ macro
/openbmc/qemu/target/xtensa/core-dsp3400/
H A Dcore-isa.h322 #define XCHAL_TIMER0_INTERRUPT 0 /* CCOMPARE0 */ macro
/openbmc/qemu/target/xtensa/core-lx106/
H A Dcore-isa.h341 #define XCHAL_TIMER0_INTERRUPT 6 /* CCOMPARE0 */ macro
/openbmc/qemu/target/xtensa/core-dc232b/
H A Dcore-isa.h275 #define XCHAL_TIMER0_INTERRUPT 6 /* CCOMPARE0 */ macro
/openbmc/linux/arch/xtensa/variants/dc232b/include/variant/
H A Dcore.h276 #define XCHAL_TIMER0_INTERRUPT 6 /* CCOMPARE0 */ macro
/openbmc/qemu/target/xtensa/core-test_mmuhifi_c3/
H A Dcore-isa.h327 #define XCHAL_TIMER0_INTERRUPT 6 /* CCOMPARE0 */ macro
/openbmc/u-boot/arch/xtensa/include/asm/arch-dc232b/
H A Dcore.h274 #define XCHAL_TIMER0_INTERRUPT 6 /* CCOMPARE0 */ macro
/openbmc/qemu/target/xtensa/core-dc233c/
H A Dcore-isa.h323 #define XCHAL_TIMER0_INTERRUPT 6 /* CCOMPARE0 */ macro
/openbmc/u-boot/arch/xtensa/include/asm/arch-dc233c/
H A Dcore.h302 #define XCHAL_TIMER0_INTERRUPT 6 /* CCOMPARE0 */ macro
/openbmc/linux/arch/xtensa/variants/dc233c/include/variant/
H A Dcore.h324 #define XCHAL_TIMER0_INTERRUPT 6 /* CCOMPARE0 */ macro
/openbmc/linux/arch/xtensa/variants/test_kc705_hifi/include/variant/
H A Dcore.h349 #define XCHAL_TIMER0_INTERRUPT 6 /* CCOMPARE0 */ macro
/openbmc/linux/arch/xtensa/variants/de212/include/variant/
H A Dcore.h410 #define XCHAL_TIMER0_INTERRUPT 6 /* CCOMPARE0 */ macro
/openbmc/linux/arch/xtensa/variants/csp/include/variant/
H A Dcore.h391 #define XCHAL_TIMER0_INTERRUPT 6 /* CCOMPARE0 */ macro
/openbmc/qemu/target/xtensa/core-test_kc705_be/
H A Dcore-isa.h391 #define XCHAL_TIMER0_INTERRUPT 6 /* CCOMPARE0 */ macro
/openbmc/u-boot/arch/xtensa/include/asm/arch-de212/
H A Dcore.h388 #define XCHAL_TIMER0_INTERRUPT 6 /* CCOMPARE0 */ macro
/openbmc/linux/arch/xtensa/variants/test_kc705_be/include/variant/
H A Dcore.h392 #define XCHAL_TIMER0_INTERRUPT 6 /* CCOMPARE0 */ macro
/openbmc/qemu/target/xtensa/core-de212/
H A Dcore-isa.h424 #define XCHAL_TIMER0_INTERRUPT 6 /* CCOMPARE0 */ macro
/openbmc/qemu/target/xtensa/core-sample_controller/
H A Dcore-isa.h445 #define XCHAL_TIMER0_INTERRUPT 6 /* CCOMPARE0 */ macro
/openbmc/qemu/target/xtensa/core-de233_fpu/
H A Dcore-isa.h514 #define XCHAL_TIMER0_INTERRUPT 6 /* CCOMPARE0 */ macro
/openbmc/qemu/target/xtensa/
H A Doverlay_tool.h287 [0] = XCHAL_TIMER0_INTERRUPT, \