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Searched refs:XCHAL_INTLEVEL6_VECTOR_VADDR (Results 1 – 19 of 19) sorted by relevance

/openbmc/linux/arch/xtensa/include/asm/
H A Dvectors.h73 #undef XCHAL_INTLEVEL6_VECTOR_VADDR
87 #define INTLEVEL6_VECTOR_VADDR XCHAL_INTLEVEL6_VECTOR_VADDR
88 #define INTLEVEL7_VECTOR_VADDR XCHAL_INTLEVEL6_VECTOR_VADDR
/openbmc/qemu/target/xtensa/core-dsp3400/
H A Dcore-isa.h408 #define XCHAL_INTLEVEL6_VECTOR_VADDR 0x5FFE05FC macro
411 #define XCHAL_DEBUG_VECTOR_VADDR XCHAL_INTLEVEL6_VECTOR_VADDR
/openbmc/qemu/target/xtensa/core-dc232b/
H A Dcore-isa.h373 #define XCHAL_INTLEVEL6_VECTOR_VADDR 0xD0000280 macro
376 #define XCHAL_DEBUG_VECTOR_VADDR XCHAL_INTLEVEL6_VECTOR_VADDR
/openbmc/linux/arch/xtensa/variants/dc232b/include/variant/
H A Dcore.h374 #define XCHAL_INTLEVEL6_VECTOR_VADDR 0xD0000280 macro
377 #define XCHAL_DEBUG_VECTOR_VADDR XCHAL_INTLEVEL6_VECTOR_VADDR
/openbmc/u-boot/arch/xtensa/include/asm/arch-dc232b/
H A Dcore.h372 #define XCHAL_INTLEVEL6_VECTOR_VADDR 0xD0000280 macro
375 #define XCHAL_DEBUG_VECTOR_VADDR XCHAL_INTLEVEL6_VECTOR_VADDR
/openbmc/qemu/target/xtensa/core-dc233c/
H A Dcore-isa.h423 #define XCHAL_INTLEVEL6_VECTOR_VADDR 0x00002280 macro
426 #define XCHAL_DEBUG_VECTOR_VADDR XCHAL_INTLEVEL6_VECTOR_VADDR
/openbmc/u-boot/arch/xtensa/include/asm/arch-dc233c/
H A Dcore.h402 #define XCHAL_INTLEVEL6_VECTOR_VADDR 0x00002280 macro
405 #define XCHAL_DEBUG_VECTOR_VADDR XCHAL_INTLEVEL6_VECTOR_VADDR
/openbmc/linux/arch/xtensa/variants/dc233c/include/variant/
H A Dcore.h424 #define XCHAL_INTLEVEL6_VECTOR_VADDR 0x00002280 macro
427 #define XCHAL_DEBUG_VECTOR_VADDR XCHAL_INTLEVEL6_VECTOR_VADDR
/openbmc/linux/arch/xtensa/variants/test_kc705_hifi/include/variant/
H A Dcore.h464 #define XCHAL_INTLEVEL6_VECTOR_VADDR 0x00002280 macro
467 #define XCHAL_DEBUG_VECTOR_VADDR XCHAL_INTLEVEL6_VECTOR_VADDR
/openbmc/linux/arch/xtensa/variants/de212/include/variant/
H A Dcore.h528 #define XCHAL_INTLEVEL6_VECTOR_VADDR 0x60000280 macro
531 #define XCHAL_DEBUG_VECTOR_VADDR XCHAL_INTLEVEL6_VECTOR_VADDR
/openbmc/linux/arch/xtensa/variants/csp/include/variant/
H A Dcore.h507 #define XCHAL_INTLEVEL6_VECTOR_VADDR 0x00002280 macro
510 #define XCHAL_DEBUG_VECTOR_VADDR XCHAL_INTLEVEL6_VECTOR_VADDR
/openbmc/qemu/target/xtensa/core-test_kc705_be/
H A Dcore-isa.h506 #define XCHAL_INTLEVEL6_VECTOR_VADDR 0x00002280 macro
509 #define XCHAL_DEBUG_VECTOR_VADDR XCHAL_INTLEVEL6_VECTOR_VADDR
/openbmc/u-boot/arch/xtensa/include/asm/arch-de212/
H A Dcore.h506 #define XCHAL_INTLEVEL6_VECTOR_VADDR 0x60000280 macro
509 #define XCHAL_DEBUG_VECTOR_VADDR XCHAL_INTLEVEL6_VECTOR_VADDR
/openbmc/linux/arch/xtensa/variants/test_kc705_be/include/variant/
H A Dcore.h507 #define XCHAL_INTLEVEL6_VECTOR_VADDR 0x00002280 macro
510 #define XCHAL_DEBUG_VECTOR_VADDR XCHAL_INTLEVEL6_VECTOR_VADDR
/openbmc/qemu/target/xtensa/core-de212/
H A Dcore-isa.h542 #define XCHAL_INTLEVEL6_VECTOR_VADDR 0x60000280 macro
545 #define XCHAL_DEBUG_VECTOR_VADDR XCHAL_INTLEVEL6_VECTOR_VADDR
/openbmc/qemu/target/xtensa/core-sample_controller/
H A Dcore-isa.h563 #define XCHAL_INTLEVEL6_VECTOR_VADDR 0x40000280 macro
566 #define XCHAL_DEBUG_VECTOR_VADDR XCHAL_INTLEVEL6_VECTOR_VADDR
/openbmc/qemu/target/xtensa/core-de233_fpu/
H A Dcore-isa.h645 #define XCHAL_INTLEVEL6_VECTOR_VADDR 0x00002280 macro
648 #define XCHAL_DEBUG_VECTOR_VADDR XCHAL_INTLEVEL6_VECTOR_VADDR
/openbmc/qemu/tests/tcg/xtensa/
H A Dlinker.ld.S79 .vector.level6 XCHAL_INTLEVEL6_VECTOR_VADDR :
/openbmc/qemu/target/xtensa/
H A Doverlay_tool.h209 XCHAL_INTLEVEL6_VECTOR_VADDR, \
564 #define XCHAL_INTLEVEL6_VECTOR_VADDR 0 macro